340 lines
8.5 KiB
C
340 lines
8.5 KiB
C
/*
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* arch/sh/boards/mach-fldb/setup.c
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*
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* Copyright (C) 2010-2011 STMicroelectronics Limited
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* Author: Pawel Moll <pawel.moll@st.com>
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* STMicroelectronics Freeman Lite Development Board support.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/phy.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/physmap.h>
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#include <linux/stm/emi.h>
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#include <linux/stm/platform.h>
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#include <linux/stm/fli7510.h>
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#include <linux/stm/pci-glue.h>
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#include <asm/irq-ilc.h>
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#include <sound/stm.h>
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#define FLDB_PIO_RESET_OUTN stm_gpio(11, 6)
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#define FLDB_PIO_PCI_IDSEL stm_gpio(16, 2)
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#define FLDB_PIO_PCI_RESET stm_gpio(16, 5)
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static void __init fldb_setup(char **cmdline_p)
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{
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printk(KERN_INFO "STMicroelectronics Freeman Lite Development Board "
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"initialisation\n");
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fli7510_early_device_init();
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/* CNB1 ("UART 2" connector) */
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fli7510_configure_asc(1, &(struct fli7510_asc_config) {
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.hw_flow_control = 1,
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.is_console = 1, });
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/* CNB4 ("UART 3" connector) */
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fli7510_configure_asc(2, &(struct fli7510_asc_config) {
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.hw_flow_control = 0,
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.is_console = 0, });
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}
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static struct platform_device fldb_led_df1 = {
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.name = "leds-gpio",
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.id = -1,
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.dev.platform_data = &(struct gpio_led_platform_data) {
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.num_leds = 1,
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.leds = (struct gpio_led[]) {
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{
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.name = "DF1 orange",
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.default_trigger = "heartbeat",
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.gpio = stm_gpio(8, 5),
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},
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},
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},
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};
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static struct stmmac_mdio_bus_data stmmac_mdio_bus = {
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.bus_id = 0,
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.phy_mask = 0,
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};
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/* Serial Flash */
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static struct stm_plat_spifsm_data fldb_spifsm_flash = {
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.name = "m25px64",
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.nr_parts = 2,
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.parts = (struct mtd_partition []) {
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{
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.name = "Serial Flash 1",
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.size = 0x00080000,
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.offset = 0,
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}, {
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.name = "Serial Flash 2",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_NXTBLK,
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},
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},
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};
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/* NAND Flash */
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static struct stm_nand_bank_data fldb_nand_flash = {
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.csn = 1, /* updated in fldb_device_init() */
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.options = NAND_NO_AUTOINCR | NAND_USE_FLASH_BBT,
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.nr_partitions = 2,
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.partitions = (struct mtd_partition []) {
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{
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.name = "NAND Flash 1",
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.offset = 0,
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.size = 0x00800000
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}, {
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.name = "NAND Flash 2",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL
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},
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},
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.timing_data = &(struct stm_nand_timing_data) {
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.sig_setup = 50, /* times in ns */
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.sig_hold = 50,
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.CE_deassert = 0,
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.WE_to_RBn = 100,
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.wr_on = 10,
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.wr_off = 40,
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.rd_on = 10,
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.rd_off = 40,
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.chip_delay = 30, /* in us */
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},
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};
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/* NOR Flash */
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static struct platform_device fldb_nor_flash = {
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.name = "physmap-flash",
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.id = -1,
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.num_resources = 1,
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.resource = (struct resource[]) {
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{ /* updated in fldb_device_init() */
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.start = 0x00000000,
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.end = 32*1024*1024 - 1,
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.flags = IORESOURCE_MEM,
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}
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},
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.dev.platform_data = &(struct physmap_flash_data) {
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.width = 2,
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.set_vpp = NULL,
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.nr_parts = 3,
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.parts = (struct mtd_partition []) {
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{
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.name = "NOR Flash 1",
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.size = 0x00080000,
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.offset = 0x00000000,
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}, {
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.name = "NOR Flash 2",
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.size = 0x00200000,
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.offset = MTDPART_OFS_NXTBLK,
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}, {
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.name = "NOR Flash 3",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_NXTBLK,
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}
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},
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},
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};
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static struct platform_device *fldb_devices[] __initdata = {
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&fldb_led_df1,
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&fldb_nor_flash,
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};
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static struct stm_plat_pci_config fldb_pci_config = {
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.pci_irq = {
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[0] = PCI_PIN_DEFAULT,
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[1] = PCI_PIN_DEFAULT,
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[2] = PCI_PIN_UNUSED,
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[3] = PCI_PIN_UNUSED
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},
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.serr_irq = PCI_PIN_UNUSED,
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.idsel_lo = 30,
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.idsel_hi = 30,
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.req_gnt = {
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[0] = PCI_PIN_DEFAULT,
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[1] = PCI_PIN_UNUSED,
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[2] = PCI_PIN_UNUSED,
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[3] = PCI_PIN_UNUSED
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},
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.pci_clk = 33333333,
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.pci_reset_gpio = FLDB_PIO_PCI_RESET,
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};
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int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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/* We can use the standard function on this board */
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return fli7510_pcibios_map_platform_irq(&fldb_pci_config, pin);
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}
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static int __init fldb_device_init(void)
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{
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struct sysconf_field *sc;
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unsigned long nor_bank_base = 0;
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unsigned long nor_bank_size = 0;
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/* Configure Flash according to boot device */
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sc = sysconf_claim(CFG_MODE_PIN_STATUS, 7, 8, "boot_device");
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switch (sysconf_read(sc)) {
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case 0x0:
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pr_info("Configuring Flash for boot-from-NOR\n");
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nor_bank_base = emi_bank_base(0);
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nor_bank_size = emi_bank_base(1) - nor_bank_base;
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fldb_nand_flash.csn = 1;
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break;
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case 0x1:
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pr_info("Configuring Flash for boot-from-NAND\n");
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nor_bank_base = emi_bank_base(1);
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nor_bank_size = emi_bank_base(2) - nor_bank_base;
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fldb_nand_flash.csn = 0;
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break;
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case 0x2:
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pr_info("Configuring Flash for boot-from-SPI\n");
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nor_bank_base = emi_bank_base(1);
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nor_bank_size = emi_bank_base(2) - nor_bank_base;
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fldb_nand_flash.csn = 0;
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break;
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default:
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BUG();
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break;
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}
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sysconf_release(sc);
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/* Update NOR Flash base address and size: */
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/* - limit bank size to 64MB (some targetpacks define 128MB!) */
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if (nor_bank_size > 64*1024*1024)
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nor_bank_size = 64*1024*1024;
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/* - reduce visibility of NOR flash to EMI bank size */
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if (fldb_nor_flash.resource[0].end > nor_bank_size - 1)
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fldb_nor_flash.resource[0].end = nor_bank_size - 1;
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/* - update resource parameters */
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fldb_nor_flash.resource[0].start += nor_bank_base;
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fldb_nor_flash.resource[0].end += nor_bank_base;
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/* This is a board-level reset line, which goes to the
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* Ethernet PHY, audio amps & number of extension connectors */
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if (gpio_request(FLDB_PIO_RESET_OUTN, "RESET_OUTN") == 0) {
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gpio_direction_output(FLDB_PIO_RESET_OUTN, 0);
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udelay(10000); /* 10ms is the Ethernet PHY requirement */
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gpio_set_value(FLDB_PIO_RESET_OUTN, 1);
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} else {
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printk(KERN_ERR "fldb: Failed to claim RESET_OUTN PIO!\n");
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}
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/* The IDSEL line is connected to PIO16.2 only... Luckily
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* there is just one slot, so we can just force 1... */
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if (gpio_request(FLDB_PIO_PCI_IDSEL, "PCI_IDSEL") == 0)
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gpio_direction_output(FLDB_PIO_PCI_IDSEL, 1);
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else
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printk(KERN_ERR "fldb: Failed to claim PCI_IDSEL PIO!\n");
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/* And finally! */
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fli7510_configure_pci(&fldb_pci_config);
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fli7510_configure_pwm(&(struct fli7510_pwm_config) {
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.out0_enabled = 1,
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#if 0
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/* Connected to DF1 LED, currently used as a
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* GPIO-controlled one (see above) */
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.out1_enabled = 1,
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#endif
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#if 0
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/* PWM driver doesn't support these yet... */
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.out2_enabled = 1,
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.out3_enabled = 1,
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#endif
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});
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/* CNB2 ("I2C1" connector), CNJ2 ("FE Board" connector) */
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fli7510_configure_ssc_i2c(0);
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/* CNB3 ("I2C2" connector), UB2 (EEPROM), UH4 (STM8 uC),
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* CNJ2 ("FE Board" connector) */
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fli7510_configure_ssc_i2c(1);
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/* CNB5 ("I2C3" connector), CNF3 ("LVDS Out C and D" connector),
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* CNL1 ("Extension Board" connector) */
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fli7510_configure_ssc_i2c(2);
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/* CNK4 ("VGA In" connector), UK1 (EEPROM) */
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fli7510_configure_ssc_i2c(3);
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/* Leave SSC4 unconfigured, using SPI-FSM for Serial Flash */
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fli7510_configure_spifsm(&fldb_spifsm_flash);
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fli7510_configure_nand(&(struct stm_nand_config) {
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.driver = stm_nand_flex,
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.nr_banks = 1,
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.banks = &fldb_nand_flash,
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.rbn.flex_connected = 1,});
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fli7510_configure_usb(0, &(struct fli7510_usb_config) {
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.ovrcur_mode = fli7510_usb_ovrcur_active_low, });
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fli7510_configure_ethernet(&(struct fli7510_ethernet_config) {
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.mode = fli7510_ethernet_mode_mii,
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.ext_clk = 0,
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.phy_bus = 0,
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.phy_addr = 1,
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.mdio_bus_data = &stmmac_mdio_bus,
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});
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fli7510_configure_lirc();
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/*
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* To use the MMC/SD card with the external
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* CNG6 connector, the CNG4 has to be connected to CNG3.
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*/
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fli7510_configure_mmc();
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fli7510_configure_audio(&(struct fli7510_audio_config) {
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.pcm_player_0_output_mode =
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fli7510_pcm_player_0_output_8_channels,
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.spdif_player_output_enabled = 1, });
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return platform_add_devices(fldb_devices,
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ARRAY_SIZE(fldb_devices));
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}
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arch_initcall(fldb_device_init);
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static void __iomem *fldb_ioport_map(unsigned long port, unsigned int size)
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{
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/* If we have PCI then this should never be called because we
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* are using the generic iomap implementation. If we don't
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* have PCI then there are no IO mapped devices, so it still
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* shouldn't be called. */
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BUG();
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return (void __iomem *)CCN_PVR;
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}
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struct sh_machine_vector mv_fldb __initmv = {
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.mv_name = "fldb",
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.mv_setup = fldb_setup,
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.mv_nr_irqs = NR_IRQS,
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.mv_ioport_map = fldb_ioport_map,
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STM_PCI_IO_MACHINE_VEC
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};
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