123 lines
3.7 KiB
C
123 lines
3.7 KiB
C
/*
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* Copyright 2006-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
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#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
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#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
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#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
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#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
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#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
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#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
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#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
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#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
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#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
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#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
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#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
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#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
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#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
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#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
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#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
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#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
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#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
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#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
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#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
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#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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# define CONFIG_SERIAL_BFIN_CTSRTS
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# ifndef CONFIG_UART0_CTS_PIN
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# define CONFIG_UART0_CTS_PIN -1
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# endif
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# ifndef CONFIG_UART0_RTS_PIN
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# define CONFIG_UART0_RTS_PIN -1
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# endif
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#endif
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#define BFIN_UART_TX_FIFO_SIZE 2
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struct bfin_serial_port {
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struct uart_port port;
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unsigned int old_status;
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int status_irq;
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unsigned int lsr;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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int tx_done;
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int tx_count;
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struct circ_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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struct work_struct tx_dma_workqueue;
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#else
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# if ANOMALY_05000363
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unsigned int anomaly_threshold;
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# endif
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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struct timer_list cts_timer;
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int cts_pin;
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int rts_pin;
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#endif
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};
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/* The hardware clears the LSR bits upon read, so we need to cache
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* some of the more fun bits in software so they don't get lost
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* when checking the LSR in other code paths (TX).
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*/
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static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
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{
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unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
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uart->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | uart->lsr;
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}
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static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
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{
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uart->lsr = 0;
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bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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}
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struct bfin_serial_res {
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unsigned long uart_base_addr;
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int uart_irq;
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int uart_status_irq;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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unsigned int uart_tx_dma_channel;
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unsigned int uart_rx_dma_channel;
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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int uart_cts_pin;
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int uart_rts_pin;
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#endif
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};
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struct bfin_serial_res bfin_serial_resource[] = {
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{
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0xFFC00400,
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IRQ_UART_RX,
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IRQ_UART_ERROR,
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#ifdef CONFIG_SERIAL_BFIN_DMA
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CH_UART_TX,
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CH_UART_RX,
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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}
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};
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#define DRIVER_NAME "bfin-uart"
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