719 lines
19 KiB
C
719 lines
19 KiB
C
/*
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* Copyright (C) 2004-2009 STMicroelectronics
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*
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* Author Angelo Castello <angelo.castello@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, wrssc to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Jul 2009 : Ported for kernel 2.6.30. Removed any deprecated istances.
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* angelo.castello@st.com
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*/
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#include <linux/i2c.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/stm/pio.h>
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#include <linux/delay.h>
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/* General debugging */
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#undef M41ST85Y_DEBUG
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#ifdef M41ST85Y_DEBUG
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#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
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#else
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#define DPRINTK(fmt, args...)
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#endif
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#define M41ST85Y_NAME "m41st85y"
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#define M41ST85Y_NREGMAP 0x14 /* no of RTC's registers */
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#define M41ST85Y_ADDR 0x68 /* MY41ST85Y slave address */
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#define M41ST85Y_ISOPEN 0x01 /* means /dev/rtc is in use */
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#define M41ST85Y_RD 0x01 /* read flag for a i2c transfer */
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#define M41ST85Y_WR 0x00 /* write flag for a i2c transfer */
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#define M41ST85Y_INVALID 0xff /* invalid value */
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#define M41ST85Y_IRQ_LEVEL 0x01 /* default value. 1=High, 0=Low */
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#define M41ST85Y_SQW_LEVEL 0x00 /* default value. 1=High, 0=Low */
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#define M41ST85Y_NOBUS 0x03 /* number of I2C busses */
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/*
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* Addressing compliante to SPI PIO address mechanism
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* Address = [7:Not used:7][6:PIO-Port:3][2:PIO-Pin:0]
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* Ex: PIO0[7] = 0x07, PIO2[5] = 0x15
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*/
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#define m41st85y_get_pioport(address) ((address >> 0x03) & 0x0f)
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#define m41st85y_get_piopin(address) (address & 0x07)
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/* Addresses to scan: none. This chip cannot be detected. */
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static unsigned short normal_i2c[] = { M41ST85Y_ADDR, I2C_CLIENT_END };
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/* Insmod parameters */
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I2C_CLIENT_INSMOD;
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/* private data */
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struct m41st85y_s {
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struct rtc_device *rtc;
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struct i2c_adapter *adapter;
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unsigned long status;
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unsigned long epoch; /* default linux epoch 1900 */
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struct stpio_pin *irqpio; /* PIO used as RTC-IRQ line */
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struct stpio_pin *sqwpio; /* PIO used as RTC-SWQ line */
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unsigned int cmd;
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} m41st85y;
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static __u8 rbuf[M41ST85Y_NREGMAP];
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static __u8 wbuf[M41ST85Y_NREGMAP];
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static __u32 busid = M41ST85Y_NOBUS;
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static __u32 irqpio = CONFIG_RTC_DRV_M41ST85Y_IRQPIO /* Ex: 0x07 */ ,
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sqwpio = CONFIG_RTC_DRV_M41ST85Y_SQWPIO /* Ex: 0x0F */ ;
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static int m41st85y_transfer(struct m41st85y_s *instance,
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__u8 * buf, __u8 len, __u8 oper, __u8 at_addr)
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{
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struct i2c_msg msg[2];
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__u8 n_msg;
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int err = 0;
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if (oper == M41ST85Y_WR) {
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/* perform write request */
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msg[0].addr = M41ST85Y_ADDR;
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msg[0].flags = oper;
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msg[0].len = len;
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msg[0].buf = buf;
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n_msg = 1;
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} else {
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/* perform read request */
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rbuf[0] = at_addr;
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msg[0].addr = M41ST85Y_ADDR;
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msg[0].flags = M41ST85Y_WR;
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msg[0].len = 1;
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msg[0].buf = rbuf;
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msg[1].addr = M41ST85Y_ADDR;
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msg[1].flags = M41ST85Y_RD;
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msg[1].len = len;
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msg[1].buf = buf;
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n_msg = 2;
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}
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if ((err = i2c_transfer(instance->adapter, msg, n_msg)) != n_msg)
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(oper == M41ST85Y_WR) ?
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printk(KERN_ERR "m41st85y: I2C write failed, err %d\n",
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err) : printk(KERN_ERR
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"m41st85y: I2C read failed, err %d\n",
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err);
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return err;
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}
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static int m41st85y_power_up(void)
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{
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__u8 RegsMap[M41ST85Y_NREGMAP];
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int err = 0;
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while (1) {
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m41st85y_transfer(&m41st85y, rbuf, 1, M41ST85Y_RD, 0x0F);
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if ((rbuf[0] & 0x40) == 0x00)
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break;
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printk(KERN_INFO
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"m41st85y: There was an alarm during the back-up mode AF 0x%x\n",
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rbuf[0]);
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}
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if ((err = m41st85y_transfer(&m41st85y,
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RegsMap + 1, M41ST85Y_NREGMAP - 1,
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M41ST85Y_RD, 0x01)) >= 0) {
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RegsMap[0x00] = 0x01; /* address offset */
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RegsMap[0x01] &= ~0x80; /* ST bit, wake up the oscillator */
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RegsMap[0x08] = 0x80; /* IRQ/FT/OUT line is driven low */
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RegsMap[0x0A] &= ~0x40; /* Swq disable */
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RegsMap[0x0C] &= ~0x40; /* Update the TIMEKEEPER registers */
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RegsMap[0x13] &= 0x00; /* Default Square wave output is 1Hz */
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/* also irq_freq should be setting up 1Hz at init fase */
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if ((err = m41st85y_transfer(&m41st85y,
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RegsMap, M41ST85Y_NREGMAP,
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M41ST85Y_WR,
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M41ST85Y_INVALID)) >= 0) {
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/* waiting RTC hardware restart */
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ssleep(1);
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return 0;
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}
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}
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return err;
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}
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void m41st85y_handler(struct stpio_pin *pin, void *dev)
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{
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struct m41st85y_s *instance = dev;
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__u8 skip = 0, events = 0;
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stpio_disable_irq(pin);
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if ((instance->cmd == RTC_PIE_ON) || (instance->cmd == RTC_UIE_ON)) {
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if (stpio_get_pin(pin) == M41ST85Y_IRQ_LEVEL) {
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skip = 1;
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stpio_enable_irq(pin, M41ST85Y_IRQ_LEVEL);
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} else
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stpio_enable_irq(pin, !M41ST85Y_IRQ_LEVEL);
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}
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if (!skip) {
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events |= RTC_IRQF;
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rtc_update_irq(instance->rtc, 1, events);
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}
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}
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static int m41st85y_read_time(struct device *dev, struct rtc_time *time_read)
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{
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if (time_read == NULL)
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return -EIO;
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memset(time_read, 0, sizeof(struct rtc_time));
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if (m41st85y_transfer(&m41st85y, rbuf, 9, M41ST85Y_RD, 0x00) >= 0) {
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time_read->tm_sec = bcd2bin(rbuf[1] & 0x7f);
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time_read->tm_min = bcd2bin(rbuf[2] & 0x7f);
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time_read->tm_hour = bcd2bin(rbuf[3] & 0x3f);
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time_read->tm_wday = bcd2bin(rbuf[4] & 0x07);
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time_read->tm_mday = bcd2bin(rbuf[5] & 0x3f);
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time_read->tm_mon = bcd2bin(rbuf[6] & 0x1f);
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time_read->tm_year = bcd2bin(rbuf[7]);
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return 0;
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}
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return -EIO;
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}
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static int m41st85y_alarmset(struct device *dev,
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unsigned int ioctl_cmd, struct rtc_time *ltime)
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{
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/* to be sure that incoming ioctl request can be managed
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by this */
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if ((ioctl_cmd != RTC_UIE_ON) && (ioctl_cmd != RTC_ALM_SET))
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return -1;
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if (ioctl_cmd == RTC_UIE_ON) {
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m41st85y_read_time(dev, ltime);
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/* alarm update */
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wbuf[0] = 0x0A;
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wbuf[1] = bin2bcd(ltime->tm_mon);
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wbuf[2] = 0xC0 | bin2bcd(ltime->tm_mday);
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wbuf[3] = 0x80 | bin2bcd(ltime->tm_hour);
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wbuf[4] = 0x80 | bin2bcd(ltime->tm_min);
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wbuf[5] = 0x80 | bin2bcd(ltime->tm_sec + 1);
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if (m41st85y_transfer(&m41st85y,
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wbuf, 6, M41ST85Y_WR,
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M41ST85Y_INVALID) >= 0) {
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wbuf[0] = 0x0A;
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wbuf[1] = (wbuf[1] | 0x80);
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DPRINTK("enable AFE writing %#x\n", wbuf[1]);
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if (m41st85y_transfer(&m41st85y,
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wbuf, 2, M41ST85Y_WR,
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M41ST85Y_INVALID) >= 0)
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return 0;
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}
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} else {
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if (m41st85y_transfer(&m41st85y,
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rbuf, 6, M41ST85Y_RD, 0x0A) >= 0) {
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/* alarm update */
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wbuf[0] = 0x0A;
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wbuf[1] = (rbuf[0] & 0xE0) | bin2bcd(ltime->tm_mon);
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wbuf[2] = (rbuf[1] & 0xC0) | bin2bcd(ltime->tm_mday);
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wbuf[3] = (rbuf[2] & 0xC0) | bin2bcd(ltime->tm_hour);
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wbuf[4] = (rbuf[3] & 0x80) | bin2bcd(ltime->tm_min);
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wbuf[5] = (rbuf[4] & 0x80) | bin2bcd(ltime->tm_sec);
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DPRINTK("writing alarm date\n");
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if (m41st85y_transfer(&m41st85y,
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wbuf, 6, M41ST85Y_WR,
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M41ST85Y_INVALID) >= 0)
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return 0;
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}
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}
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return -EIO;
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}
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static int m41st85y_open(struct device *dev)
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{
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/* locked at top level until the device will be
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release */
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if (m41st85y.status & M41ST85Y_ISOPEN) {
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return -EBUSY;
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}
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m41st85y.status |= M41ST85Y_ISOPEN;
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return 0;
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}
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static void m41st85y_release(struct device *dev)
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{
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m41st85y.status &= ~M41ST85Y_ISOPEN;
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/* unlocked at top level before to be use it again */
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}
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static int m41st85y_set_time(struct device *dev, struct rtc_time *time_to_write)
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{
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int err;
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/* this is already part of mutex area performed at top level */
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if ((err = m41st85y_transfer(&m41st85y,
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rbuf, 8, M41ST85Y_RD, 0x00)) >= 0) {
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/* time update */
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wbuf[0] = 0x00;
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wbuf[1] = 0x00;
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wbuf[2] = (rbuf[1] & 0x80) | bin2bcd(time_to_write->tm_sec);
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wbuf[3] = (rbuf[2] & 0x80) | bin2bcd(time_to_write->tm_min);
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wbuf[4] = (rbuf[3] & 0xC0) | bin2bcd(time_to_write->tm_hour);
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memcpy(&wbuf[5], &rbuf[4], sizeof(char));
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wbuf[6] = (rbuf[5] & 0xC0) | bin2bcd(time_to_write->tm_mday);
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wbuf[7] = (rbuf[6] & 0xE0) | bin2bcd(time_to_write->tm_mon);
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wbuf[8] = bin2bcd((time_to_write->tm_year - m41st85y.epoch));
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err = m41st85y_transfer(&m41st85y,
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wbuf, 9, M41ST85Y_WR, M41ST85Y_INVALID);
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}
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return err;
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}
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static int m41st85y_read_alarm(struct device *dev,
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struct rtc_wkalrm *alarm_read)
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{
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int err = 0;
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if (alarm_read != NULL) {
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if ((err = m41st85y_transfer(&m41st85y,
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rbuf, 6, M41ST85Y_RD, 0x0A)) >= 0)
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{
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alarm_read->time.tm_mon = bcd2bin(rbuf[0] & 0x1f);
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alarm_read->time.tm_mday = bcd2bin(rbuf[1] & 0x3f);
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alarm_read->time.tm_hour = bcd2bin(rbuf[2] & 0x3f);
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alarm_read->time.tm_min = bcd2bin(rbuf[3] & 0x7f);
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alarm_read->time.tm_sec = bcd2bin(rbuf[4] & 0x7f);
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}
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} else
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err = -EIO;
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return err;
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}
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static int m41st85y_set_alarm(struct device *dev,
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struct rtc_wkalrm *alarm_to_write)
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{
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return m41st85y_alarmset(dev, RTC_ALM_SET, &alarm_to_write->time);
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}
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static int m41st85y_ioctl(struct device *dev, unsigned int cmd,
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unsigned long arg)
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{
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struct rtc_time ltime;
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int err = 0;
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memset(<ime, 0, sizeof(struct rtc_time));
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m41st85y.cmd = cmd;
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switch (cmd) {
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case RTC_UIE_OFF: /* Mask ints from RTC updates. */
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case RTC_AIE_OFF: /* Mask alarm int. enab. bit */
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case RTC_AIE_ON: /* Allow alarm interrupts. */
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{
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/* reading AFE bits */
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if (m41st85y_transfer(&m41st85y,
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rbuf, 1, M41ST85Y_RD, 0x0A) >= 0)
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{
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char n_data = 2;
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wbuf[0] = 0x0A;
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if (cmd == RTC_AIE_ON) {
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stpio_enable_irq(m41st85y.irqpio,
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M41ST85Y_IRQ_LEVEL);
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wbuf[1] = (rbuf[0] | 0x80);
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} else {
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stpio_disable_irq(m41st85y.irqpio);
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m41st85y.cmd = 0; /* disable status */
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n_data = 6;
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wbuf[1] = (rbuf[0] & ~0xA0); /* disabling AFE flag bit */
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wbuf[2] = wbuf[3] = wbuf[4] = wbuf[5] = 0x00; /* disabling RPT5-RPT1 */
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}
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DPRINTK("writing AFE %#x\n", wbuf[1]);
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if (m41st85y_transfer(&m41st85y,
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wbuf, n_data, M41ST85Y_WR,
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M41ST85Y_INVALID) >= 0) {
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return 0;
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}
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}
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return -EIO;
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}
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case RTC_PIE_OFF: /* Mask periodic int. enab. bit */
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case RTC_PIE_ON: /* Allow periodic ints */
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{
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if (m41st85y_transfer(&m41st85y,
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rbuf, 1, M41ST85Y_RD, 0x0A) >= 0)
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{
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wbuf[0] = 0x0A;
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if (cmd == RTC_PIE_OFF) {
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stpio_disable_irq(m41st85y.sqwpio);
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wbuf[1] = (rbuf[0] & ~0x40);
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} else {
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stpio_enable_irq(m41st85y.sqwpio,
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M41ST85Y_SQW_LEVEL);
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wbuf[1] = (rbuf[0] | 0x40);
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}
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DPRINTK("writing on SWQE %#x\n", wbuf[1]);
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if (m41st85y_transfer(&m41st85y,
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wbuf, 2, M41ST85Y_WR,
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M41ST85Y_INVALID) >= 0)
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return 0;
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}
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return -EIO;
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}
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case RTC_UIE_ON: /* Allow ints for RTC updates. (one per second) */
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{
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stpio_enable_irq(m41st85y.irqpio, M41ST85Y_IRQ_LEVEL);
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return m41st85y_alarmset(dev, cmd, <ime);
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}
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case RTC_ALM_READ: /* Read the present alarm time */
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{
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struct rtc_wkalrm alarm_read;
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if ((err = m41st85y_read_alarm(NULL, &alarm_read)) >= 0)
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return copy_to_user((void __user *)arg,
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&alarm_read.time,
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sizeof alarm_read.time) ?
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-EFAULT : 0;
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return err;
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}
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case RTC_ALM_SET: /* Store a time into the alarm */
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{
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if (copy_from_user
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(<ime, (struct rtc_time __user *)arg,
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sizeof ltime))
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return -EFAULT;
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return m41st85y_alarmset(dev, cmd, <ime);
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}
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case RTC_RD_TIME: /* Read the time/date from RTC */
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{
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m41st85y_read_time(dev, <ime);
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return copy_to_user((void __user *)arg,
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<ime, sizeof ltime) ? -EFAULT : 0;
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}
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case RTC_SET_TIME: /* Set the RTC */
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{
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if (copy_from_user
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(<ime, (struct rtc_time __user *)arg,
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sizeof ltime))
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return -EFAULT;
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return m41st85y_set_time(dev, <ime);
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}
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case RTC_IRQP_READ: /* Read the periodic IRQ rate. */
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{
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return put_user(m41st85y.rtc->irq_freq,
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(unsigned long __user *)arg);
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}
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case RTC_IRQP_SET: /* Set periodic IRQ rate. */
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{
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wbuf[0] = 0x13;
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switch (arg) {
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case 0:
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wbuf[1] = 0x00;
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break;
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case 1:
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wbuf[1] = 0xF0;
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break;
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case 2:
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wbuf[1] = 0xE0;
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break;
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case 4:
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wbuf[1] = 0xD0;
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break;
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case 8:
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wbuf[1] = 0xC0;
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break;
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case 16:
|
|
wbuf[1] = 0xB0;
|
|
break;
|
|
case 32:
|
|
wbuf[1] = 0xA0;
|
|
break;
|
|
case 64:
|
|
wbuf[1] = 0x90;
|
|
break;
|
|
case 128:
|
|
wbuf[1] = 0x80;
|
|
break;
|
|
case 256:
|
|
wbuf[1] = 0x70;
|
|
break;
|
|
case 512:
|
|
wbuf[1] = 0x60;
|
|
break;
|
|
case 1024:
|
|
wbuf[1] = 0x50;
|
|
break;
|
|
case 2048:
|
|
wbuf[1] = 0x40;
|
|
break;
|
|
case 4096:
|
|
wbuf[1] = 0x30;
|
|
break;
|
|
case 8192:
|
|
wbuf[1] = 0x20;
|
|
break;
|
|
default:
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
if ((err = m41st85y_transfer(&m41st85y,
|
|
wbuf, 2, M41ST85Y_WR,
|
|
M41ST85Y_INVALID)) >= 0) {
|
|
m41st85y.rtc->irq_freq = arg;
|
|
return 0;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
case RTC_EPOCH_READ: /* Read the epoch. */
|
|
{
|
|
return put_user(m41st85y.epoch,
|
|
(unsigned long __user *)arg);
|
|
}
|
|
case RTC_EPOCH_SET: /* Set the epoch. */
|
|
{
|
|
copy_from_user(&m41st85y.epoch, (void *)arg,
|
|
sizeof(long));
|
|
return 0;
|
|
}
|
|
default:
|
|
return -ENOTTY;
|
|
}
|
|
}
|
|
|
|
static int m41st85y_read_callback(struct device *dev, int data)
|
|
{
|
|
if (data & RTC_IRQF) {
|
|
if ((m41st85y.cmd == RTC_AIE_ON)
|
|
|| (m41st85y.cmd == RTC_UIE_ON)) {
|
|
while (1) {
|
|
m41st85y_transfer(&m41st85y,
|
|
rbuf, 1, M41ST85Y_RD, 0x0F);
|
|
|
|
DPRINTK("AF 0x%x\n", rbuf[0]);
|
|
if ((rbuf[0] & 0x40) == 0x00)
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
return data;
|
|
}
|
|
|
|
static int m41st85y_irq_set_state(struct device *dev, int enabled)
|
|
{
|
|
if (enabled)
|
|
return m41st85y_ioctl(dev, RTC_PIE_ON, 0);
|
|
else
|
|
return m41st85y_ioctl(dev, RTC_PIE_OFF, 0);
|
|
}
|
|
|
|
static int m41st85y_irq_set_freq(struct device *dev, int freq)
|
|
{
|
|
return m41st85y_ioctl(dev, RTC_IRQP_SET, freq);
|
|
}
|
|
|
|
static struct rtc_class_ops m41st85y_rtc_ops = {
|
|
.open = m41st85y_open,
|
|
.release = m41st85y_release,
|
|
.ioctl = m41st85y_ioctl,
|
|
.read_time = m41st85y_read_time,
|
|
.set_time = m41st85y_set_time,
|
|
.read_alarm = m41st85y_read_alarm,
|
|
.set_alarm = m41st85y_set_alarm,
|
|
.irq_set_state = m41st85y_irq_set_state,
|
|
.irq_set_freq = m41st85y_irq_set_freq,
|
|
.read_callback = m41st85y_read_callback,
|
|
|
|
};
|
|
|
|
static int m41st85y_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
|
|
printk(KERN_ERR "m41st85y: functionality I2C unsupported\n");
|
|
return -ENODEV;
|
|
}
|
|
if (m41st85y_power_up() >= 0) {
|
|
|
|
m41st85y.rtc =
|
|
rtc_device_register(M41ST85Y_NAME,
|
|
&client->dev, &m41st85y_rtc_ops,
|
|
THIS_MODULE);
|
|
if (IS_ERR(m41st85y.rtc)) {
|
|
printk(KERN_ERR
|
|
"m41st85y: RTC dev register failure.\n");
|
|
return PTR_ERR(m41st85y.rtc);
|
|
}
|
|
|
|
m41st85y.adapter = client->adapter;
|
|
m41st85y.cmd = 0; /* none */
|
|
m41st85y.epoch = 1900; /* default value on Linux */
|
|
m41st85y.rtc->irq_freq = 1; /* default square ware 1Hz */
|
|
printk(KERN_INFO
|
|
"m41st85y: IRQ line plugged on PIO%d[%d]\n",
|
|
m41st85y_get_pioport(irqpio),
|
|
m41st85y_get_piopin(irqpio));
|
|
printk(KERN_INFO
|
|
"m41st85y: SQW line plugged on PIO%d[%d]\n",
|
|
m41st85y_get_pioport(sqwpio),
|
|
m41st85y_get_piopin(sqwpio));
|
|
|
|
if ((m41st85y.irqpio =
|
|
stpio_request_pin(m41st85y_get_pioport(irqpio),
|
|
m41st85y_get_piopin(irqpio),
|
|
M41ST85Y_NAME,
|
|
STPIO_BIDIR_Z1)) != NULL) {
|
|
if ((m41st85y.sqwpio =
|
|
stpio_request_pin(m41st85y_get_pioport(sqwpio),
|
|
m41st85y_get_piopin(sqwpio),
|
|
M41ST85Y_NAME,
|
|
STPIO_IN)) != NULL) {
|
|
stpio_flagged_request_irq(m41st85y.irqpio,
|
|
M41ST85Y_IRQ_LEVEL,
|
|
m41st85y_handler,
|
|
(void *)&m41st85y, 0);
|
|
stpio_flagged_request_irq(m41st85y.sqwpio,
|
|
M41ST85Y_SQW_LEVEL,
|
|
m41st85y_handler,
|
|
(void *)&m41st85y, 0);
|
|
i2c_set_clientdata(client, &m41st85y);
|
|
printk(KERN_INFO
|
|
"m41st85y: STMicroelectronics M41ST85Y RTC Driver registered\n");
|
|
return 0;
|
|
} else
|
|
stpio_free_pin(m41st85y.irqpio);
|
|
}
|
|
printk(KERN_ERR
|
|
"m41st85y: STMicroelectronics M41ST85Y RTC Driver unregistered\n");
|
|
}
|
|
return -EIO;
|
|
}
|
|
|
|
static int m41st85y_remove(struct i2c_client *client)
|
|
{
|
|
stpio_free_irq(m41st85y.irqpio);
|
|
stpio_free_irq(m41st85y.sqwpio);
|
|
rtc_device_unregister(m41st85y.rtc);
|
|
return 0;
|
|
}
|
|
|
|
static struct i2c_device_id m41st85y_id[] = {
|
|
{M41ST85Y_NAME, 0},
|
|
{}
|
|
};
|
|
|
|
static struct i2c_driver m41st85y_driver = {
|
|
.driver.name = M41ST85Y_NAME,
|
|
.probe = m41st85y_probe,
|
|
.remove = m41st85y_remove,
|
|
.id_table = m41st85y_id
|
|
};
|
|
|
|
static __init int m41st85y_init(void)
|
|
{
|
|
return i2c_add_driver(&m41st85y_driver);
|
|
}
|
|
|
|
static __exit void m41st85y_exit(void)
|
|
{
|
|
i2c_del_driver(&m41st85y_driver);
|
|
}
|
|
|
|
EXPORT_SYMBOL(rtc_register);
|
|
EXPORT_SYMBOL(rtc_unregister);
|
|
EXPORT_SYMBOL(rtc_control);
|
|
|
|
int rtc_register(rtc_task_t * task)
|
|
{
|
|
if (task == NULL || task->func == NULL)
|
|
return -EINVAL;
|
|
spin_lock_irq(&m41st85y.rtc->irq_lock);
|
|
if (m41st85y.status & M41ST85Y_ISOPEN) {
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return -EBUSY;
|
|
}
|
|
spin_lock(&m41st85y.rtc->irq_task_lock);
|
|
if (m41st85y.rtc->irq_task) {
|
|
spin_unlock(&m41st85y.rtc->irq_task_lock);
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return -EBUSY;
|
|
}
|
|
|
|
m41st85y.status |= M41ST85Y_ISOPEN;
|
|
m41st85y.rtc->irq_task = task;
|
|
spin_unlock(&m41st85y.rtc->irq_task_lock);
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return 0;
|
|
}
|
|
|
|
int rtc_control(rtc_task_t * task, unsigned int cmd, unsigned long arg)
|
|
{
|
|
spin_lock_irq(&m41st85y.rtc->irq_task_lock);
|
|
if (m41st85y.rtc->irq_task != task) {
|
|
spin_unlock_irq(&m41st85y.rtc->irq_task_lock);
|
|
return -ENXIO;
|
|
}
|
|
spin_unlock_irq(&m41st85y.rtc->irq_task_lock);
|
|
return m41st85y_ioctl(NULL, cmd, arg);
|
|
}
|
|
|
|
int rtc_unregister(rtc_task_t * task)
|
|
{
|
|
spin_lock_irq(&m41st85y.rtc->irq_lock);
|
|
spin_lock(&m41st85y.rtc->irq_task_lock);
|
|
|
|
if (m41st85y.rtc->irq_task != task) {
|
|
spin_unlock(&m41st85y.rtc->irq_task_lock);
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return -ENXIO;
|
|
}
|
|
m41st85y.rtc->irq_task = NULL;
|
|
|
|
/* diasbilng the RTC's AIE, UIE and PIE control */
|
|
if (m41st85y_transfer(&m41st85y, rbuf, 1, M41ST85Y_RD, 0x0A) >= 0) {
|
|
wbuf[0] = 0x0A;
|
|
wbuf[1] = rbuf[0] & ~0xC0;
|
|
if (m41st85y_transfer(&m41st85y,
|
|
wbuf, 2, M41ST85Y_WR,
|
|
M41ST85Y_INVALID) >= 0) {
|
|
m41st85y.status &= ~M41ST85Y_ISOPEN;
|
|
spin_unlock(&m41st85y.rtc->irq_task_lock);
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
spin_unlock(&m41st85y.rtc->irq_task_lock);
|
|
spin_unlock_irq(&m41st85y.rtc->irq_lock);
|
|
return -EIO;
|
|
}
|
|
|
|
module_param(busid, uint, 0644);
|
|
module_param(irqpio, uint, 0644);
|
|
module_param(sqwpio, uint, 0644);
|
|
module_init(m41st85y_init);
|
|
module_exit(m41st85y_exit);
|
|
MODULE_AUTHOR("angelo castello <angelo.castello@st.com>");
|
|
MODULE_PARM_DESC(busid, "I2C bus ID");
|
|
MODULE_PARM_DESC(irqpio, "PIO port/pin for RTC-IRQ line");
|
|
MODULE_PARM_DESC(busid, "PIO port/pin for RTC-SWQ line");
|
|
MODULE_DESCRIPTION("External RTC upon I2C");
|
|
MODULE_LICENSE("GPL");
|