837 lines
22 KiB
C
837 lines
22 KiB
C
/*
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* ALSA driver for ICEnsemble VT1724 (Envy24HT)
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*
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* Lowlevel functions for Pontis MS300
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*
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* Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <asm/io.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <sound/core.h>
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#include <sound/info.h>
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#include <sound/tlv.h>
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#include "ice1712.h"
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#include "envy24ht.h"
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#include "pontis.h"
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/* I2C addresses */
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#define WM_DEV 0x34
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#define CS_DEV 0x20
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/* WM8776 registers */
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#define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
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#define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
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#define WM_HP_MASTER 0x02 /* headphone master (both channels) */
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/* override LLR */
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#define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
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#define WM_DAC_ATTEN_R 0x04
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#define WM_DAC_MASTER 0x05
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#define WM_PHASE_SWAP 0x06 /* DAC phase swap */
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#define WM_DAC_CTRL1 0x07
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#define WM_DAC_MUTE 0x08
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#define WM_DAC_CTRL2 0x09
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#define WM_DAC_INT 0x0a
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#define WM_ADC_INT 0x0b
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#define WM_MASTER_CTRL 0x0c
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#define WM_POWERDOWN 0x0d
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#define WM_ADC_ATTEN_L 0x0e
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#define WM_ADC_ATTEN_R 0x0f
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#define WM_ALC_CTRL1 0x10
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#define WM_ALC_CTRL2 0x11
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#define WM_ALC_CTRL3 0x12
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#define WM_NOISE_GATE 0x13
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#define WM_LIMITER 0x14
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#define WM_ADC_MUX 0x15
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#define WM_OUT_MUX 0x16
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#define WM_RESET 0x17
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/*
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* GPIO
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*/
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#define PONTIS_CS_CS (1<<4) /* CS */
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#define PONTIS_CS_CLK (1<<5) /* CLK */
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#define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
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#define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
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/*
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* get the current register value of WM codec
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*/
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static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
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{
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reg <<= 1;
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return ((unsigned short)ice->akm[0].images[reg] << 8) |
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ice->akm[0].images[reg + 1];
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}
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/*
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* set the register value of WM codec and remember it
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*/
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static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
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{
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unsigned short cval;
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cval = (reg << 9) | val;
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snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
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}
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static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
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{
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wm_put_nocache(ice, reg, val);
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reg <<= 1;
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ice->akm[0].images[reg] = val >> 8;
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ice->akm[0].images[reg + 1] = val;
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}
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/*
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* DAC volume attenuation mixer control (-64dB to 0dB)
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*/
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#define DAC_0dB 0xff
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#define DAC_RES 128
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#define DAC_MIN (DAC_0dB - DAC_RES)
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static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 2;
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uinfo->value.integer.min = 0; /* mute */
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uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
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return 0;
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}
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static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short val;
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int i;
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mutex_lock(&ice->gpio_mutex);
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for (i = 0; i < 2; i++) {
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val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
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val = val > DAC_MIN ? (val - DAC_MIN) : 0;
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ucontrol->value.integer.value[i] = val;
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}
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short oval, nval;
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int i, idx, change = 0;
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mutex_lock(&ice->gpio_mutex);
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for (i = 0; i < 2; i++) {
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nval = ucontrol->value.integer.value[i];
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nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
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idx = WM_DAC_ATTEN_L + i;
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oval = wm_get(ice, idx) & 0xff;
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if (oval != nval) {
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wm_put(ice, idx, nval);
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wm_put_nocache(ice, idx, nval | 0x100);
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change = 1;
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}
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* ADC gain mixer control (-64dB to 0dB)
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*/
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#define ADC_0dB 0xcf
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#define ADC_RES 128
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#define ADC_MIN (ADC_0dB - ADC_RES)
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static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 2;
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uinfo->value.integer.min = 0; /* mute (-64dB) */
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uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
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return 0;
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}
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static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short val;
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int i;
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mutex_lock(&ice->gpio_mutex);
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for (i = 0; i < 2; i++) {
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val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
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val = val > ADC_MIN ? (val - ADC_MIN) : 0;
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ucontrol->value.integer.value[i] = val;
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}
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short ovol, nvol;
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int i, idx, change = 0;
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mutex_lock(&ice->gpio_mutex);
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for (i = 0; i < 2; i++) {
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nvol = ucontrol->value.integer.value[i];
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nvol = nvol ? (nvol + ADC_MIN) : 0;
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idx = WM_ADC_ATTEN_L + i;
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ovol = wm_get(ice, idx) & 0xff;
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if (ovol != nvol) {
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wm_put(ice, idx, nvol);
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change = 1;
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}
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* ADC input mux mixer control
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*/
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#define wm_adc_mux_info snd_ctl_boolean_mono_info
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static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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int bit = kcontrol->private_value;
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mutex_lock(&ice->gpio_mutex);
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ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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int bit = kcontrol->private_value;
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unsigned short oval, nval;
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int change;
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mutex_lock(&ice->gpio_mutex);
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nval = oval = wm_get(ice, WM_ADC_MUX);
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if (ucontrol->value.integer.value[0])
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nval |= (1 << bit);
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else
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nval &= ~(1 << bit);
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change = nval != oval;
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if (change) {
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wm_put(ice, WM_ADC_MUX, nval);
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* Analog bypass (In -> Out)
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*/
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#define wm_bypass_info snd_ctl_boolean_mono_info
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static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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mutex_lock(&ice->gpio_mutex);
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ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short val, oval;
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int change = 0;
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mutex_lock(&ice->gpio_mutex);
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val = oval = wm_get(ice, WM_OUT_MUX);
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if (ucontrol->value.integer.value[0])
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val |= 0x04;
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else
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val &= ~0x04;
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if (val != oval) {
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wm_put(ice, WM_OUT_MUX, val);
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change = 1;
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* Left/Right swap
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*/
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#define wm_chswap_info snd_ctl_boolean_mono_info
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static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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mutex_lock(&ice->gpio_mutex);
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ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned short val, oval;
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int change = 0;
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mutex_lock(&ice->gpio_mutex);
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oval = wm_get(ice, WM_DAC_CTRL1);
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val = oval & 0x0f;
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if (ucontrol->value.integer.value[0])
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val |= 0x60;
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else
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val |= 0x90;
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if (val != oval) {
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wm_put(ice, WM_DAC_CTRL1, val);
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wm_put_nocache(ice, WM_DAC_CTRL1, val);
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change = 1;
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* write data in the SPI mode
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*/
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static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
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{
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unsigned int tmp = snd_ice1712_gpio_read(ice);
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if (val)
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tmp |= bit;
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else
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tmp &= ~bit;
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snd_ice1712_gpio_write(ice, tmp);
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}
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static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
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{
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int i;
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for (i = 0; i < 8; i++) {
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set_gpio_bit(ice, PONTIS_CS_CLK, 0);
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udelay(1);
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set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
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udelay(1);
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set_gpio_bit(ice, PONTIS_CS_CLK, 1);
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udelay(1);
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data <<= 1;
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}
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}
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static unsigned int spi_read_byte(struct snd_ice1712 *ice)
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{
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int i;
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unsigned int val = 0;
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for (i = 0; i < 8; i++) {
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val <<= 1;
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set_gpio_bit(ice, PONTIS_CS_CLK, 0);
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udelay(1);
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if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
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val |= 1;
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udelay(1);
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set_gpio_bit(ice, PONTIS_CS_CLK, 1);
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udelay(1);
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}
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return val;
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}
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static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
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{
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snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
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snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
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set_gpio_bit(ice, PONTIS_CS_CS, 0);
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spi_send_byte(ice, dev & ~1); /* WRITE */
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spi_send_byte(ice, reg); /* MAP */
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spi_send_byte(ice, data); /* DATA */
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/* trigger */
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set_gpio_bit(ice, PONTIS_CS_CS, 1);
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udelay(1);
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/* restore */
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snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
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snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
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}
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static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
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{
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unsigned int val;
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snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
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snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
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set_gpio_bit(ice, PONTIS_CS_CS, 0);
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spi_send_byte(ice, dev & ~1); /* WRITE */
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spi_send_byte(ice, reg); /* MAP */
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/* trigger */
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set_gpio_bit(ice, PONTIS_CS_CS, 1);
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udelay(1);
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set_gpio_bit(ice, PONTIS_CS_CS, 0);
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spi_send_byte(ice, dev | 1); /* READ */
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val = spi_read_byte(ice);
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/* trigger */
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set_gpio_bit(ice, PONTIS_CS_CS, 1);
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udelay(1);
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/* restore */
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snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
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snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
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return val;
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}
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/*
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* SPDIF input source
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*/
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static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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{
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static const char * const texts[] = {
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"Coax", /* RXP0 */
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"Optical", /* RXP1 */
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"CD", /* RXP2 */
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};
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uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
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uinfo->count = 1;
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uinfo->value.enumerated.items = 3;
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if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
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uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
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strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
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return 0;
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}
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static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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mutex_lock(&ice->gpio_mutex);
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ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
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mutex_unlock(&ice->gpio_mutex);
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return 0;
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}
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static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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unsigned char val;
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int change = 0;
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mutex_lock(&ice->gpio_mutex);
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if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
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ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
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val = 0x80 | (ice->gpio.saved[0] << 3);
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spi_write(ice, CS_DEV, 0x04, val);
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change = 1;
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}
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mutex_unlock(&ice->gpio_mutex);
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return change;
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}
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/*
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* GPIO controls
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*/
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static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = 0xffff; /* 16bit */
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return 0;
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}
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static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
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mutex_lock(&ice->gpio_mutex);
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/* 4-7 reserved */
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ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return 0;
|
|
}
|
|
|
|
static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
|
unsigned int val;
|
|
int changed;
|
|
mutex_lock(&ice->gpio_mutex);
|
|
/* 4-7 reserved */
|
|
val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
|
|
changed = val != ice->gpio.write_mask;
|
|
ice->gpio.write_mask = val;
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return changed;
|
|
}
|
|
|
|
static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
|
mutex_lock(&ice->gpio_mutex);
|
|
/* 4-7 reserved */
|
|
ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return 0;
|
|
}
|
|
|
|
static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
|
unsigned int val;
|
|
int changed;
|
|
mutex_lock(&ice->gpio_mutex);
|
|
/* 4-7 reserved */
|
|
val = ucontrol->value.integer.value[0] & 0xff0f;
|
|
changed = (val != ice->gpio.direction);
|
|
ice->gpio.direction = val;
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return changed;
|
|
}
|
|
|
|
static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
|
mutex_lock(&ice->gpio_mutex);
|
|
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
|
|
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
|
|
ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return 0;
|
|
}
|
|
|
|
static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
|
unsigned int val, nval;
|
|
int changed = 0;
|
|
mutex_lock(&ice->gpio_mutex);
|
|
snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
|
|
snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
|
|
val = snd_ice1712_gpio_read(ice) & 0xffff;
|
|
nval = ucontrol->value.integer.value[0] & 0xffff;
|
|
if (val != nval) {
|
|
snd_ice1712_gpio_write(ice, nval);
|
|
changed = 1;
|
|
}
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
return changed;
|
|
}
|
|
|
|
static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
|
|
|
|
/*
|
|
* mixers
|
|
*/
|
|
|
|
static struct snd_kcontrol_new pontis_controls[] __devinitdata = {
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
|
|
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
|
|
.name = "PCM Playback Volume",
|
|
.info = wm_dac_vol_info,
|
|
.get = wm_dac_vol_get,
|
|
.put = wm_dac_vol_put,
|
|
.tlv = { .p = db_scale_volume },
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
|
|
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
|
|
.name = "Capture Volume",
|
|
.info = wm_adc_vol_info,
|
|
.get = wm_adc_vol_get,
|
|
.put = wm_adc_vol_put,
|
|
.tlv = { .p = db_scale_volume },
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "CD Capture Switch",
|
|
.info = wm_adc_mux_info,
|
|
.get = wm_adc_mux_get,
|
|
.put = wm_adc_mux_put,
|
|
.private_value = 0,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "Line Capture Switch",
|
|
.info = wm_adc_mux_info,
|
|
.get = wm_adc_mux_get,
|
|
.put = wm_adc_mux_put,
|
|
.private_value = 1,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "Analog Bypass Switch",
|
|
.info = wm_bypass_info,
|
|
.get = wm_bypass_get,
|
|
.put = wm_bypass_put,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "Swap Output Channels",
|
|
.info = wm_chswap_info,
|
|
.get = wm_chswap_get,
|
|
.put = wm_chswap_put,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.name = "IEC958 Input Source",
|
|
.info = cs_source_info,
|
|
.get = cs_source_get,
|
|
.put = cs_source_put,
|
|
},
|
|
/* FIXME: which interface? */
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
|
|
.name = "GPIO Mask",
|
|
.info = pontis_gpio_mask_info,
|
|
.get = pontis_gpio_mask_get,
|
|
.put = pontis_gpio_mask_put,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
|
|
.name = "GPIO Direction",
|
|
.info = pontis_gpio_mask_info,
|
|
.get = pontis_gpio_dir_get,
|
|
.put = pontis_gpio_dir_put,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
|
|
.name = "GPIO Data",
|
|
.info = pontis_gpio_mask_info,
|
|
.get = pontis_gpio_data_get,
|
|
.put = pontis_gpio_data_put,
|
|
},
|
|
};
|
|
|
|
|
|
/*
|
|
* WM codec registers
|
|
*/
|
|
static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
|
|
{
|
|
struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
|
|
char line[64];
|
|
unsigned int reg, val;
|
|
mutex_lock(&ice->gpio_mutex);
|
|
while (!snd_info_get_line(buffer, line, sizeof(line))) {
|
|
if (sscanf(line, "%x %x", ®, &val) != 2)
|
|
continue;
|
|
if (reg <= 0x17 && val <= 0xffff)
|
|
wm_put(ice, reg, val);
|
|
}
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
}
|
|
|
|
static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
|
|
{
|
|
struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
|
|
int reg, val;
|
|
|
|
mutex_lock(&ice->gpio_mutex);
|
|
for (reg = 0; reg <= 0x17; reg++) {
|
|
val = wm_get(ice, reg);
|
|
snd_iprintf(buffer, "%02x = %04x\n", reg, val);
|
|
}
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
}
|
|
|
|
static void wm_proc_init(struct snd_ice1712 *ice)
|
|
{
|
|
struct snd_info_entry *entry;
|
|
if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
|
|
snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
|
|
entry->mode |= S_IWUSR;
|
|
entry->c.text.write = wm_proc_regs_write;
|
|
}
|
|
}
|
|
|
|
static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
|
|
{
|
|
struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
|
|
int reg, val;
|
|
|
|
mutex_lock(&ice->gpio_mutex);
|
|
for (reg = 0; reg <= 0x26; reg++) {
|
|
val = spi_read(ice, CS_DEV, reg);
|
|
snd_iprintf(buffer, "%02x = %02x\n", reg, val);
|
|
}
|
|
val = spi_read(ice, CS_DEV, 0x7f);
|
|
snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
|
|
mutex_unlock(&ice->gpio_mutex);
|
|
}
|
|
|
|
static void cs_proc_init(struct snd_ice1712 *ice)
|
|
{
|
|
struct snd_info_entry *entry;
|
|
if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
|
|
snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
|
|
}
|
|
|
|
|
|
static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
|
|
{
|
|
unsigned int i;
|
|
int err;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
wm_proc_init(ice);
|
|
cs_proc_init(ice);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* initialize the chip
|
|
*/
|
|
static int __devinit pontis_init(struct snd_ice1712 *ice)
|
|
{
|
|
static const unsigned short wm_inits[] = {
|
|
/* These come first to reduce init pop noise */
|
|
WM_ADC_MUX, 0x00c0, /* ADC mute */
|
|
WM_DAC_MUTE, 0x0001, /* DAC softmute */
|
|
WM_DAC_CTRL1, 0x0000, /* DAC mute */
|
|
|
|
WM_POWERDOWN, 0x0008, /* All power-up except HP */
|
|
WM_RESET, 0x0000, /* reset */
|
|
};
|
|
static const unsigned short wm_inits2[] = {
|
|
WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
|
|
WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
|
|
WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
|
|
WM_DAC_CTRL1, 0x0090, /* DAC L/R */
|
|
WM_OUT_MUX, 0x0001, /* OUT DAC */
|
|
WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
|
|
WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
|
|
WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
|
|
WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
|
|
WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
|
|
WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
|
|
/* WM_DAC_MASTER, 0x0100, */ /* DAC master muted */
|
|
WM_PHASE_SWAP, 0x0000, /* phase normal */
|
|
WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
|
|
WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
|
|
WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
|
|
#if 0
|
|
WM_ALC_CTRL1, 0x007b, /* */
|
|
WM_ALC_CTRL2, 0x0000, /* */
|
|
WM_ALC_CTRL3, 0x0000, /* */
|
|
WM_NOISE_GATE, 0x0000, /* */
|
|
#endif
|
|
WM_DAC_MUTE, 0x0000, /* DAC unmute */
|
|
WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
|
|
};
|
|
static const unsigned char cs_inits[] = {
|
|
0x04, 0x80, /* RUN, RXP0 */
|
|
0x05, 0x05, /* slave, 24bit */
|
|
0x01, 0x00,
|
|
0x02, 0x00,
|
|
0x03, 0x00,
|
|
};
|
|
unsigned int i;
|
|
|
|
ice->vt1720 = 1;
|
|
ice->num_total_dacs = 2;
|
|
ice->num_total_adcs = 2;
|
|
|
|
/* to remeber the register values */
|
|
ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
|
|
if (! ice->akm)
|
|
return -ENOMEM;
|
|
ice->akm_codecs = 1;
|
|
|
|
/* HACK - use this as the SPDIF source.
|
|
* don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
|
|
*/
|
|
ice->gpio.saved[0] = 0;
|
|
|
|
/* initialize WM8776 codec */
|
|
for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
|
|
wm_put(ice, wm_inits[i], wm_inits[i+1]);
|
|
schedule_timeout_uninterruptible(1);
|
|
for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
|
|
wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
|
|
|
|
/* initialize CS8416 codec */
|
|
/* assert PRST#; MT05 bit 7 */
|
|
outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
|
|
mdelay(5);
|
|
/* deassert PRST# */
|
|
outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
|
|
|
|
for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
|
|
spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* Pontis boards don't provide the EEPROM data at all.
|
|
* hence the driver needs to sets up it properly.
|
|
*/
|
|
|
|
static unsigned char pontis_eeprom[] __devinitdata = {
|
|
[ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */
|
|
[ICE_EEP2_ACLINK] = 0x80, /* I2S */
|
|
[ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
|
|
[ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
|
|
[ICE_EEP2_GPIO_DIR] = 0x07,
|
|
[ICE_EEP2_GPIO_DIR1] = 0x00,
|
|
[ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */
|
|
[ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */
|
|
[ICE_EEP2_GPIO_MASK1] = 0xff,
|
|
[ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */
|
|
[ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */
|
|
[ICE_EEP2_GPIO_STATE1] = 0x00,
|
|
[ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */
|
|
};
|
|
|
|
/* entry point */
|
|
struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
|
|
{
|
|
.subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
|
|
.name = "Pontis MS300",
|
|
.model = "ms300",
|
|
.chip_init = pontis_init,
|
|
.build_controls = pontis_add_controls,
|
|
.eeprom_size = sizeof(pontis_eeprom),
|
|
.eeprom_data = pontis_eeprom,
|
|
},
|
|
{ } /* terminator */
|
|
};
|