574 lines
15 KiB
C
574 lines
15 KiB
C
/*
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TDA10023 - DVB-C decoder
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(as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
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Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
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Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
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Remotely based on tda10021.c
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Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
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Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
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Support for TDA10021
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <asm/div64.h>
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#include "dvb_frontend.h"
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#include "tda1002x.h"
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#define REG0_INIT_VAL 0x23
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struct tda10023_state {
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struct i2c_adapter* i2c;
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/* configuration settings */
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const struct tda10023_config *config;
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struct dvb_frontend frontend;
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u8 pwm;
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u8 reg0;
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/* clock settings */
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u32 xtal;
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u8 pll_m;
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u8 pll_p;
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u8 pll_n;
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u32 sysclk;
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};
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#define dprintk(x...)
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static int verbose;
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static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
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{
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u8 b0 [] = { reg };
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u8 b1 [] = { 0 };
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struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
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int ret;
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ret = i2c_transfer (state->i2c, msg, 2);
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if (ret != 2) {
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int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
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printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error "
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"(reg == 0x%02x, ret == %i)\n",
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num, __func__, reg, ret);
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}
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return b1[0];
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}
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static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
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int ret;
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ret = i2c_transfer (state->i2c, &msg, 1);
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if (ret != 1) {
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int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
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printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error "
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"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
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num, __func__, reg, data, ret);
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}
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return (ret != 1) ? -EREMOTEIO : 0;
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}
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static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
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{
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if (mask==0xff)
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return tda10023_writereg(state, reg, data);
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else {
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u8 val;
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val=tda10023_readreg(state,reg);
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val&=~mask;
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val|=(data&mask);
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return tda10023_writereg(state, reg, val);
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}
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}
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static void tda10023_writetab(struct tda10023_state* state, u8* tab)
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{
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u8 r,m,v;
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while (1) {
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r=*tab++;
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m=*tab++;
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v=*tab++;
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if (r==0xff) {
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if (m==0xff)
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break;
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else
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msleep(m);
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}
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else
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tda10023_writebit(state,r,m,v);
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}
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}
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//get access to tuner
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static int lock_tuner(struct tda10023_state* state)
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{
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u8 buf[2] = { 0x0f, 0xc0 };
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struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg, 1) != 1)
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{
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printk("tda10023: lock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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//release access from tuner
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static int unlock_tuner(struct tda10023_state* state)
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{
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u8 buf[2] = { 0x0f, 0x40 };
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struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
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{
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printk("tda10023: unlock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
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{
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reg0 |= state->reg0 & 0x63;
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tda10023_writereg (state, 0x00, reg0 & 0xfe);
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tda10023_writereg (state, 0x00, reg0 | 0x01);
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state->reg0 = reg0;
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return 0;
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}
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static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
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{
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s32 BDR;
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s32 BDRI;
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s16 SFIL=0;
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u16 NDEC = 0;
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/* avoid floating point operations multiplying syscloc and divider
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by 10 */
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u32 sysclk_x_10 = state->sysclk * 10;
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if (sr < (u32)(sysclk_x_10/984)) {
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NDEC=3;
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SFIL=1;
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} else if (sr < (u32)(sysclk_x_10/640)) {
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NDEC=3;
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SFIL=0;
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} else if (sr < (u32)(sysclk_x_10/492)) {
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NDEC=2;
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SFIL=1;
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} else if (sr < (u32)(sysclk_x_10/320)) {
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NDEC=2;
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SFIL=0;
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} else if (sr < (u32)(sysclk_x_10/246)) {
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NDEC=1;
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SFIL=1;
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} else if (sr < (u32)(sysclk_x_10/160)) {
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NDEC=1;
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SFIL=0;
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} else if (sr < (u32)(sysclk_x_10/123)) {
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NDEC=0;
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SFIL=1;
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}
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BDRI = (state->sysclk)*16;
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BDRI>>=NDEC;
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BDRI +=sr/2;
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BDRI /=sr;
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if (BDRI>255)
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BDRI=255;
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{
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u64 BDRX;
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BDRX=1<<(24+NDEC);
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BDRX*=sr;
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do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */
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BDR=(s32)BDRX;
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}
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dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
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sr, BDR, BDRI, NDEC);
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tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
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tda10023_writereg (state, 0x0a, BDR&255);
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tda10023_writereg (state, 0x0b, (BDR>>8)&255);
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tda10023_writereg (state, 0x0c, (BDR>>16)&31);
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tda10023_writereg (state, 0x0d, BDRI);
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tda10023_writereg (state, 0x3d, (SFIL<<7));
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return 0;
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}
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static int tda10023_init (struct dvb_frontend *fe)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 tda10023_inittab[] = {
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/* reg mask val */
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/* 000 */ 0x2a, 0xff, 0x02, /* PLL3, Bypass, Power Down */
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/* 003 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 006 */ 0x2a, 0xff, 0x03, /* PLL3, Bypass, Power Down */
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/* 009 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* PLL1 */
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/* 012 */ 0x28, 0xff, (state->pll_m-1),
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/* PLL2 */
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/* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
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/* GPR FSAMPLING=1 */
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/* 018 */ 0x00, 0xff, REG0_INIT_VAL,
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/* 021 */ 0x2a, 0xff, 0x08, /* PLL3 PSACLK=1 */
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/* 024 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 027 */ 0x1f, 0xff, 0x00, /* RESET */
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/* 030 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 033 */ 0xe6, 0x0c, 0x04, /* RSCFG_IND */
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/* 036 */ 0x10, 0xc0, 0x80, /* DECDVBCFG1 PBER=1 */
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/* 039 */ 0x0e, 0xff, 0x82, /* GAIN1 */
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/* 042 */ 0x03, 0x08, 0x08, /* CLKCONF DYN=1 */
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/* 045 */ 0x2e, 0xbf, 0x30, /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
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PPWMTUN=0 PPWMIF=0 */
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/* 048 */ 0x01, 0xff, 0x30, /* AGCREF */
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/* 051 */ 0x1e, 0x84, 0x84, /* CONTROL SACLK_ON=1 */
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/* 054 */ 0x1b, 0xff, 0xc8, /* ADC TWOS=1 */
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/* 057 */ 0x3b, 0xff, 0xff, /* IFMAX */
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/* 060 */ 0x3c, 0xff, 0x00, /* IFMIN */
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/* 063 */ 0x34, 0xff, 0x00, /* PWMREF */
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/* 066 */ 0x35, 0xff, 0xff, /* TUNMAX */
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/* 069 */ 0x36, 0xff, 0x00, /* TUNMIN */
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/* 072 */ 0x06, 0xff, 0x7f, /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
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/* 075 */ 0x1c, 0x30, 0x30, /* EQCONF2 STEPALGO=SGNALGO=1 */
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/* 078 */ 0x37, 0xff, 0xf6, /* DELTAF_LSB */
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/* 081 */ 0x38, 0xff, 0xff, /* DELTAF_MSB */
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/* 084 */ 0x02, 0xff, 0x93, /* AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 */
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/* 087 */ 0x2d, 0xff, 0xf6, /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
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/* 090 */ 0x04, 0x10, 0x00, /* SWRAMP=1 */
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/* 093 */ 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /*
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INTP1 POCLKP=1 FEL=1 MFS=0 */
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/* 096 */ 0x2b, 0x01, 0xa1, /* INTS1 */
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/* 099 */ 0x20, 0xff, 0x04, /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
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/* 102 */ 0x2c, 0xff, 0x0d, /* INTP/S TRIP=0 TRIS=0 */
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/* 105 */ 0xc4, 0xff, 0x00,
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/* 108 */ 0xc3, 0x30, 0x00,
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/* 111 */ 0xb5, 0xff, 0x19, /* ERAGC_THD */
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/* 114 */ 0x00, 0x03, 0x01, /* GPR, CLBS soft reset */
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/* 117 */ 0x00, 0x03, 0x03, /* GPR, CLBS soft reset */
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/* 120 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 123 */ 0xff, 0xff, 0xff
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};
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dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
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/* override default values if set in config */
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if (state->config->deltaf) {
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tda10023_inittab[80] = (state->config->deltaf & 0xff);
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tda10023_inittab[83] = (state->config->deltaf >> 8);
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}
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if (state->config->output_mode)
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tda10023_inittab[95] = state->config->output_mode;
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tda10023_writetab(state, tda10023_inittab);
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return 0;
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}
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static int tda10023_set_parameters (struct dvb_frontend *fe,
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struct dvb_frontend_parameters *p)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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static int qamvals[6][6] = {
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// QAM LOCKTHR MSETH AREF AGCREFNYQ ERAGCNYQ_THD
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{ (5<<2), 0x78, 0x8c, 0x96, 0x78, 0x4c }, // 4 QAM
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{ (0<<2), 0x87, 0xa2, 0x91, 0x8c, 0x57 }, // 16 QAM
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{ (1<<2), 0x64, 0x74, 0x96, 0x8c, 0x57 }, // 32 QAM
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{ (2<<2), 0x46, 0x43, 0x6a, 0x6a, 0x44 }, // 64 QAM
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{ (3<<2), 0x36, 0x34, 0x7e, 0x78, 0x4c }, // 128 QAM
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{ (4<<2), 0x26, 0x23, 0x6c, 0x5c, 0x3c }, // 256 QAM
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};
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int qam = p->u.qam.modulation;
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if (qam < 0 || qam > 5)
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return -EINVAL;
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if (fe->ops.tuner_ops.set_params) {
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fe->ops.tuner_ops.set_params(fe, p);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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}
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tda10023_set_symbolrate (state, p->u.qam.symbol_rate);
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tda10023_writereg (state, 0x05, qamvals[qam][1]);
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tda10023_writereg (state, 0x08, qamvals[qam][2]);
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tda10023_writereg (state, 0x09, qamvals[qam][3]);
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tda10023_writereg (state, 0xb4, qamvals[qam][4]);
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tda10023_writereg (state, 0xb6, qamvals[qam][5]);
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// tda10023_writereg (state, 0x04, (p->inversion?0x12:0x32));
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// tda10023_writebit (state, 0x04, 0x60, (p->inversion?0:0x20));
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tda10023_writebit (state, 0x04, 0x40, 0x40);
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tda10023_setup_reg0 (state, qamvals[qam][0]);
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return 0;
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}
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static int tda10023_read_status(struct dvb_frontend* fe, fe_status_t* status)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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int sync;
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*status = 0;
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//0x11[1] == CARLOCK -> Carrier locked
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//0x11[2] == FSYNC -> Frame synchronisation
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//0x11[3] == FEL -> Front End locked
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//0x11[6] == NODVB -> DVB Mode Information
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sync = tda10023_readreg (state, 0x11);
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if (sync & 2)
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*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
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if (sync & 4)
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*status |= FE_HAS_SYNC|FE_HAS_VITERBI;
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if (sync & 8)
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*status |= FE_HAS_LOCK;
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return 0;
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}
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static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 a,b,c;
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a=tda10023_readreg(state, 0x14);
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b=tda10023_readreg(state, 0x15);
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c=tda10023_readreg(state, 0x16)&0xf;
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tda10023_writebit (state, 0x10, 0xc0, 0x00);
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*ber = a | (b<<8)| (c<<16);
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return 0;
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}
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static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 ifgain=tda10023_readreg(state, 0x2f);
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u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
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// Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
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if (gain>0x90)
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gain=gain+2*(gain-0x90);
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if (gain>255)
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gain=255;
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*strength = (gain<<8)|gain;
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return 0;
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}
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static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 quality = ~tda10023_readreg(state, 0x18);
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*snr = (quality << 8) | quality;
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return 0;
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}
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static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 a,b,c,d;
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a= tda10023_readreg (state, 0x74);
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b= tda10023_readreg (state, 0x75);
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c= tda10023_readreg (state, 0x76);
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d= tda10023_readreg (state, 0x77);
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*ucblocks = a | (b<<8)|(c<<16)|(d<<24);
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tda10023_writebit (state, 0x10, 0x20,0x00);
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tda10023_writebit (state, 0x10, 0x20,0x20);
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tda10023_writebit (state, 0x13, 0x01, 0x00);
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return 0;
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}
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static int tda10023_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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int sync,inv;
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s8 afc = 0;
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sync = tda10023_readreg(state, 0x11);
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afc = tda10023_readreg(state, 0x19);
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inv = tda10023_readreg(state, 0x04);
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if (verbose) {
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/* AFC only valid when carrier has been recovered */
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printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
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|
"DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
|
|
state->frontend.dvb->num, afc,
|
|
-((s32)p->u.qam.symbol_rate * afc) >> 10);
|
|
}
|
|
|
|
p->inversion = (inv&0x20?0:1);
|
|
p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
|
|
|
|
p->u.qam.fec_inner = FEC_NONE;
|
|
p->frequency = ((p->frequency + 31250) / 62500) * 62500;
|
|
|
|
if (sync & 2)
|
|
p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda10023_sleep(struct dvb_frontend* fe)
|
|
{
|
|
struct tda10023_state* state = fe->demodulator_priv;
|
|
|
|
tda10023_writereg (state, 0x1b, 0x02); /* pdown ADC */
|
|
tda10023_writereg (state, 0x00, 0x80); /* standby */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
|
|
{
|
|
struct tda10023_state* state = fe->demodulator_priv;
|
|
|
|
if (enable) {
|
|
lock_tuner(state);
|
|
} else {
|
|
unlock_tuner(state);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void tda10023_release(struct dvb_frontend* fe)
|
|
{
|
|
struct tda10023_state* state = fe->demodulator_priv;
|
|
kfree(state);
|
|
}
|
|
|
|
static struct dvb_frontend_ops tda10023_ops;
|
|
|
|
struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
|
|
struct i2c_adapter *i2c,
|
|
u8 pwm)
|
|
{
|
|
struct tda10023_state* state = NULL;
|
|
|
|
/* allocate memory for the internal state */
|
|
state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
|
|
if (state == NULL) goto error;
|
|
|
|
/* setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
|
|
/* wakeup if in standby */
|
|
tda10023_writereg (state, 0x00, 0x33);
|
|
/* check if the demod is there */
|
|
if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
|
|
|
|
/* create dvb_frontend */
|
|
memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
|
|
state->pwm = pwm;
|
|
state->reg0 = REG0_INIT_VAL;
|
|
if (state->config->xtal) {
|
|
state->xtal = state->config->xtal;
|
|
state->pll_m = state->config->pll_m;
|
|
state->pll_p = state->config->pll_p;
|
|
state->pll_n = state->config->pll_n;
|
|
} else {
|
|
/* set default values if not defined in config */
|
|
state->xtal = 28920000;
|
|
state->pll_m = 8;
|
|
state->pll_p = 4;
|
|
state->pll_n = 1;
|
|
}
|
|
|
|
/* calc sysclk */
|
|
state->sysclk = (state->xtal * state->pll_m / \
|
|
(state->pll_n * state->pll_p));
|
|
|
|
state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
|
|
state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
|
|
|
|
dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
|
|
__func__, state->xtal, state->pll_m, state->pll_p,
|
|
state->pll_n);
|
|
|
|
state->frontend.demodulator_priv = state;
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
static struct dvb_frontend_ops tda10023_ops = {
|
|
|
|
.info = {
|
|
.name = "Philips TDA10023 DVB-C",
|
|
.type = FE_QAM,
|
|
.frequency_stepsize = 62500,
|
|
.frequency_min = 47000000,
|
|
.frequency_max = 862000000,
|
|
.symbol_rate_min = 0, /* set in tda10023_attach */
|
|
.symbol_rate_max = 0, /* set in tda10023_attach */
|
|
.caps = 0x400 | //FE_CAN_QAM_4
|
|
FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
|
|
FE_CAN_QAM_128 | FE_CAN_QAM_256 |
|
|
FE_CAN_FEC_AUTO
|
|
},
|
|
|
|
.release = tda10023_release,
|
|
|
|
.init = tda10023_init,
|
|
.sleep = tda10023_sleep,
|
|
.i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
|
|
|
|
.set_frontend = tda10023_set_parameters,
|
|
.get_frontend = tda10023_get_frontend,
|
|
|
|
.read_status = tda10023_read_status,
|
|
.read_ber = tda10023_read_ber,
|
|
.read_signal_strength = tda10023_read_signal_strength,
|
|
.read_snr = tda10023_read_snr,
|
|
.read_ucblocks = tda10023_read_ucblocks,
|
|
};
|
|
|
|
|
|
MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
|
|
MODULE_AUTHOR("Georg Acher, Hartmut Birr");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL(tda10023_attach);
|