448 lines
10 KiB
C
448 lines
10 KiB
C
/*
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* arch/sh/boards/st/mb618/setup.c
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*
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* Copyright (C) 2008 STMicroelectronics Limited
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* Author: Stuart Menefy (stuart.menefy@st.com)
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* STMicroelectronics STx7111 Mboard support.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/phy.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/irq.h>
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#include <linux/stm/platform.h>
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#include <linux/stm/stx7111.h>
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#include <linux/stm/emi.h>
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#include <linux/stm/pci-glue.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <asm/irq-ilc.h>
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#include <asm/irl.h>
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#include <sound/stm.h>
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#include <mach/common.h>
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/* Whether the hardware supports NOR or NAND Flash depends on J34.
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* In position 1-2 CSA selects NAND, in position 2-3 is selects NOR.
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* Note that J30A must be in position 2-3 to select the on board Flash
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* (both NOR and NAND).
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*/
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#define FLASH_NOR
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#define MB618_PIO_FLASH_VPP stm_gpio(3, 4)
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static void __init mb618_setup(char** cmdline_p)
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{
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printk(KERN_INFO "STMicroelectronics STx7111 Mboard initialisation\n");
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stx7111_early_device_init();
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stx7111_configure_asc(2, &(struct stx7111_asc_config) {
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.hw_flow_control = 1,
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.is_console = 1, });
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stx7111_configure_asc(3, &(struct stx7111_asc_config) {
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.hw_flow_control = 1,
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.is_console = 0, });
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}
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static struct platform_device mb618_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev.platform_data = &(struct gpio_led_platform_data) {
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.num_leds = 2,
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.leds = (struct gpio_led[]) {
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{
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.name = "HB green",
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.default_trigger = "heartbeat",
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.gpio = stm_gpio(6, 0),
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}, {
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.name = "HB red",
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.gpio = stm_gpio(6, 1),
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},
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},
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},
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};
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static struct gpio_keys_button mb618_buttons[] = {
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{
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.code = BTN_0,
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.gpio = stm_gpio(6, 2),
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.desc = "SW2",
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}, {
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.code = BTN_1,
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.gpio = stm_gpio(6, 3),
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.desc = "SW3",
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}, {
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.code = BTN_2,
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.gpio = stm_gpio(6, 4),
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.desc = "SW4",
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}, {
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.code = BTN_3,
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.gpio = stm_gpio(6, 5),
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.desc = "SW5",
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},
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};
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static struct platform_device mb618_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.num_resources = 0,
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.dev.platform_data = &(struct gpio_keys_platform_data) {
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.buttons = mb618_buttons,
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.nbuttons = ARRAY_SIZE(mb618_buttons),
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},
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};
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#ifdef FLASH_NOR
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/* J34 must be in the 1-2 position to enable NOR Flash */
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static void mb618_nor_set_vpp(struct map_info *info, int enable)
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{
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gpio_set_value(MB618_PIO_FLASH_VPP, enable);
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}
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static struct platform_device mb618_nor_flash = {
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.name = "physmap-flash",
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.id = -1,
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.num_resources = 1,
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.resource = (struct resource[]) {
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STM_PLAT_RESOURCE_MEM(0, 32*1024*1024),
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},
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.dev.platform_data = &(struct physmap_flash_data) {
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.width = 2,
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.set_vpp = mb618_nor_set_vpp,
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.nr_parts = 3,
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.parts = (struct mtd_partition []) {
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{
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.name = "NOR Flash 1",
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.size = 0x00080000,
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.offset = 0x00000000,
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}, {
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.name = "NOR Flash 2",
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.size = 0x00200000,
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.offset = MTDPART_OFS_NXTBLK,
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}, {
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.name = "NOR Flash 3",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_NXTBLK,
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},
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},
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},
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};
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#else
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struct stm_nand_bank_data mb618_nand_flash = {
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.csn = 0,
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.options = NAND_NO_AUTOINCR | NAND_USE_FLASH_BBT,
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.nr_partitions = 2,
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.partitions = (struct mtd_partition []) {
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{
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.name = "NAND Flash 1",
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.offset = 0,
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.size = 0x00800000
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}, {
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.name = "NAND Flash 2",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL
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},
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},
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.timing_data = &(struct stm_nand_timing_data) {
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.sig_setup = 50, /* times in ns */
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.sig_hold = 50,
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.CE_deassert = 0,
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.WE_to_RBn = 100,
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.wr_on = 20,
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.wr_off = 50,
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.rd_on = 20,
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.rd_off = 50,
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.chip_delay = 50, /* in us */
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},
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};
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#endif
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/* Serial Flash (Board Rev D and later) */
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static struct spi_board_info mb618_serial_flash = {
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.modalias = "m25p80",
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.bus_num = 0,
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.chip_select = stm_gpio(6, 7),
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.max_speed_hz = 7000000,
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.mode = SPI_MODE_3,
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.platform_data = &(struct flash_platform_data) {
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.name = "m25p80",
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.type = "m25p80",
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.nr_parts = 2,
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.parts = (struct mtd_partition []) {
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{
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.name = "Serial Flash 1",
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.size = 0x00080000,
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.offset = 0,
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}, {
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.name = "Serial Flash 2",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_NXTBLK,
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},
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},
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},
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};
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static int mb618_phy_reset(void *bus)
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{
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epld_write(1, 0); /* bank = Ctrl */
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/* Bring the PHY out of reset in MII mode */
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epld_write(0x4 | 0, 4);
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epld_write(0x4 | 1, 4);
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return 1;
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}
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static struct stmmac_mdio_bus_data stmmac_mdio_bus = {
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.bus_id = 0,
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.phy_reset = mb618_phy_reset,
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.phy_mask = 0,
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};
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static struct platform_device epld_device = {
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.name = "epld",
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.id = -1,
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.num_resources = 1,
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.resource = (struct resource[]) {
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{
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.start = 0x06000000,
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/* Minimum size to ensure mapped by PMB */
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.end = 0x06000000+(8*1024*1024)-1,
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.flags = IORESOURCE_MEM,
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}
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},
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.dev.platform_data = &(struct plat_epld_data) {
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.opsize = 8,
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},
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};
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static struct stm_plat_pci_config mb618_pci_config = {
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/* We don't bother with INT[BCD] as they are shared with the ssc
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* J20-A must be removed, J20-B must be 5-6 */
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.pci_irq = {
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[0] = PCI_PIN_DEFAULT,
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[1] = PCI_PIN_UNUSED,
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[2] = PCI_PIN_UNUSED,
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[3] = PCI_PIN_UNUSED
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},
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.serr_irq = PCI_PIN_DEFAULT, /* J32-F fitted */
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.idsel_lo = 30,
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.idsel_hi = 30,
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.req_gnt = {
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[0] = PCI_PIN_DEFAULT,
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[1] = PCI_PIN_UNUSED,
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[2] = PCI_PIN_UNUSED,
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[3] = PCI_PIN_UNUSED
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},
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.pci_clk = 33333333,
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.pci_reset_gpio = -EINVAL, /* Reset done by EPLD on power on */
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};
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int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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/* We can use the standard function on this board */
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return stx7111_pcibios_map_platform_irq(&mb618_pci_config, pin);
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}
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static struct platform_device *mb618_devices[] __initdata = {
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&mb618_leds,
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&epld_device,
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#ifdef FLASH_NOR
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&mb618_nor_flash,
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#endif
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&mb618_button_device,
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};
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/* SCART switch simple control */
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/* Enable CVBS output to both (TV & VCR) SCART outputs */
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static int mb618_scart_audio_init(struct i2c_client *client, void *priv)
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{
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const char cmd[] = { 0x2, 0x11 };
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int cmd_len = sizeof(cmd);
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return i2c_master_send(client, cmd, cmd_len) != cmd_len;
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}
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/* Audio on SCART outputs control */
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static struct i2c_board_info mb618_scart_audio __initdata = {
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I2C_BOARD_INFO("snd_conv_i2c", 0x4b),
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.type = "STV6417",
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.platform_data = &(struct snd_stm_conv_i2c_info) {
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.group = "Analog Output",
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.source_bus_id = "snd_pcm_player.1",
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.channel_from = 0,
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.channel_to = 1,
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.format = SND_STM_FORMAT__I2S |
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SND_STM_FORMAT__SUBFRAME_32_BITS,
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.oversampling = 256,
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.init = mb618_scart_audio_init,
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.enable_supported = 1,
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.enable_cmd = (char []){ 0x01, 0x09 },
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.enable_cmd_len = 2,
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.disable_cmd = (char []){ 0x01, 0x00 },
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.disable_cmd_len = 2,
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},
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};
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static int __init mb618_devices_init(void)
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{
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int peripherals_i2c_bus;
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stx7111_configure_pci(&mb618_pci_config);
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stx7111_configure_pwm(&(struct stx7111_pwm_config) {
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.out0_enabled = 1,
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.out1_enabled = 0, });
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stx7111_configure_ssc_spi(0, NULL);
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stx7111_configure_ssc_i2c(1); /* J12=1-2, J16=1-2 */
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peripherals_i2c_bus = stx7111_configure_ssc_i2c(2);
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stx7111_configure_ssc_i2c(3);
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stx7111_configure_usb(&(struct stx7111_usb_config) {
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.invert_ovrcur = 1, });
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stx7111_configure_ethernet(&(struct stx7111_ethernet_config) {
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.mode = stx7111_ethernet_mode_mii,
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.ext_clk = 0,
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.phy_bus = 0,
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.phy_addr = -1,
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.mdio_bus_data = &stmmac_mdio_bus,
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});
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stx7111_configure_lirc(&(struct stx7111_lirc_config) {
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#ifdef CONFIG_LIRC_STM_UHF
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.rx_mode = stx7111_lirc_rx_mode_uhf,
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#else
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.rx_mode = stx7111_lirc_rx_mode_ir,
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#endif
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.tx_enabled = 1,
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.tx_od_enabled = 0, });
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gpio_request(MB618_PIO_FLASH_VPP, "Flash VPP");
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gpio_direction_output(MB618_PIO_FLASH_VPP, 0);
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i2c_register_board_info(peripherals_i2c_bus, &mb618_scart_audio, 1);
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spi_register_board_info(&mb618_serial_flash, 1);
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#ifndef FLASH_NOR
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stx7111_configure_nand(&(struct stm_nand_config) {
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.driver = stm_nand_flex,
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.nr_banks = 1,
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.banks = &mb618_nand_flash,
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.rbn.flex_connected = 1,});
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/* The MTD NAND code doesn't understand the concept of VPP,
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* (or hardware write protect) so permanently enable it. */
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gpio_direction_output(MB618_PIO_FLASH_VPP, 1);
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#endif
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return platform_add_devices(mb618_devices, ARRAY_SIZE(mb618_devices));
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}
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arch_initcall(mb618_devices_init);
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static void __iomem *mb618_ioport_map(unsigned long port, unsigned int size)
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{
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/*
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* If we have PCI then this should never be called because we
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* are using the generic iomap implementation. If we don't
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* have PCI then there are no IO mapped devices, so it still
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* shouldn't be called.
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*/
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BUG();
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return (void __iomem *)CCN_PVR;
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}
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/*
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* We now only support version 6 or later EPLDs:
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*
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* off read write reset
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* 0 Ident Bank 46 (Bank register defaults to 0)
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* 4 bank=0 Test Test 55
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* 4 bank=1 Ctrl Ctrl 0e
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* 4 bank=2 IntPri0 IntPri0 f9
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* 4 bank=3 IntPri1 IntPri1 f0
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* 8 IntStat IntMaskSet -
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* c IntMask IntMaskClr 00
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*
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* Ctrl register bits:
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* 0 = Ethernet Phy notReset
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* 1 = RMIInotMIISelect
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* 2 = Mode Select_7111 (ModeSelect when D0 == 1)
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* 3 = Mode Select_8700 (ModeSelect when D0 == 0)
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*/
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static void __init mb618_init_irq(void)
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{
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unsigned char epld_reg;
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const int test_offset = 4;
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const int version_offset = 0;
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int version;
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epld_early_init(&epld_device);
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epld_write(0, 0); /* bank = Test */
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epld_write(0x63, test_offset);
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epld_reg = epld_read(test_offset);
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if (epld_reg != (unsigned char)(~0x63)) {
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printk(KERN_WARNING
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"Failed mb618 EPLD test (off %02x, res %02x)\n",
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test_offset, epld_reg);
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return;
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}
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version = epld_read(version_offset) & 0x1f;
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printk(KERN_INFO "mb618 EPLD version %02d\n", version);
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/*
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* We have the nice new shiny interrupt system at last.
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* For the moment just replicate the functionality to
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* route the STEM interrupt through.
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*/
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/* Route STEM Int0 (EPLD int 4) to output 2 */
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epld_write(3, 0); /* bank = IntPri1 */
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epld_reg = epld_read(4);
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epld_reg &= 0xfc;
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epld_reg |= 2;
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epld_write(epld_reg, 4);
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/* Enable it */
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epld_write(1<<4, 8);
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}
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struct sh_machine_vector mv_mb618 __initmv = {
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.mv_name = "STx7111 Mboard",
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.mv_setup = mb618_setup,
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.mv_nr_irqs = NR_IRQS,
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.mv_init_irq = mb618_init_irq,
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.mv_ioport_map = mb618_ioport_map,
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STM_PCI_IO_MACHINE_VEC
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};
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