205 lines
5.1 KiB
C
205 lines
5.1 KiB
C
#ifndef S390_IO_SCH_H
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#define S390_IO_SCH_H
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#include <asm/schid.h>
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/*
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* command-mode operation request block
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*/
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struct cmd_orb {
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u32 intparm; /* interruption parameter */
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u32 key : 4; /* flags, like key, suspend control, etc. */
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u32 spnd : 1; /* suspend control */
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u32 res1 : 1; /* reserved */
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u32 mod : 1; /* modification control */
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u32 sync : 1; /* synchronize control */
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u32 fmt : 1; /* format control */
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u32 pfch : 1; /* prefetch control */
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u32 isic : 1; /* initial-status-interruption control */
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u32 alcc : 1; /* address-limit-checking control */
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u32 ssic : 1; /* suppress-suspended-interr. control */
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u32 res2 : 1; /* reserved */
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u32 c64 : 1; /* IDAW/QDIO 64 bit control */
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u32 i2k : 1; /* IDAW 2/4kB block size control */
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u32 lpm : 8; /* logical path mask */
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u32 ils : 1; /* incorrect length */
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u32 zero : 6; /* reserved zeros */
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u32 orbx : 1; /* ORB extension control */
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u32 cpa; /* channel program address */
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} __attribute__ ((packed, aligned(4)));
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/*
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* transport-mode operation request block
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*/
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struct tm_orb {
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u32 intparm;
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u32 key:4;
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u32 :9;
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u32 b:1;
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u32 :2;
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u32 lpm:8;
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u32 :7;
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u32 x:1;
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u32 tcw;
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u32 prio:8;
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u32 :8;
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u32 rsvpgm:8;
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u32 :8;
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u32 :32;
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u32 :32;
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u32 :32;
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u32 :32;
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} __attribute__ ((packed, aligned(4)));
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union orb {
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struct cmd_orb cmd;
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struct tm_orb tm;
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} __attribute__ ((packed, aligned(4)));
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struct io_subchannel_private {
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union orb orb; /* operation request block */
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struct ccw1 sense_ccw; /* static ccw for sense command */
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} __attribute__ ((aligned(8)));
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#define to_io_private(n) ((struct io_subchannel_private *)n->private)
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#define sch_get_cdev(n) (dev_get_drvdata(&n->dev))
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#define sch_set_cdev(n, c) (dev_set_drvdata(&n->dev, c))
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#define MAX_CIWS 8
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/*
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* sense-id response buffer layout
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*/
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struct senseid {
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/* common part */
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u8 reserved; /* always 0x'FF' */
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u16 cu_type; /* control unit type */
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u8 cu_model; /* control unit model */
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u16 dev_type; /* device type */
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u8 dev_model; /* device model */
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u8 unused; /* padding byte */
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/* extended part */
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struct ciw ciw[MAX_CIWS]; /* variable # of CIWs */
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} __attribute__ ((packed, aligned(4)));
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struct ccw_device_private {
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struct ccw_device *cdev;
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struct subchannel *sch;
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int state; /* device state */
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atomic_t onoff;
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unsigned long registered;
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struct ccw_dev_id dev_id; /* device id */
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struct subchannel_id schid; /* subchannel number */
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u8 imask; /* lpm mask for SNID/SID/SPGID */
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int iretry; /* retry counter SNID/SID/SPGID */
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struct {
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unsigned int fast:1; /* post with "channel end" */
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unsigned int repall:1; /* report every interrupt status */
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unsigned int pgroup:1; /* do path grouping */
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unsigned int force:1; /* allow forced online */
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} __attribute__ ((packed)) options;
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struct {
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unsigned int pgid_single:1; /* use single path for Set PGID */
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unsigned int esid:1; /* Ext. SenseID supported by HW */
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unsigned int dosense:1; /* delayed SENSE required */
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unsigned int doverify:1; /* delayed path verification */
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unsigned int donotify:1; /* call notify function */
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unsigned int recog_done:1; /* dev. recog. complete */
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unsigned int fake_irb:1; /* deliver faked irb */
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unsigned int intretry:1; /* retry internal operation */
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unsigned int resuming:1; /* recognition while resume */
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} __attribute__((packed)) flags;
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unsigned long intparm; /* user interruption parameter */
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struct qdio_irq *qdio_data;
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struct irb irb; /* device status */
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struct senseid senseid; /* SenseID info */
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struct pgid pgid[8]; /* path group IDs per chpid*/
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struct ccw1 iccws[2]; /* ccws for SNID/SID/SPGID commands */
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struct work_struct kick_work;
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wait_queue_head_t wait_q;
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struct timer_list timer;
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void *cmb; /* measurement information */
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struct list_head cmb_list; /* list of measured devices */
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u64 cmb_start_time; /* clock value of cmb reset */
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void *cmb_wait; /* deferred cmb enable/disable */
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};
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static inline int ssch(struct subchannel_id schid, union orb *addr)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" ssch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b, 1b)
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc", "memory");
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return ccode;
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}
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static inline int rsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc", "memory");
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return ccode;
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}
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static inline int csch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int hsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int xsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" .insn rre,0xb2760000,%1,0\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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#endif
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