satip-axe/kernel/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB
2015-03-26 17:24:57 +01:00

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# .gdbinit file
# $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $
#-----
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
# (Please type "gen_gdbinit.pl --help" and check the help message).
# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
#-----
# target platform: m32700ut
# setting
set width 0d70
set radix 0d16
debug_chaos
# clk xin:cpu:bif:bus=25:400:100:50
define clock_init
set *(unsigned long *)0x00ef4008 = 0x00000000
set *(unsigned long *)0x00ef4004 = 0
shell sleep 0.1
# NOTE: Please change the master clock source from PLL-clock to Xin-clock
# and switch off PLL, before resetting the clock gear ratio.
set *(unsigned long *)0x00ef4024 = 3
set *(unsigned long *)0x00ef4020 = 2
set *(unsigned long *)0x00ef4010 = 0
set *(unsigned long *)0x00ef4014 = 0
set *(unsigned long *)0x00ef4004 = 7
shell sleep 0.1
set *(unsigned long *)0x00ef4008 = 0x00000200
end
# Initialize SDRAM controller
define sdram_init
# SDIR0
set *(unsigned long *)0x00ef6008 = 0x00000182
# SDIR1
set *(unsigned long *)0x00ef600c = 0x00000001
# Initialize wait
shell sleep 0.1
# Ch0-MOD
set *(unsigned long *)0x00ef602c = 0x00000020
# Ch0-TR
set *(unsigned long *)0x00ef6028 = 0x00041302
# Ch0-ADR (size:32MB)
set *(unsigned long *)0x00ef6020 = 0x08000003
# AutoRef On
set *(unsigned long *)0x00ef6004 = 0x00010517
# Access enable
set *(unsigned long *)0x00ef6024 = 0x00000001
end
document sdram_init
SDRAM controller initialization
0x08000000 - 0x09ffffff (32MB)
end
# Initialize BSEL3 for UT-CFC
define cfc_init
set $sfrbase = 0xa0ef0000
# too fast
# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
end
document cfc_init
CF controller initialization
end
# MMU enable
define mmu_enable
set $evb=0x88000000
set *(unsigned long *)0xffff0024=1
end
# MMU disable
define mmu_disable
set $evb=0
set *(unsigned long *)0xffff0024=0
end
# Show TLB entries
define show_tlb_entries
set $i = 0
set $addr = $arg0
set $nr_entries = $arg1
use_mon_code
while ($i < $nr_entries)
set $tlb_tag = *(unsigned long*)$addr
set $tlb_data = *(unsigned long*)($addr + 4)
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
set $i = $i + 1
set $addr = $addr + 8
end
use_debug_dma
end
define itlb
set $itlb=0xfe000000
show_tlb_entries $itlb 0d32
end
define dtlb
set $dtlb=0xfe000800
show_tlb_entries $dtlb 0d32
end
# Initialize TLB entries
define init_tlb_entries
set $i = 0
set $addr = $arg0
set $nr_entries = $arg1
use_mon_code
while ($i < $nr_entries)
set *(unsigned long *)($addr + 0x4) = 0
set $i = $i + 1
set $addr = $addr + 8
end
use_debug_dma
end
define tlb_init
set $itlb=0xfe000000
init_tlb_entries $itlb 0d32
set $dtlb=0xfe000800
init_tlb_entries $dtlb 0d32
end
# Show current task structure
define show_current
set $current = $spi & 0xffffe000
printf "$current=0x%08lX\n",$current
print *(struct task_struct *)$current
end
# Show user assigned task structure
define show_task
set = $arg0 & 0xffffe000
printf "$task=0x%08lX\n",$task
print *(struct task_struct *)$task
end
document show_task
Show user assigned task structure
arg0 : task structure address
end
# Show M32R registers
define show_regs
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
printf "EVB[0x%08lX]\n",$evb
end
# Setup all
define setup
use_mon_code
set *(unsigned int)0xfffffffc=0x60
shell sleep 0.1
clock_init
shell sleep 0.1
# SDRAM: 32MB
set *(unsigned long *)0x00ef6020 = 0x08000003
cfc_init
# USB
set *(unsigned short *)0xb0301000 = 0x100
set $evb=0x08000000
end
# Load modules
define load_modules
use_debug_dma
load
end
# Set kernel parameters
define set_kernel_parameters
set $param = (void*)0x08001000
# INITRD_START
# set *(unsigned long *)($param + 0x0010) = 0x08300000
# INITRD_SIZE
# set *(unsigned long *)($param + 0x0014) = 0x00000000
# M32R_CPUCLK
set *(unsigned long *)($param + 0x0018) = 0d400000000
# M32R_BUSCLK
set *(unsigned long *)($param + 0x001c) = 0d50000000
# M32R_TIMER_DIVIDE
set *(unsigned long *)($param + 0x0020) = 0d128
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
end
# Boot
define boot
set_kernel_parameters
set $fp = 0
set $pc = 0x08002000
# set *(unsigned char *)0xffffffff = 0x03
si
c
end
# Set breakpoints
define set_breakpoints
b *0x08000030
end
# Restart
define restart
sdireset
sdireset
set $pc = 0
b *0x04001000
b *0x08001000
b *0x08002000
si
c
tlb_init
del
setup
load_modules
boot
end
define si
stepi
x/i $pc
show_reg
end
sdireset
sdireset
file vmlinux
target m32rsdi
set $pc = 0
b *0x04001000
b *0x08001000
b *0x08002000
c
tlb_init
del
setup
load_modules
boot