1090 lines
33 KiB
C
1090 lines
33 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <net/mac80211.h>
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#include "iwl-commands.h"
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-debug.h"
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#include "iwl-eeprom.h"
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#include "iwl-io.h"
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/************************** EEPROM BANDS ****************************
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*
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* The iwl_eeprom_band definitions below provide the mapping from the
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* EEPROM contents to the specific channel number supported for each
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* band.
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*
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* For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
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* definition below maps to physical channel 42 in the 5.2GHz spectrum.
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* The specific geography and calibration information for that channel
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* is contained in the eeprom map itself.
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*
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* During init, we copy the eeprom information and channel map
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* information into priv->channel_info_24/52 and priv->channel_map_24/52
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*
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* channel_map_24/52 provides the index in the channel_info array for a
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* given channel. We have to have two separate maps as there is channel
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* overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
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* band_2
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*
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* A value of 0xff stored in the channel_map indicates that the channel
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* is not supported by the hardware at all.
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*
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* A value of 0xfe in the channel_map indicates that the channel is not
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* valid for Tx with the current hardware. This means that
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* while the system can tune and receive on a given channel, it may not
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* be able to associate or transmit any frames on that
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* channel. There is no corresponding channel information for that
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* entry.
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*
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*********************************************************************/
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/* 2.4 GHz */
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const u8 iwl_eeprom_band_1[14] = {
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1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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};
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/* 5.2 GHz bands */
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static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
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183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
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};
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static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
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34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
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};
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static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
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100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
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};
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static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
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145, 149, 153, 157, 161, 165
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};
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static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */
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1, 2, 3, 4, 5, 6, 7
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};
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static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
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36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
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};
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/**
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* struct iwl_txpwr_section: eeprom section information
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* @offset: indirect address into eeprom image
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* @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
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* @band: band type for the section
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* @is_common - true: common section, false: channel section
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* @is_cck - true: cck section, false: not cck section
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* @is_ht_40 - true: all channel in the section are HT40 channel,
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* false: legacy or HT 20 MHz
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* ignore if it is common section
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* @iwl_eeprom_section_channel: channel array in the section,
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* ignore if common section
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*/
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struct iwl_txpwr_section {
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u32 offset;
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u8 count;
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enum ieee80211_band band;
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bool is_common;
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bool is_cck;
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bool is_ht40;
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u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
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};
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/**
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* section 1 - 3 are regulatory tx power apply to all channels based on
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* modulation: CCK, OFDM
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* Band: 2.4GHz, 5.2GHz
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* section 4 - 10 are regulatory tx power apply to specified channels
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* For example:
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* 1L - Channel 1 Legacy
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* 1HT - Channel 1 HT
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* (1,+1) - Channel 1 HT40 "_above_"
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*
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* Section 1: all CCK channels
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* Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
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* Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
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* Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
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* Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
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* Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
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* Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
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* Section 8: 2.4 GHz channel: 13L, 13HT
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* Section 9: 2.4 GHz channel: 140L, 140HT
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* Section 10: 2.4 GHz 40MHz channels: (132,+1) (44,+1)
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*
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*/
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static const struct iwl_txpwr_section enhinfo[] = {
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{ EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
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{ EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
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{ EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
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{ EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
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false, false, false,
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{1, 1, 2, 2, 10, 10, 11, 11 } },
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{ EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
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false, false, true,
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{ 1, 2, 6, 7, 9 } },
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{ EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
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false, false, false,
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{ 36, 64, 100, 36, 64, 100 } },
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{ EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
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false, false, true,
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{ 36, 60, 100 } },
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{ EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
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false, false, false,
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{ 13, 13 } },
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{ EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
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false, false, false,
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{ 140, 140 } },
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{ EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
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false, false, true,
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{ 132, 44 } },
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};
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/******************************************************************************
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*
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* EEPROM related functions
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*
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******************************************************************************/
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int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
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{
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u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
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if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
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IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
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return -ENOENT;
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}
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return 0;
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}
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EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
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static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
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{
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u32 otpgp;
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otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
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if (mode == IWL_OTP_ACCESS_ABSOLUTE)
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iwl_clear_bit(priv, CSR_OTP_GP_REG,
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CSR_OTP_GP_REG_OTP_ACCESS_MODE);
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else
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iwl_set_bit(priv, CSR_OTP_GP_REG,
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CSR_OTP_GP_REG_OTP_ACCESS_MODE);
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}
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static int iwlcore_get_nvm_type(struct iwl_priv *priv)
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{
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u32 otpgp;
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int nvm_type;
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/* OTP only valid for CP/PP and after */
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switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
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case CSR_HW_REV_TYPE_NONE:
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IWL_ERR(priv, "Unknown hardware type\n");
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return -ENOENT;
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case CSR_HW_REV_TYPE_3945:
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case CSR_HW_REV_TYPE_4965:
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case CSR_HW_REV_TYPE_5300:
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case CSR_HW_REV_TYPE_5350:
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case CSR_HW_REV_TYPE_5100:
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case CSR_HW_REV_TYPE_5150:
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nvm_type = NVM_DEVICE_TYPE_EEPROM;
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break;
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default:
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otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
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if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
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nvm_type = NVM_DEVICE_TYPE_OTP;
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else
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nvm_type = NVM_DEVICE_TYPE_EEPROM;
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break;
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}
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return nvm_type;
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}
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/*
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* The device's EEPROM semaphore prevents conflicts between driver and uCode
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* when accessing the EEPROM; each access is a series of pulses to/from the
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* EEPROM chip, not a single event, so even reads could conflict if they
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* weren't arbitrated by the semaphore.
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*/
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int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
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{
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u16 count;
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int ret;
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for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
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/* Request semaphore */
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iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
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/* See if we got it */
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ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
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EEPROM_SEM_TIMEOUT);
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if (ret >= 0) {
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IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
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count+1);
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return ret;
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}
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}
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return ret;
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}
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EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
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void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
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{
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iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
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}
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EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
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const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
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{
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BUG_ON(offset >= priv->cfg->eeprom_size);
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return &priv->eeprom[offset];
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}
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EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
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static int iwl_init_otp_access(struct iwl_priv *priv)
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{
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int ret;
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/* Enable 40MHz radio clock */
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_iwl_write32(priv, CSR_GP_CNTRL,
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_iwl_read32(priv, CSR_GP_CNTRL) |
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CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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/* wait for clock to be ready */
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ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
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25000);
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if (ret < 0)
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IWL_ERR(priv, "Time out access OTP\n");
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else {
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iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_RESET_REQ);
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udelay(5);
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iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_RESET_REQ);
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}
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return ret;
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}
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static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
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{
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int ret = 0;
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u32 r;
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u32 otpgp;
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_iwl_write32(priv, CSR_EEPROM_REG,
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CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
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ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
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CSR_EEPROM_REG_READ_VALID_MSK,
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IWL_EEPROM_ACCESS_TIMEOUT);
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if (ret < 0) {
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IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
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return ret;
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}
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r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
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/* check for ECC errors: */
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otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
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if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
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/* stop in this case */
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/* set the uncorrectable OTP ECC bit for acknowledgement */
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iwl_set_bit(priv, CSR_OTP_GP_REG,
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CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
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IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
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return -EINVAL;
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}
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if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
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/* continue in this case */
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/* set the correctable OTP ECC bit for acknowledgement */
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iwl_set_bit(priv, CSR_OTP_GP_REG,
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CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
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IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
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}
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*eeprom_data = cpu_to_le16(r >> 16);
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return 0;
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}
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/*
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* iwl_is_otp_empty: check for empty OTP
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*/
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static bool iwl_is_otp_empty(struct iwl_priv *priv)
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{
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u16 next_link_addr = 0;
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__le16 link_value;
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bool is_empty = false;
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/* locate the beginning of OTP link list */
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if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
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if (!link_value) {
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IWL_ERR(priv, "OTP is empty\n");
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is_empty = true;
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}
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} else {
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IWL_ERR(priv, "Unable to read first block of OTP list.\n");
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is_empty = true;
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}
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return is_empty;
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}
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/*
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* iwl_find_otp_image: find EEPROM image in OTP
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* finding the OTP block that contains the EEPROM image.
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* the last valid block on the link list (the block _before_ the last block)
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* is the block we should read and used to configure the device.
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* If all the available OTP blocks are full, the last block will be the block
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* we should read and used to configure the device.
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* only perform this operation if shadow RAM is disabled
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*/
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static int iwl_find_otp_image(struct iwl_priv *priv,
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u16 *validblockaddr)
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{
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u16 next_link_addr = 0, valid_addr;
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__le16 link_value = 0;
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int usedblocks = 0;
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/* set addressing mode to absolute to traverse the link list */
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iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
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/* checking for empty OTP or error */
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if (iwl_is_otp_empty(priv))
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return -EINVAL;
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/*
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* start traverse link list
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* until reach the max number of OTP blocks
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* different devices have different number of OTP blocks
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*/
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do {
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/* save current valid block address
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* check for more block on the link list
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*/
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valid_addr = next_link_addr;
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next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
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IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
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usedblocks, next_link_addr);
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if (iwl_read_otp_word(priv, next_link_addr, &link_value))
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return -EINVAL;
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if (!link_value) {
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/*
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* reach the end of link list, return success and
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* set address point to the starting address
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* of the image
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*/
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*validblockaddr = valid_addr;
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/* skip first 2 bytes (link list pointer) */
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*validblockaddr += 2;
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return 0;
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}
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/* more in the link list, continue */
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usedblocks++;
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} while (usedblocks <= priv->cfg->max_ll_items);
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|
|
/* OTP has no valid blocks */
|
|
IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/**
|
|
* iwl_eeprom_init - read EEPROM contents
|
|
*
|
|
* Load the EEPROM contents from adapter into priv->eeprom
|
|
*
|
|
* NOTE: This routine uses the non-debug IO access functions.
|
|
*/
|
|
int iwl_eeprom_init(struct iwl_priv *priv)
|
|
{
|
|
__le16 *e;
|
|
u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
|
|
int sz;
|
|
int ret;
|
|
u16 addr;
|
|
u16 validblockaddr = 0;
|
|
u16 cache_addr = 0;
|
|
|
|
priv->nvm_device_type = iwlcore_get_nvm_type(priv);
|
|
if (priv->nvm_device_type == -ENOENT)
|
|
return -ENOENT;
|
|
/* allocate eeprom */
|
|
IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
|
|
sz = priv->cfg->eeprom_size;
|
|
priv->eeprom = kzalloc(sz, GFP_KERNEL);
|
|
if (!priv->eeprom) {
|
|
ret = -ENOMEM;
|
|
goto alloc_err;
|
|
}
|
|
e = (__le16 *)priv->eeprom;
|
|
|
|
ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
|
|
if (ret < 0) {
|
|
IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
|
|
ret = -ENOENT;
|
|
goto err;
|
|
}
|
|
|
|
/* Make sure driver (instead of uCode) is allowed to read EEPROM */
|
|
ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
|
|
if (ret < 0) {
|
|
IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
|
|
ret = -ENOENT;
|
|
goto err;
|
|
}
|
|
if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
|
|
ret = iwl_init_otp_access(priv);
|
|
if (ret) {
|
|
IWL_ERR(priv, "Failed to initialize OTP access.\n");
|
|
ret = -ENOENT;
|
|
goto done;
|
|
}
|
|
_iwl_write32(priv, CSR_EEPROM_GP,
|
|
iwl_read32(priv, CSR_EEPROM_GP) &
|
|
~CSR_EEPROM_GP_IF_OWNER_MSK);
|
|
|
|
iwl_set_bit(priv, CSR_OTP_GP_REG,
|
|
CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
|
|
CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
|
|
/* traversing the linked list if no shadow ram supported */
|
|
if (!priv->cfg->shadow_ram_support) {
|
|
if (iwl_find_otp_image(priv, &validblockaddr)) {
|
|
ret = -ENOENT;
|
|
goto done;
|
|
}
|
|
}
|
|
for (addr = validblockaddr; addr < validblockaddr + sz;
|
|
addr += sizeof(u16)) {
|
|
__le16 eeprom_data;
|
|
|
|
ret = iwl_read_otp_word(priv, addr, &eeprom_data);
|
|
if (ret)
|
|
goto done;
|
|
e[cache_addr / 2] = eeprom_data;
|
|
cache_addr += sizeof(u16);
|
|
}
|
|
} else {
|
|
/* eeprom is an array of 16bit values */
|
|
for (addr = 0; addr < sz; addr += sizeof(u16)) {
|
|
u32 r;
|
|
|
|
_iwl_write32(priv, CSR_EEPROM_REG,
|
|
CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
|
|
|
|
ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
|
|
CSR_EEPROM_REG_READ_VALID_MSK,
|
|
IWL_EEPROM_ACCESS_TIMEOUT);
|
|
if (ret < 0) {
|
|
IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
|
|
goto done;
|
|
}
|
|
r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
|
|
e[addr / 2] = cpu_to_le16(r >> 16);
|
|
}
|
|
}
|
|
ret = 0;
|
|
done:
|
|
priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
|
|
err:
|
|
if (ret)
|
|
iwl_eeprom_free(priv);
|
|
alloc_err:
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_init);
|
|
|
|
void iwl_eeprom_free(struct iwl_priv *priv)
|
|
{
|
|
kfree(priv->eeprom);
|
|
priv->eeprom = NULL;
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_free);
|
|
|
|
int iwl_eeprom_check_version(struct iwl_priv *priv)
|
|
{
|
|
u16 eeprom_ver;
|
|
u16 calib_ver;
|
|
|
|
eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
|
|
calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
|
|
|
|
if (eeprom_ver < priv->cfg->eeprom_ver ||
|
|
calib_ver < priv->cfg->eeprom_calib_ver)
|
|
goto err;
|
|
|
|
return 0;
|
|
err:
|
|
IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
|
|
eeprom_ver, priv->cfg->eeprom_ver,
|
|
calib_ver, priv->cfg->eeprom_calib_ver);
|
|
return -EINVAL;
|
|
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_check_version);
|
|
|
|
const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
|
|
{
|
|
return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_query_addr);
|
|
|
|
u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
|
|
{
|
|
if (!priv->eeprom)
|
|
return 0;
|
|
return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_query16);
|
|
|
|
void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
|
|
{
|
|
const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
|
|
EEPROM_MAC_ADDRESS);
|
|
memcpy(mac, addr, ETH_ALEN);
|
|
}
|
|
EXPORT_SYMBOL(iwl_eeprom_get_mac);
|
|
|
|
static void iwl_init_band_reference(const struct iwl_priv *priv,
|
|
int eep_band, int *eeprom_ch_count,
|
|
const struct iwl_eeprom_channel **eeprom_ch_info,
|
|
const u8 **eeprom_ch_index)
|
|
{
|
|
u32 offset = priv->cfg->ops->lib->
|
|
eeprom_ops.regulatory_bands[eep_band - 1];
|
|
switch (eep_band) {
|
|
case 1: /* 2.4GHz band */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_1;
|
|
break;
|
|
case 2: /* 4.9GHz band */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_2;
|
|
break;
|
|
case 3: /* 5.2GHz band */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_3;
|
|
break;
|
|
case 4: /* 5.5GHz band */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_4;
|
|
break;
|
|
case 5: /* 5.7GHz band */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_5;
|
|
break;
|
|
case 6: /* 2.4GHz ht40 channels */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_6;
|
|
break;
|
|
case 7: /* 5 GHz ht40 channels */
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
*eeprom_ch_index = iwl_eeprom_band_7;
|
|
break;
|
|
default:
|
|
BUG();
|
|
return;
|
|
}
|
|
}
|
|
|
|
#define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
|
|
? # x " " : "")
|
|
|
|
/**
|
|
* iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
|
|
*
|
|
* Does not set up a command, or touch hardware.
|
|
*/
|
|
static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
|
|
enum ieee80211_band band, u16 channel,
|
|
const struct iwl_eeprom_channel *eeprom_ch,
|
|
u8 clear_ht40_extension_channel)
|
|
{
|
|
struct iwl_channel_info *ch_info;
|
|
|
|
ch_info = (struct iwl_channel_info *)
|
|
iwl_get_channel_info(priv, band, channel);
|
|
|
|
if (!is_channel_valid(ch_info))
|
|
return -1;
|
|
|
|
IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
|
|
" Ad-Hoc %ssupported\n",
|
|
ch_info->channel,
|
|
is_channel_a_band(ch_info) ?
|
|
"5.2" : "2.4",
|
|
CHECK_AND_PRINT(IBSS),
|
|
CHECK_AND_PRINT(ACTIVE),
|
|
CHECK_AND_PRINT(RADAR),
|
|
CHECK_AND_PRINT(WIDE),
|
|
CHECK_AND_PRINT(DFS),
|
|
eeprom_ch->flags,
|
|
eeprom_ch->max_power_avg,
|
|
((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
|
|
&& !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
|
|
"" : "not ");
|
|
|
|
ch_info->ht40_eeprom = *eeprom_ch;
|
|
ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
|
|
ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
|
|
ch_info->ht40_min_power = 0;
|
|
ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
|
|
ch_info->ht40_flags = eeprom_ch->flags;
|
|
if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
|
|
ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* iwl_get_max_txpower_avg - get the highest tx power from all chains.
|
|
* find the highest tx power from all chains for the channel
|
|
*/
|
|
static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
|
|
struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
|
|
{
|
|
s8 max_txpower_avg = 0; /* (dBm) */
|
|
|
|
IWL_DEBUG_INFO(priv, "%d - "
|
|
"chain_a: %d dB chain_b: %d dB "
|
|
"chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
|
|
element,
|
|
enhanced_txpower[element].chain_a_max >> 1,
|
|
enhanced_txpower[element].chain_b_max >> 1,
|
|
enhanced_txpower[element].chain_c_max >> 1,
|
|
enhanced_txpower[element].mimo2_max >> 1,
|
|
enhanced_txpower[element].mimo3_max >> 1);
|
|
/* Take the highest tx power from any valid chains */
|
|
if ((priv->cfg->valid_tx_ant & ANT_A) &&
|
|
(enhanced_txpower[element].chain_a_max > max_txpower_avg))
|
|
max_txpower_avg = enhanced_txpower[element].chain_a_max;
|
|
if ((priv->cfg->valid_tx_ant & ANT_B) &&
|
|
(enhanced_txpower[element].chain_b_max > max_txpower_avg))
|
|
max_txpower_avg = enhanced_txpower[element].chain_b_max;
|
|
if ((priv->cfg->valid_tx_ant & ANT_C) &&
|
|
(enhanced_txpower[element].chain_c_max > max_txpower_avg))
|
|
max_txpower_avg = enhanced_txpower[element].chain_c_max;
|
|
if (((priv->cfg->valid_tx_ant == ANT_AB) |
|
|
(priv->cfg->valid_tx_ant == ANT_BC) |
|
|
(priv->cfg->valid_tx_ant == ANT_AC)) &&
|
|
(enhanced_txpower[element].mimo2_max > max_txpower_avg))
|
|
max_txpower_avg = enhanced_txpower[element].mimo2_max;
|
|
if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
|
|
(enhanced_txpower[element].mimo3_max > max_txpower_avg))
|
|
max_txpower_avg = enhanced_txpower[element].mimo3_max;
|
|
|
|
/* max. tx power in EEPROM is in 1/2 dBm format
|
|
* convert from 1/2 dBm to dBm
|
|
*/
|
|
return max_txpower_avg >> 1;
|
|
}
|
|
|
|
/**
|
|
* iwl_update_common_txpower: update channel tx power
|
|
* update tx power per band based on EEPROM enhanced tx power info.
|
|
*/
|
|
static s8 iwl_update_common_txpower(struct iwl_priv *priv,
|
|
struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
|
|
int section, int element)
|
|
{
|
|
struct iwl_channel_info *ch_info;
|
|
int ch;
|
|
bool is_ht40 = false;
|
|
s8 max_txpower_avg; /* (dBm) */
|
|
|
|
/* it is common section, contain all type (Legacy, HT and HT40)
|
|
* based on the element in the section to determine
|
|
* is it HT 40 or not
|
|
*/
|
|
if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
|
|
is_ht40 = true;
|
|
max_txpower_avg =
|
|
iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
|
|
ch_info = priv->channel_info;
|
|
|
|
for (ch = 0; ch < priv->channel_count; ch++) {
|
|
/* find matching band and update tx power if needed */
|
|
if ((ch_info->band == enhinfo[section].band) &&
|
|
(ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
|
|
/* Update regulatory-based run-time data */
|
|
ch_info->max_power_avg = ch_info->curr_txpow =
|
|
max_txpower_avg;
|
|
ch_info->scan_power = max_txpower_avg;
|
|
}
|
|
if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
|
|
ch_info->ht40_max_power_avg &&
|
|
(ch_info->ht40_max_power_avg < max_txpower_avg)) {
|
|
/* Update regulatory-based run-time data */
|
|
ch_info->ht40_max_power_avg = max_txpower_avg;
|
|
ch_info->ht40_curr_txpow = max_txpower_avg;
|
|
ch_info->ht40_scan_power = max_txpower_avg;
|
|
}
|
|
ch_info++;
|
|
}
|
|
return max_txpower_avg;
|
|
}
|
|
|
|
/**
|
|
* iwl_update_channel_txpower: update channel tx power
|
|
* update channel tx power based on EEPROM enhanced tx power info.
|
|
*/
|
|
static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
|
|
struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
|
|
int section, int element)
|
|
{
|
|
struct iwl_channel_info *ch_info;
|
|
int ch;
|
|
u8 channel;
|
|
s8 max_txpower_avg; /* (dBm) */
|
|
|
|
channel = enhinfo[section].iwl_eeprom_section_channel[element];
|
|
max_txpower_avg =
|
|
iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
|
|
|
|
ch_info = priv->channel_info;
|
|
for (ch = 0; ch < priv->channel_count; ch++) {
|
|
/* find matching channel and update tx power if needed */
|
|
if (ch_info->channel == channel) {
|
|
if ((ch_info->max_power_avg < max_txpower_avg) &&
|
|
(!enhinfo[section].is_ht40)) {
|
|
/* Update regulatory-based run-time data */
|
|
ch_info->max_power_avg = max_txpower_avg;
|
|
ch_info->curr_txpow = max_txpower_avg;
|
|
ch_info->scan_power = max_txpower_avg;
|
|
}
|
|
if ((enhinfo[section].is_ht40) &&
|
|
(ch_info->ht40_max_power_avg) &&
|
|
(ch_info->ht40_max_power_avg < max_txpower_avg)) {
|
|
/* Update regulatory-based run-time data */
|
|
ch_info->ht40_max_power_avg = max_txpower_avg;
|
|
ch_info->ht40_curr_txpow = max_txpower_avg;
|
|
ch_info->ht40_scan_power = max_txpower_avg;
|
|
}
|
|
break;
|
|
}
|
|
ch_info++;
|
|
}
|
|
return max_txpower_avg;
|
|
}
|
|
|
|
/**
|
|
* iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
|
|
*/
|
|
void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
|
|
{
|
|
int eeprom_section_count = 0;
|
|
int section, element;
|
|
struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
|
|
u32 offset;
|
|
s8 max_txpower_avg; /* (dBm) */
|
|
|
|
/* Loop through all the sections
|
|
* adjust bands and channel's max tx power
|
|
* Set the tx_power_user_lmt to the highest power
|
|
* supported by any channels and chains
|
|
*/
|
|
for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
|
|
eeprom_section_count = enhinfo[section].count;
|
|
offset = enhinfo[section].offset;
|
|
enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
|
|
iwl_eeprom_query_addr(priv, offset);
|
|
|
|
for (element = 0; element < eeprom_section_count; element++) {
|
|
if (enhinfo[section].is_common)
|
|
max_txpower_avg =
|
|
iwl_update_common_txpower(priv,
|
|
enhanced_txpower, section, element);
|
|
else
|
|
max_txpower_avg =
|
|
iwl_update_channel_txpower(priv,
|
|
enhanced_txpower, section, element);
|
|
|
|
/* Update the tx_power_user_lmt to the highest power
|
|
* supported by any channel */
|
|
if (max_txpower_avg > priv->tx_power_user_lmt)
|
|
priv->tx_power_user_lmt = max_txpower_avg;
|
|
}
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
|
|
|
|
#define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
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? # x " " : "")
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/**
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* iwl_init_channel_map - Set up driver's info for all possible channels
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*/
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int iwl_init_channel_map(struct iwl_priv *priv)
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{
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int eeprom_ch_count = 0;
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const u8 *eeprom_ch_index = NULL;
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const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
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int band, ch;
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struct iwl_channel_info *ch_info;
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if (priv->channel_count) {
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IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
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return 0;
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}
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IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
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priv->channel_count =
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ARRAY_SIZE(iwl_eeprom_band_1) +
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ARRAY_SIZE(iwl_eeprom_band_2) +
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ARRAY_SIZE(iwl_eeprom_band_3) +
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ARRAY_SIZE(iwl_eeprom_band_4) +
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ARRAY_SIZE(iwl_eeprom_band_5);
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IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
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priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
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priv->channel_count, GFP_KERNEL);
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if (!priv->channel_info) {
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IWL_ERR(priv, "Could not allocate channel_info\n");
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priv->channel_count = 0;
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return -ENOMEM;
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}
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ch_info = priv->channel_info;
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/* Loop through the 5 EEPROM bands adding them in order to the
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* channel map we maintain (that contains additional information than
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* what just in the EEPROM) */
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for (band = 1; band <= 5; band++) {
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iwl_init_band_reference(priv, band, &eeprom_ch_count,
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&eeprom_ch_info, &eeprom_ch_index);
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/* Loop through each band adding each of the channels */
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for (ch = 0; ch < eeprom_ch_count; ch++) {
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ch_info->channel = eeprom_ch_index[ch];
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ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
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IEEE80211_BAND_5GHZ;
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/* permanently store EEPROM's channel regulatory flags
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* and max power in channel info database. */
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ch_info->eeprom = eeprom_ch_info[ch];
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/* Copy the run-time flags so they are there even on
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* invalid channels */
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ch_info->flags = eeprom_ch_info[ch].flags;
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/* First write that ht40 is not enabled, and then enable
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* one by one */
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ch_info->ht40_extension_channel =
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IEEE80211_CHAN_NO_HT40;
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if (!(is_channel_valid(ch_info))) {
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IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
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"No traffic\n",
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ch_info->channel,
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ch_info->flags,
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is_channel_a_band(ch_info) ?
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"5.2" : "2.4");
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ch_info++;
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continue;
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}
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/* Initialize regulatory-based run-time data */
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ch_info->max_power_avg = ch_info->curr_txpow =
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eeprom_ch_info[ch].max_power_avg;
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ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
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ch_info->min_power = 0;
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IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
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" Ad-Hoc %ssupported\n",
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ch_info->channel,
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is_channel_a_band(ch_info) ?
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"5.2" : "2.4",
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CHECK_AND_PRINT_I(VALID),
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CHECK_AND_PRINT_I(IBSS),
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CHECK_AND_PRINT_I(ACTIVE),
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CHECK_AND_PRINT_I(RADAR),
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CHECK_AND_PRINT_I(WIDE),
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CHECK_AND_PRINT_I(DFS),
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eeprom_ch_info[ch].flags,
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eeprom_ch_info[ch].max_power_avg,
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((eeprom_ch_info[ch].
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flags & EEPROM_CHANNEL_IBSS)
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&& !(eeprom_ch_info[ch].
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flags & EEPROM_CHANNEL_RADAR))
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? "" : "not ");
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/* Set the tx_power_user_lmt to the highest power
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* supported by any channel */
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if (eeprom_ch_info[ch].max_power_avg >
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priv->tx_power_user_lmt)
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priv->tx_power_user_lmt =
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eeprom_ch_info[ch].max_power_avg;
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ch_info++;
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}
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}
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/* Check if we do have HT40 channels */
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if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
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EEPROM_REGULATORY_BAND_NO_HT40 &&
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priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
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EEPROM_REGULATORY_BAND_NO_HT40)
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return 0;
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/* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
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for (band = 6; band <= 7; band++) {
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enum ieee80211_band ieeeband;
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iwl_init_band_reference(priv, band, &eeprom_ch_count,
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&eeprom_ch_info, &eeprom_ch_index);
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/* EEPROM band 6 is 2.4, band 7 is 5 GHz */
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ieeeband =
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(band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
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/* Loop through each band adding each of the channels */
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for (ch = 0; ch < eeprom_ch_count; ch++) {
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/* Set up driver's info for lower half */
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iwl_mod_ht40_chan_info(priv, ieeeband,
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eeprom_ch_index[ch],
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&eeprom_ch_info[ch],
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IEEE80211_CHAN_NO_HT40PLUS);
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/* Set up driver's info for upper half */
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iwl_mod_ht40_chan_info(priv, ieeeband,
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eeprom_ch_index[ch] + 4,
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&eeprom_ch_info[ch],
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IEEE80211_CHAN_NO_HT40MINUS);
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}
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}
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/* for newer device (6000 series and up)
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* EEPROM contain enhanced tx power information
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* driver need to process addition information
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* to determine the max channel tx power limits
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*/
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if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
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priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
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return 0;
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}
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EXPORT_SYMBOL(iwl_init_channel_map);
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/*
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* iwl_free_channel_map - undo allocations in iwl_init_channel_map
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*/
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void iwl_free_channel_map(struct iwl_priv *priv)
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{
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kfree(priv->channel_info);
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priv->channel_count = 0;
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}
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EXPORT_SYMBOL(iwl_free_channel_map);
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/**
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* iwl_get_channel_info - Find driver's private channel info
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*
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* Based on band and channel number.
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*/
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const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
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enum ieee80211_band band, u16 channel)
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{
|
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int i;
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switch (band) {
|
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case IEEE80211_BAND_5GHZ:
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for (i = 14; i < priv->channel_count; i++) {
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if (priv->channel_info[i].channel == channel)
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return &priv->channel_info[i];
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}
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break;
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case IEEE80211_BAND_2GHZ:
|
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if (channel >= 1 && channel <= 14)
|
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return &priv->channel_info[channel - 1];
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break;
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default:
|
|
BUG();
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}
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|
return NULL;
|
|
}
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|
EXPORT_SYMBOL(iwl_get_channel_info);
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|