667 lines
10 KiB
ArmAsm
667 lines
10 KiB
ArmAsm
/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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2004, 2005, 2006
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Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file into combinations with other programs,
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and to distribute those combinations without any restriction coming
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from the use of this file. (The General Public License restrictions
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do apply in other respects; for example, they cover modification of
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the file, and distribution when not linked into a combine
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executable.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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!! libgcc routines for the Renesas / SuperH SH CPUs.
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!! Contributed by Steve Chamberlain.
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!! sac@cygnus.com
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!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
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!! recoded in assembly by Toshiyasu Morita
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!! tm@netcom.com
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/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
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ELF local label prefixes by J"orn Rennecke
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amylaar@cygnus.com */
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/* This code used shld, thus is not suitable for SH1 / SH2. */
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/* Signed / unsigned division without use of FPU, optimized for SH4.
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Uses a lookup table for divisors in the range -128 .. +128, and
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div1 with case distinction for larger divisors in three more ranges.
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The code is lumped together with the table to allow the use of mova. */
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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#define L_LSB 0
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#define L_LSWMSB 1
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#define L_MSWLSB 2
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#else
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#define L_LSB 3
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#define L_LSWMSB 2
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#define L_MSWLSB 1
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#endif
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.balign 4
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.global __udivsi3_i4i
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.global __udivsi3_i4
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.set __udivsi3_i4, __udivsi3_i4i
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.type __udivsi3_i4i, @function
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__udivsi3_i4i:
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mov.w c128_w, r1
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div0u
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mov r4,r0
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shlr8 r0
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cmp/hi r1,r5
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extu.w r5,r1
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bf udiv_le128
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cmp/eq r5,r1
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bf udiv_ge64k
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shlr r0
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mov r5,r1
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shll16 r5
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mov.l r4,@-r15
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div1 r5,r0
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mov.l r1,@-r15
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div1 r5,r0
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div1 r5,r0
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bra udiv_25
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div1 r5,r0
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div_le128:
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mova div_table_ix,r0
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bra div_le128_2
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mov.b @(r0,r5),r1
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udiv_le128:
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mov.l r4,@-r15
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mova div_table_ix,r0
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mov.b @(r0,r5),r1
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mov.l r5,@-r15
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div_le128_2:
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mova div_table_inv,r0
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mov.l @(r0,r1),r1
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mov r5,r0
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tst #0xfe,r0
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mova div_table_clz,r0
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dmulu.l r1,r4
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mov.b @(r0,r5),r1
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bt/s div_by_1
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mov r4,r0
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mov.l @r15+,r5
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sts mach,r0
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/* clrt */
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addc r4,r0
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mov.l @r15+,r4
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rotcr r0
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rts
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shld r1,r0
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div_by_1_neg:
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neg r4,r0
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div_by_1:
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mov.l @r15+,r5
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rts
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mov.l @r15+,r4
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div_ge64k:
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bt/s div_r8
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div0u
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shll8 r5
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bra div_ge64k_2
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div1 r5,r0
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udiv_ge64k:
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cmp/hi r0,r5
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mov r5,r1
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bt udiv_r8
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shll8 r5
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mov.l r4,@-r15
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div1 r5,r0
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mov.l r1,@-r15
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div_ge64k_2:
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div1 r5,r0
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mov.l zero_l,r1
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.rept 4
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div1 r5,r0
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.endr
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mov.l r1,@-r15
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div1 r5,r0
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mov.w m256_w,r1
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div1 r5,r0
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mov.b r0,@(L_LSWMSB,r15)
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xor r4,r0
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and r1,r0
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bra div_ge64k_end
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xor r4,r0
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div_r8:
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shll16 r4
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bra div_r8_2
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shll8 r4
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udiv_r8:
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mov.l r4,@-r15
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shll16 r4
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clrt
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shll8 r4
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mov.l r5,@-r15
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div_r8_2:
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rotcl r4
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mov r0,r1
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div1 r5,r1
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mov r4,r0
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rotcl r0
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mov r5,r4
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div1 r5,r1
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.rept 5
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rotcl r0; div1 r5,r1
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.endr
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rotcl r0
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mov.l @r15+,r5
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div1 r4,r1
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mov.l @r15+,r4
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rts
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rotcl r0
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.global __sdivsi3_i4i
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.global __sdivsi3_i4
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.global __sdivsi3
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.set __sdivsi3_i4, __sdivsi3_i4i
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.set __sdivsi3, __sdivsi3_i4i
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.type __sdivsi3_i4i, @function
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/* This is link-compatible with a __sdivsi3 call,
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but we effectively clobber only r1. */
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__sdivsi3_i4i:
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mov.l r4,@-r15
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cmp/pz r5
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mov.w c128_w, r1
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bt/s pos_divisor
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cmp/pz r4
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mov.l r5,@-r15
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neg r5,r5
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bt/s neg_result
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cmp/hi r1,r5
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neg r4,r4
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pos_result:
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extu.w r5,r0
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bf div_le128
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cmp/eq r5,r0
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mov r4,r0
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shlr8 r0
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bf/s div_ge64k
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cmp/hi r0,r5
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div0u
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shll16 r5
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div1 r5,r0
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div1 r5,r0
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div1 r5,r0
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udiv_25:
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mov.l zero_l,r1
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div1 r5,r0
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div1 r5,r0
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mov.l r1,@-r15
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.rept 3
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div1 r5,r0
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.endr
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mov.b r0,@(L_MSWLSB,r15)
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xtrct r4,r0
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swap.w r0,r0
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.rept 8
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div1 r5,r0
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.endr
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mov.b r0,@(L_LSWMSB,r15)
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div_ge64k_end:
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.rept 8
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div1 r5,r0
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.endr
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mov.l @r15+,r4 ! zero-extension and swap using LS unit.
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extu.b r0,r0
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mov.l @r15+,r5
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or r4,r0
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mov.l @r15+,r4
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rts
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rotcl r0
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div_le128_neg:
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tst #0xfe,r0
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mova div_table_ix,r0
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mov.b @(r0,r5),r1
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mova div_table_inv,r0
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bt/s div_by_1_neg
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mov.l @(r0,r1),r1
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mova div_table_clz,r0
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dmulu.l r1,r4
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mov.b @(r0,r5),r1
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mov.l @r15+,r5
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sts mach,r0
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/* clrt */
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addc r4,r0
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mov.l @r15+,r4
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rotcr r0
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shld r1,r0
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rts
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neg r0,r0
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pos_divisor:
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mov.l r5,@-r15
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bt/s pos_result
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cmp/hi r1,r5
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neg r4,r4
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neg_result:
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extu.w r5,r0
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bf div_le128_neg
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cmp/eq r5,r0
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mov r4,r0
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shlr8 r0
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bf/s div_ge64k_neg
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cmp/hi r0,r5
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div0u
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mov.l zero_l,r1
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shll16 r5
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div1 r5,r0
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mov.l r1,@-r15
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.rept 7
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div1 r5,r0
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.endr
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mov.b r0,@(L_MSWLSB,r15)
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xtrct r4,r0
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swap.w r0,r0
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.rept 8
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div1 r5,r0
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.endr
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mov.b r0,@(L_LSWMSB,r15)
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div_ge64k_neg_end:
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.rept 8
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div1 r5,r0
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.endr
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mov.l @r15+,r4 ! zero-extension and swap using LS unit.
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extu.b r0,r1
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mov.l @r15+,r5
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or r4,r1
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div_r8_neg_end:
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mov.l @r15+,r4
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rotcl r1
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rts
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neg r1,r0
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div_ge64k_neg:
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bt/s div_r8_neg
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div0u
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shll8 r5
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mov.l zero_l,r1
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.rept 6
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div1 r5,r0
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.endr
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mov.l r1,@-r15
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div1 r5,r0
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mov.w m256_w,r1
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div1 r5,r0
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mov.b r0,@(L_LSWMSB,r15)
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xor r4,r0
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and r1,r0
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bra div_ge64k_neg_end
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xor r4,r0
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c128_w:
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.word 128
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div_r8_neg:
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clrt
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shll16 r4
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mov r4,r1
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shll8 r1
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mov r5,r4
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.rept 7
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rotcl r1; div1 r5,r0
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.endr
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mov.l @r15+,r5
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rotcl r1
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bra div_r8_neg_end
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div1 r4,r0
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m256_w:
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.word 0xff00
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/* This table has been generated by divtab-sh4.c. */
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.balign 4
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div_table_clz:
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.byte 0
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.byte 1
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.byte 0
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.byte -1
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.byte -1
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.byte -2
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.byte -2
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.byte -2
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.byte -2
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.byte -3
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.byte -3
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.byte -3
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.byte -3
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.byte -3
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.byte -3
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.byte -3
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.byte -3
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -4
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -5
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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.byte -6
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/* Lookup table translating positive divisor to index into table of
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normalized inverse. N.B. the '0' entry is also the last entry of the
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previous table, and causes an unaligned access for division by zero. */
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div_table_ix:
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.byte -6
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.byte -128
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.byte -128
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.byte 0
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.byte -128
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.byte -64
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.byte 0
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.byte 64
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.byte -128
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.byte -96
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.byte -64
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.byte -32
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.byte 0
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.byte 32
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.byte 64
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.byte 96
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.byte -128
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.byte -112
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.byte -96
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.byte -80
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.byte -64
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.byte -48
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.byte -32
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.byte -16
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.byte 0
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.byte 16
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.byte 32
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.byte 48
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.byte 64
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.byte 80
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.byte 96
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.byte 112
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.byte -128
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.byte -120
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.byte -112
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.byte -104
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.byte -96
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.byte -88
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.byte -80
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.byte -72
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.byte -64
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.byte -56
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.byte -48
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.byte -40
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.byte -32
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.byte -24
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.byte -16
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.byte -8
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.byte 0
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.byte 8
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.byte 16
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.byte 24
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.byte 32
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.byte 40
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.byte 48
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.byte 56
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.byte 64
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.byte 72
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.byte 80
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.byte 88
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.byte 96
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.byte 104
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.byte 112
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.byte 120
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.byte -128
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.byte -124
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.byte -120
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.byte -116
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.byte -112
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.byte -108
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.byte -104
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.byte -100
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.byte -96
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.byte -92
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.byte -88
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.byte -84
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.byte -80
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.byte -76
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.byte -72
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.byte -68
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.byte -64
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.byte -60
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.byte -56
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.byte -52
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.byte -48
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.byte -44
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.byte -40
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.byte -36
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.byte -32
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.byte -28
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.byte -24
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.byte -20
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.byte -16
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.byte -12
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.byte -8
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.byte -4
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.byte 0
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.byte 4
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.byte 8
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.byte 12
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.byte 16
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.byte 20
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.byte 24
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.byte 28
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.byte 32
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.byte 36
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.byte 40
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.byte 44
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.byte 48
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.byte 52
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.byte 56
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.byte 60
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.byte 64
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.byte 68
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.byte 72
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.byte 76
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.byte 80
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|
.byte 84
|
|
.byte 88
|
|
.byte 92
|
|
.byte 96
|
|
.byte 100
|
|
.byte 104
|
|
.byte 108
|
|
.byte 112
|
|
.byte 116
|
|
.byte 120
|
|
.byte 124
|
|
.byte -128
|
|
/* 1/64 .. 1/127, normalized. There is an implicit leading 1 in bit 32. */
|
|
.balign 4
|
|
zero_l:
|
|
.long 0x0
|
|
.long 0xF81F81F9
|
|
.long 0xF07C1F08
|
|
.long 0xE9131AC0
|
|
.long 0xE1E1E1E2
|
|
.long 0xDAE6076C
|
|
.long 0xD41D41D5
|
|
.long 0xCD856891
|
|
.long 0xC71C71C8
|
|
.long 0xC0E07039
|
|
.long 0xBACF914D
|
|
.long 0xB4E81B4F
|
|
.long 0xAF286BCB
|
|
.long 0xA98EF607
|
|
.long 0xA41A41A5
|
|
.long 0x9EC8E952
|
|
.long 0x9999999A
|
|
.long 0x948B0FCE
|
|
.long 0x8F9C18FA
|
|
.long 0x8ACB90F7
|
|
.long 0x86186187
|
|
.long 0x81818182
|
|
.long 0x7D05F418
|
|
.long 0x78A4C818
|
|
.long 0x745D1746
|
|
.long 0x702E05C1
|
|
.long 0x6C16C16D
|
|
.long 0x68168169
|
|
.long 0x642C8591
|
|
.long 0x60581606
|
|
.long 0x5C9882BA
|
|
.long 0x58ED2309
|
|
div_table_inv:
|
|
.long 0x55555556
|
|
.long 0x51D07EAF
|
|
.long 0x4E5E0A73
|
|
.long 0x4AFD6A06
|
|
.long 0x47AE147B
|
|
.long 0x446F8657
|
|
.long 0x41414142
|
|
.long 0x3E22CBCF
|
|
.long 0x3B13B13C
|
|
.long 0x38138139
|
|
.long 0x3521CFB3
|
|
.long 0x323E34A3
|
|
.long 0x2F684BDB
|
|
.long 0x2C9FB4D9
|
|
.long 0x29E4129F
|
|
.long 0x27350B89
|
|
.long 0x24924925
|
|
.long 0x21FB7813
|
|
.long 0x1F7047DD
|
|
.long 0x1CF06ADB
|
|
.long 0x1A7B9612
|
|
.long 0x18118119
|
|
.long 0x15B1E5F8
|
|
.long 0x135C8114
|
|
.long 0x11111112
|
|
.long 0xECF56BF
|
|
.long 0xC9714FC
|
|
.long 0xA6810A7
|
|
.long 0x8421085
|
|
.long 0x624DD30
|
|
.long 0x4104105
|
|
.long 0x2040811
|
|
/* maximum error: 0.987342 scaled: 0.921875*/
|