585 lines
15 KiB
C
585 lines
15 KiB
C
/*
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* Copyright © 2006-2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/i2c.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 temp, reg;
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if (IS_IGDNG(dev))
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reg = PCH_ADPA;
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else
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reg = ADPA;
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temp = I915_READ(reg);
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temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
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temp &= ~ADPA_DAC_ENABLE;
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switch(mode) {
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case DRM_MODE_DPMS_ON:
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temp |= ADPA_DAC_ENABLE;
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break;
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case DRM_MODE_DPMS_STANDBY:
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temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
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break;
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case DRM_MODE_DPMS_SUSPEND:
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temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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case DRM_MODE_DPMS_OFF:
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temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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}
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I915_WRITE(reg, temp);
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if (IS_IGD(dev)) {
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if (mode == DRM_MODE_DPMS_OFF) {
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/* turn off DAC */
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temp = I915_READ(PORT_HOTPLUG_EN);
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temp &= ~CRT_EOS_INT_EN;
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I915_WRITE(PORT_HOTPLUG_EN, temp);
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temp = I915_READ(PORT_HOTPLUG_STAT);
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if (temp & CRT_EOS_INT_STATUS)
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I915_WRITE(PORT_HOTPLUG_STAT,
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CRT_EOS_INT_STATUS);
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} else {
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/* turn on DAC. EOS interrupt must be enabled after DAC
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* is enabled, so it sounds not good to enable it in
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* i915_driver_irq_postinstall()
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* wait 12.5ms after DAC is enabled
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*/
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msleep(13);
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temp = I915_READ(PORT_HOTPLUG_STAT);
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if (temp & CRT_EOS_INT_STATUS)
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I915_WRITE(PORT_HOTPLUG_STAT,
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CRT_EOS_INT_STATUS);
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temp = I915_READ(PORT_HOTPLUG_EN);
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temp |= CRT_EOS_INT_EN;
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I915_WRITE(PORT_HOTPLUG_EN, temp);
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}
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}
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}
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static int intel_crt_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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int max_clock = 0;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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if (mode->clock < 25000)
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return MODE_CLOCK_LOW;
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if (!IS_I9XX(dev))
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max_clock = 350000;
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else
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max_clock = 400000;
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if (mode->clock > max_clock)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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static void intel_crt_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_crtc *crtc = encoder->crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_i915_private *dev_priv = dev->dev_private;
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int dpll_md_reg;
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u32 adpa, dpll_md;
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u32 adpa_reg;
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if (intel_crtc->pipe == 0)
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dpll_md_reg = DPLL_A_MD;
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else
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dpll_md_reg = DPLL_B_MD;
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if (IS_IGDNG(dev))
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adpa_reg = PCH_ADPA;
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else
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adpa_reg = ADPA;
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/*
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* Disable separate mode multiplier used when cloning SDVO to CRT
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* XXX this needs to be adjusted when we really are cloning
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*/
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if (IS_I965G(dev) && !IS_IGDNG(dev)) {
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dpll_md = I915_READ(dpll_md_reg);
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I915_WRITE(dpll_md_reg,
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dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
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}
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adpa = 0;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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adpa |= ADPA_HSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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adpa |= ADPA_VSYNC_ACTIVE_HIGH;
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if (intel_crtc->pipe == 0) {
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adpa |= ADPA_PIPE_A_SELECT;
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if (!IS_IGDNG(dev))
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I915_WRITE(BCLRPAT_A, 0);
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} else {
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adpa |= ADPA_PIPE_B_SELECT;
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if (!IS_IGDNG(dev))
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I915_WRITE(BCLRPAT_B, 0);
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}
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I915_WRITE(adpa_reg, adpa);
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}
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static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 adpa;
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bool ret;
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adpa = I915_READ(PCH_ADPA);
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adpa &= ~ADPA_CRT_HOTPLUG_MASK;
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/* disable HPD first */
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I915_WRITE(PCH_ADPA, adpa);
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(void)I915_READ(PCH_ADPA);
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adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
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ADPA_CRT_HOTPLUG_WARMUP_10MS |
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ADPA_CRT_HOTPLUG_SAMPLE_4S |
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ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
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ADPA_CRT_HOTPLUG_VOLREF_325MV |
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ADPA_CRT_HOTPLUG_ENABLE |
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ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
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DRM_DEBUG("pch crt adpa 0x%x", adpa);
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I915_WRITE(PCH_ADPA, adpa);
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while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
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;
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/* Check the status to see if both blue and green are on now */
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adpa = I915_READ(PCH_ADPA);
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adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
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if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
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(adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
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ret = true;
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else
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ret = false;
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return ret;
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}
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/**
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* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
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*
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* Not for i915G/i915GM
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*
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* \return true if CRT is connected.
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* \return false if CRT is disconnected.
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*/
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static bool intel_crt_detect_hotplug(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 hotplug_en;
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int i, tries = 0;
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if (IS_IGDNG(dev))
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return intel_igdng_crt_detect_hotplug(connector);
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/*
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* On 4 series desktop, CRT detect sequence need to be done twice
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* to get a reliable result.
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*/
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if (IS_G4X(dev) && !IS_GM45(dev))
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tries = 2;
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else
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tries = 1;
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hotplug_en = I915_READ(PORT_HOTPLUG_EN);
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hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
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hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
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if (IS_G4X(dev))
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hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
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hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
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for (i = 0; i < tries ; i++) {
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unsigned long timeout;
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/* turn on the FORCE_DETECT */
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I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
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timeout = jiffies + msecs_to_jiffies(1000);
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/* wait for FORCE_DETECT to go off */
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do {
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if (!(I915_READ(PORT_HOTPLUG_EN) &
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CRT_HOTPLUG_FORCE_DETECT))
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break;
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msleep(1);
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} while (time_after(timeout, jiffies));
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}
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if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
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CRT_HOTPLUG_MONITOR_NONE)
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return true;
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return false;
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}
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static bool intel_crt_detect_ddc(struct drm_connector *connector)
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{
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struct intel_output *intel_output = to_intel_output(connector);
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/* CRT should always be at 0, but check anyway */
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if (intel_output->type != INTEL_OUTPUT_ANALOG)
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return false;
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return intel_ddc_probe(intel_output);
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}
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static enum drm_connector_status
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intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
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{
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struct drm_encoder *encoder = &intel_output->enc;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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uint32_t pipe = intel_crtc->pipe;
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uint32_t save_bclrpat;
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uint32_t save_vtotal;
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uint32_t vtotal, vactive;
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uint32_t vsample;
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uint32_t vblank, vblank_start, vblank_end;
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uint32_t dsl;
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uint32_t bclrpat_reg;
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uint32_t vtotal_reg;
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uint32_t vblank_reg;
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uint32_t vsync_reg;
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uint32_t pipeconf_reg;
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uint32_t pipe_dsl_reg;
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uint8_t st00;
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enum drm_connector_status status;
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if (pipe == 0) {
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bclrpat_reg = BCLRPAT_A;
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vtotal_reg = VTOTAL_A;
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vblank_reg = VBLANK_A;
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vsync_reg = VSYNC_A;
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pipeconf_reg = PIPEACONF;
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pipe_dsl_reg = PIPEADSL;
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} else {
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bclrpat_reg = BCLRPAT_B;
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vtotal_reg = VTOTAL_B;
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vblank_reg = VBLANK_B;
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vsync_reg = VSYNC_B;
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pipeconf_reg = PIPEBCONF;
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pipe_dsl_reg = PIPEBDSL;
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}
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save_bclrpat = I915_READ(bclrpat_reg);
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save_vtotal = I915_READ(vtotal_reg);
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vblank = I915_READ(vblank_reg);
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vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
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vactive = (save_vtotal & 0x7ff) + 1;
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vblank_start = (vblank & 0xfff) + 1;
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vblank_end = ((vblank >> 16) & 0xfff) + 1;
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/* Set the border color to purple. */
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I915_WRITE(bclrpat_reg, 0x500050);
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if (IS_I9XX(dev)) {
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uint32_t pipeconf = I915_READ(pipeconf_reg);
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I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
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/* Wait for next Vblank to substitue
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* border color for Color info */
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intel_wait_for_vblank(dev);
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st00 = I915_READ8(VGA_MSR_WRITE);
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status = ((st00 & (1 << 4)) != 0) ?
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connector_status_connected :
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connector_status_disconnected;
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I915_WRITE(pipeconf_reg, pipeconf);
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} else {
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bool restore_vblank = false;
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int count, detect;
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/*
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* If there isn't any border, add some.
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* Yes, this will flicker
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*/
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if (vblank_start <= vactive && vblank_end >= vtotal) {
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uint32_t vsync = I915_READ(vsync_reg);
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uint32_t vsync_start = (vsync & 0xffff) + 1;
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vblank_start = vsync_start;
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I915_WRITE(vblank_reg,
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(vblank_start - 1) |
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((vblank_end - 1) << 16));
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restore_vblank = true;
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}
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/* sample in the vertical border, selecting the larger one */
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if (vblank_start - vactive >= vtotal - vblank_end)
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vsample = (vblank_start + vactive) >> 1;
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else
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vsample = (vtotal + vblank_end) >> 1;
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/*
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* Wait for the border to be displayed
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*/
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while (I915_READ(pipe_dsl_reg) >= vactive)
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;
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while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
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;
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/*
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* Watch ST00 for an entire scanline
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*/
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detect = 0;
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count = 0;
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do {
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count++;
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/* Read the ST00 VGA status register */
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st00 = I915_READ8(VGA_MSR_WRITE);
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if (st00 & (1 << 4))
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detect++;
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} while ((I915_READ(pipe_dsl_reg) == dsl));
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/* restore vblank if necessary */
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if (restore_vblank)
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I915_WRITE(vblank_reg, vblank);
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/*
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* If more than 3/4 of the scanline detected a monitor,
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* then it is assumed to be present. This works even on i830,
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* where there isn't any way to force the border color across
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* the screen
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*/
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status = detect * 4 > count * 3 ?
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connector_status_connected :
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connector_status_disconnected;
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}
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/* Restore previous settings */
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I915_WRITE(bclrpat_reg, save_bclrpat);
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return status;
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}
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static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct intel_output *intel_output = to_intel_output(connector);
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struct drm_encoder *encoder = &intel_output->enc;
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struct drm_crtc *crtc;
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int dpms_mode;
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enum drm_connector_status status;
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if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
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if (intel_crt_detect_hotplug(connector))
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return connector_status_connected;
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else
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return connector_status_disconnected;
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}
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if (intel_crt_detect_ddc(connector))
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return connector_status_connected;
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/* for pre-945g platforms use load detect */
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if (encoder->crtc && encoder->crtc->enabled) {
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status = intel_crt_load_detect(encoder->crtc, intel_output);
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} else {
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crtc = intel_get_load_detect_pipe(intel_output,
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NULL, &dpms_mode);
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if (crtc) {
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status = intel_crt_load_detect(crtc, intel_output);
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intel_release_load_detect_pipe(intel_output, dpms_mode);
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} else
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status = connector_status_unknown;
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}
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return status;
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}
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static void intel_crt_destroy(struct drm_connector *connector)
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{
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struct intel_output *intel_output = to_intel_output(connector);
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intel_i2c_destroy(intel_output->ddc_bus);
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drm_sysfs_connector_remove(connector);
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drm_connector_cleanup(connector);
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kfree(connector);
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}
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static int intel_crt_get_modes(struct drm_connector *connector)
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{
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int ret;
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struct intel_output *intel_output = to_intel_output(connector);
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struct i2c_adapter *ddcbus;
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struct drm_device *dev = connector->dev;
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ret = intel_ddc_get_modes(intel_output);
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if (ret || !IS_G4X(dev))
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goto end;
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ddcbus = intel_output->ddc_bus;
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/* Try to probe digital port for output in DVI-I -> VGA mode. */
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intel_output->ddc_bus =
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intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
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if (!intel_output->ddc_bus) {
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intel_output->ddc_bus = ddcbus;
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dev_printk(KERN_ERR, &connector->dev->pdev->dev,
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"DDC bus registration failed for CRTDDC_D.\n");
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goto end;
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}
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/* Try to get modes by GPIOD port */
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ret = intel_ddc_get_modes(intel_output);
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intel_i2c_destroy(ddcbus);
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end:
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return ret;
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}
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static int intel_crt_set_property(struct drm_connector *connector,
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struct drm_property *property,
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uint64_t value)
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{
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return 0;
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}
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|
|
|
/*
|
|
* Routines for controlling stuff on the analog port
|
|
*/
|
|
|
|
static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
|
|
.dpms = intel_crt_dpms,
|
|
.mode_fixup = intel_crt_mode_fixup,
|
|
.prepare = intel_encoder_prepare,
|
|
.commit = intel_encoder_commit,
|
|
.mode_set = intel_crt_mode_set,
|
|
};
|
|
|
|
static const struct drm_connector_funcs intel_crt_connector_funcs = {
|
|
.dpms = drm_helper_connector_dpms,
|
|
.detect = intel_crt_detect,
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.destroy = intel_crt_destroy,
|
|
.set_property = intel_crt_set_property,
|
|
};
|
|
|
|
static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
|
|
.mode_valid = intel_crt_mode_valid,
|
|
.get_modes = intel_crt_get_modes,
|
|
.best_encoder = intel_best_encoder,
|
|
};
|
|
|
|
static void intel_crt_enc_destroy(struct drm_encoder *encoder)
|
|
{
|
|
drm_encoder_cleanup(encoder);
|
|
}
|
|
|
|
static const struct drm_encoder_funcs intel_crt_enc_funcs = {
|
|
.destroy = intel_crt_enc_destroy,
|
|
};
|
|
|
|
void intel_crt_init(struct drm_device *dev)
|
|
{
|
|
struct drm_connector *connector;
|
|
struct intel_output *intel_output;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
u32 i2c_reg;
|
|
|
|
intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
|
|
if (!intel_output)
|
|
return;
|
|
|
|
connector = &intel_output->base;
|
|
drm_connector_init(dev, &intel_output->base,
|
|
&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
|
|
|
drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
|
|
DRM_MODE_ENCODER_DAC);
|
|
|
|
drm_mode_connector_attach_encoder(&intel_output->base,
|
|
&intel_output->enc);
|
|
|
|
/* Set up the DDC bus. */
|
|
if (IS_IGDNG(dev))
|
|
i2c_reg = PCH_GPIOA;
|
|
else {
|
|
i2c_reg = GPIOA;
|
|
/* Use VBT information for CRT DDC if available */
|
|
if (dev_priv->crt_ddc_bus != 0)
|
|
i2c_reg = dev_priv->crt_ddc_bus;
|
|
}
|
|
intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
|
|
if (!intel_output->ddc_bus) {
|
|
dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
|
|
"failed.\n");
|
|
return;
|
|
}
|
|
|
|
intel_output->type = INTEL_OUTPUT_ANALOG;
|
|
intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
|
|
(1 << INTEL_ANALOG_CLONE_BIT) |
|
|
(1 << INTEL_SDVO_LVDS_CLONE_BIT);
|
|
intel_output->crtc_mask = (1 << 0) | (1 << 1);
|
|
connector->interlace_allowed = 0;
|
|
connector->doublescan_allowed = 0;
|
|
|
|
drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
|
|
drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
|
|
|
|
drm_sysfs_connector_add(connector);
|
|
|
|
dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
|
|
}
|