366 lines
11 KiB
C
366 lines
11 KiB
C
/*
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* External Interrupt Controller on Spider South Bridge
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*
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* Author: Arnd Bergmann <arndb@de.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/ioport.h>
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#include <asm/pgtable.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include "interrupt.h"
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/* register layout taken from Spider spec, table 7.4-4 */
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enum {
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TIR_DEN = 0x004, /* Detection Enable Register */
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TIR_MSK = 0x084, /* Mask Level Register */
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TIR_EDC = 0x0c0, /* Edge Detection Clear Register */
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TIR_PNDA = 0x100, /* Pending Register A */
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TIR_PNDB = 0x104, /* Pending Register B */
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TIR_CS = 0x144, /* Current Status Register */
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TIR_LCSA = 0x150, /* Level Current Status Register A */
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TIR_LCSB = 0x154, /* Level Current Status Register B */
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TIR_LCSC = 0x158, /* Level Current Status Register C */
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TIR_LCSD = 0x15c, /* Level Current Status Register D */
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TIR_CFGA = 0x200, /* Setting Register A0 */
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TIR_CFGB = 0x204, /* Setting Register B0 */
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/* 0x208 ... 0x3ff Setting Register An/Bn */
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TIR_PPNDA = 0x400, /* Packet Pending Register A */
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TIR_PPNDB = 0x404, /* Packet Pending Register B */
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TIR_PIERA = 0x408, /* Packet Output Error Register A */
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TIR_PIERB = 0x40c, /* Packet Output Error Register B */
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TIR_PIEN = 0x444, /* Packet Output Enable Register */
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TIR_PIPND = 0x454, /* Packet Output Pending Register */
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TIRDID = 0x484, /* Spider Device ID Register */
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REISTIM = 0x500, /* Reissue Command Timeout Time Setting */
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REISTIMEN = 0x504, /* Reissue Command Timeout Setting */
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REISWAITEN = 0x508, /* Reissue Wait Control*/
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};
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#define SPIDER_CHIP_COUNT 4
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#define SPIDER_SRC_COUNT 64
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#define SPIDER_IRQ_INVALID 63
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struct spider_pic {
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struct irq_host *host;
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void __iomem *regs;
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unsigned int node_id;
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};
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static struct spider_pic spider_pics[SPIDER_CHIP_COUNT];
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static struct spider_pic *spider_virq_to_pic(unsigned int virq)
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{
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return irq_map[virq].host->host_data;
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}
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static void __iomem *spider_get_irq_config(struct spider_pic *pic,
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unsigned int src)
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{
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return pic->regs + TIR_CFGA + 8 * src;
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}
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static void spider_unmask_irq(unsigned int virq)
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{
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struct spider_pic *pic = spider_virq_to_pic(virq);
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void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
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out_be32(cfg, in_be32(cfg) | 0x30000000u);
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}
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static void spider_mask_irq(unsigned int virq)
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{
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struct spider_pic *pic = spider_virq_to_pic(virq);
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void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
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out_be32(cfg, in_be32(cfg) & ~0x30000000u);
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}
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static void spider_ack_irq(unsigned int virq)
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{
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struct spider_pic *pic = spider_virq_to_pic(virq);
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unsigned int src = irq_map[virq].hwirq;
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/* Reset edge detection logic if necessary
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*/
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if (get_irq_desc(virq)->status & IRQ_LEVEL)
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return;
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/* Only interrupts 47 to 50 can be set to edge */
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if (src < 47 || src > 50)
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return;
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/* Perform the clear of the edge logic */
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out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf));
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}
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static int spider_set_irq_type(unsigned int virq, unsigned int type)
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{
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unsigned int sense = type & IRQ_TYPE_SENSE_MASK;
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struct spider_pic *pic = spider_virq_to_pic(virq);
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unsigned int hw = irq_map[virq].hwirq;
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void __iomem *cfg = spider_get_irq_config(pic, hw);
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struct irq_desc *desc = get_irq_desc(virq);
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u32 old_mask;
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u32 ic;
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/* Note that only level high is supported for most interrupts */
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if (sense != IRQ_TYPE_NONE && sense != IRQ_TYPE_LEVEL_HIGH &&
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(hw < 47 || hw > 50))
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return -EINVAL;
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/* Decode sense type */
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switch(sense) {
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case IRQ_TYPE_EDGE_RISING:
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ic = 0x3;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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ic = 0x2;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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ic = 0x0;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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case IRQ_TYPE_NONE:
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ic = 0x1;
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break;
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default:
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return -EINVAL;
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}
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/* Update irq_desc */
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= type & IRQ_TYPE_SENSE_MASK;
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if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
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desc->status |= IRQ_LEVEL;
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/* Configure the source. One gross hack that was there before and
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* that I've kept around is the priority to the BE which I set to
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* be the same as the interrupt source number. I don't know wether
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* that's supposed to make any kind of sense however, we'll have to
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* decide that, but for now, I'm not changing the behaviour.
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*/
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old_mask = in_be32(cfg) & 0x30000000u;
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out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) |
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(pic->node_id << 4) | 0xe);
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out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff));
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return 0;
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}
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static struct irq_chip spider_pic = {
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.typename = " SPIDER ",
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.unmask = spider_unmask_irq,
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.mask = spider_mask_irq,
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.ack = spider_ack_irq,
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.set_type = spider_set_irq_type,
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};
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static int spider_host_map(struct irq_host *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq);
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/* Set default irq type */
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set_irq_type(virq, IRQ_TYPE_NONE);
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return 0;
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}
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static int spider_host_xlate(struct irq_host *h, struct device_node *ct,
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u32 *intspec, unsigned int intsize,
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irq_hw_number_t *out_hwirq, unsigned int *out_flags)
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{
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/* Spider interrupts have 2 cells, first is the interrupt source,
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* second, well, I don't know for sure yet ... We mask the top bits
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* because old device-trees encode a node number in there
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*/
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*out_hwirq = intspec[0] & 0x3f;
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*out_flags = IRQ_TYPE_LEVEL_HIGH;
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return 0;
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}
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static struct irq_host_ops spider_host_ops = {
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.map = spider_host_map,
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.xlate = spider_host_xlate,
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};
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static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct spider_pic *pic = desc->handler_data;
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unsigned int cs, virq;
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cs = in_be32(pic->regs + TIR_CS) >> 24;
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if (cs == SPIDER_IRQ_INVALID)
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virq = NO_IRQ;
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else
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virq = irq_linear_revmap(pic->host, cs);
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if (virq != NO_IRQ)
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generic_handle_irq(virq);
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desc->chip->eoi(irq);
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}
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/* For hooking up the cascace we have a problem. Our device-tree is
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* crap and we don't know on which BE iic interrupt we are hooked on at
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* least not the "standard" way. We can reconstitute it based on two
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* informations though: which BE node we are connected to and wether
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* we are connected to IOIF0 or IOIF1. Right now, we really only care
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* about the IBM cell blade and we know that its firmware gives us an
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* interrupt-map property which is pretty strange.
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*/
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static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
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{
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unsigned int virq;
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const u32 *imap, *tmp;
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int imaplen, intsize, unit;
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struct device_node *iic;
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/* First, we check wether we have a real "interrupts" in the device
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* tree in case the device-tree is ever fixed
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*/
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struct of_irq oirq;
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if (of_irq_map_one(pic->host->of_node, 0, &oirq) == 0) {
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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return virq;
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}
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/* Now do the horrible hacks */
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tmp = of_get_property(pic->host->of_node, "#interrupt-cells", NULL);
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if (tmp == NULL)
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return NO_IRQ;
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intsize = *tmp;
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imap = of_get_property(pic->host->of_node, "interrupt-map", &imaplen);
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if (imap == NULL || imaplen < (intsize + 1))
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return NO_IRQ;
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iic = of_find_node_by_phandle(imap[intsize]);
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if (iic == NULL)
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return NO_IRQ;
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imap += intsize + 1;
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tmp = of_get_property(iic, "#interrupt-cells", NULL);
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if (tmp == NULL)
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return NO_IRQ;
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intsize = *tmp;
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/* Assume unit is last entry of interrupt specifier */
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unit = imap[intsize - 1];
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/* Ok, we have a unit, now let's try to get the node */
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tmp = of_get_property(iic, "ibm,interrupt-server-ranges", NULL);
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if (tmp == NULL) {
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of_node_put(iic);
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return NO_IRQ;
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}
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/* ugly as hell but works for now */
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pic->node_id = (*tmp) >> 1;
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of_node_put(iic);
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/* Ok, now let's get cracking. You may ask me why I just didn't match
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* the iic host from the iic OF node, but that way I'm still compatible
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* with really really old old firmwares for which we don't have a node
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*/
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/* Manufacture an IIC interrupt number of class 2 */
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virq = irq_create_mapping(NULL,
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(pic->node_id << IIC_IRQ_NODE_SHIFT) |
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(2 << IIC_IRQ_CLASS_SHIFT) |
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unit);
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if (virq == NO_IRQ)
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printk(KERN_ERR "spider_pic: failed to map cascade !");
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return virq;
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}
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static void __init spider_init_one(struct device_node *of_node, int chip,
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unsigned long addr)
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{
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struct spider_pic *pic = &spider_pics[chip];
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int i, virq;
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/* Map registers */
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pic->regs = ioremap(addr, 0x1000);
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if (pic->regs == NULL)
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panic("spider_pic: can't map registers !");
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/* Allocate a host */
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pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR,
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SPIDER_SRC_COUNT, &spider_host_ops,
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SPIDER_IRQ_INVALID);
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if (pic->host == NULL)
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panic("spider_pic: can't allocate irq host !");
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pic->host->host_data = pic;
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/* Go through all sources and disable them */
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for (i = 0; i < SPIDER_SRC_COUNT; i++) {
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void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i;
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out_be32(cfg, in_be32(cfg) & ~0x30000000u);
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}
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/* do not mask any interrupts because of level */
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out_be32(pic->regs + TIR_MSK, 0x0);
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/* enable interrupt packets to be output */
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out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1);
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/* Hook up the cascade interrupt to the iic and nodeid */
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virq = spider_find_cascade_and_node(pic);
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if (virq == NO_IRQ)
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return;
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set_irq_data(virq, pic);
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set_irq_chained_handler(virq, spider_irq_cascade);
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printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n",
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pic->node_id, addr, of_node->full_name);
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/* Enable the interrupt detection enable bit. Do this last! */
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out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1);
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}
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void __init spider_init_IRQ(void)
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{
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struct resource r;
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struct device_node *dn;
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int chip = 0;
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/* XXX node numbers are totally bogus. We _hope_ we get the device
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* nodes in the right order here but that's definitely not guaranteed,
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* we need to get the node from the device tree instead.
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* There is currently no proper property for it (but our whole
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* device-tree is bogus anyway) so all we can do is pray or maybe test
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* the address and deduce the node-id
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*/
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for (dn = NULL;
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(dn = of_find_node_by_name(dn, "interrupt-controller"));) {
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if (of_device_is_compatible(dn, "CBEA,platform-spider-pic")) {
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if (of_address_to_resource(dn, 0, &r)) {
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printk(KERN_WARNING "spider-pic: Failed\n");
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continue;
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}
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} else if (of_device_is_compatible(dn, "sti,platform-spider-pic")
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&& (chip < 2)) {
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static long hard_coded_pics[] =
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{ 0x24000008000ul, 0x34000008000ul};
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r.start = hard_coded_pics[chip];
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} else
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continue;
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spider_init_one(dn, chip++, r.start);
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}
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}
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