2020-08-29 15:32:42 +02:00
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// SPDX-License-Identifier: GPL-2.0
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2017-08-27 23:54:49 +02:00
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/*
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* ddbridge-max.c: Digital Devices MAX card line support functions
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*
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* Copyright (C) 2010-2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, point your browser to
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-i2c.h"
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/* MAX LNB interface related module parameters */
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2023-07-31 22:31:44 +02:00
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static int delmode;
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module_param(delmode, int, 0444);
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MODULE_PARM_DESC(delmode, "frontend delivery system mode");
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2017-08-27 23:54:49 +02:00
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static int fmode;
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module_param(fmode, int, 0444);
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MODULE_PARM_DESC(fmode, "frontend emulation mode");
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static int fmode_sat = -1;
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module_param(fmode_sat, int, 0444);
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MODULE_PARM_DESC(fmode_sat, "set frontend emulation mode sat");
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static int old_quattro;
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module_param(old_quattro, int, 0444);
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MODULE_PARM_DESC(old_quattro, "old quattro LNB input order ");
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2021-03-09 20:21:09 +01:00
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static int no_voltage;
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module_param(no_voltage, int, 0444);
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MODULE_PARM_DESC(no_voltage, "Do not enable voltage on LNBH (will also disable 22KHz tone).");
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2017-08-27 23:54:49 +02:00
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/* MAX LNB interface related functions */
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static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd)
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{
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u32 c, v = 0, tag = DDB_LINK_TAG(link);
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2023-07-31 22:29:08 +02:00
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u32 base = dev->link[link].info->lnb_base;
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2017-08-27 23:54:49 +02:00
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v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb));
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2023-07-31 22:29:08 +02:00
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ddbwritel(dev, cmd | v, tag | base | LNB_CONTROL(lnb));
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2017-08-27 23:54:49 +02:00
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for (c = 0; c < 10; c++) {
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2023-07-31 22:29:08 +02:00
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v = ddbreadl(dev, tag | base | LNB_CONTROL(lnb));
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2017-08-27 23:54:49 +02:00
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if ((v & LNB_BUSY) == 0)
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break;
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msleep(20);
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}
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if (c == 10)
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dev_info(dev->dev,
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"%s lnb = %08x cmd = %08x\n",
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__func__, lnb, cmd);
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return 0;
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}
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2021-03-11 22:31:52 +01:00
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static int max_set_input(struct dvb_frontend *fe, int in);
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2018-06-23 16:52:22 +02:00
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static int max_emulate_switch(struct dvb_frontend *fe,
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u8 *cmd, u32 len)
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{
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int input;
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2020-08-29 15:32:42 +02:00
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if (len != 4)
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2018-06-23 16:52:22 +02:00
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return -1;
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if ((cmd[0] != 0xe0) || (cmd[1] != 0x10) || (cmd[2] != 0x39))
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return -1;
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input = cmd[3] & 3;
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2021-03-11 22:31:52 +01:00
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max_set_input(fe, input);
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2018-06-23 16:52:22 +02:00
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return 0;
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}
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2017-08-27 23:54:49 +02:00
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static int max_send_master_cmd(struct dvb_frontend *fe,
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struct dvb_diseqc_master_cmd *cmd)
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{
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struct ddb_input *input = fe->sec_priv;
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struct ddb_port *port = input->port;
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struct ddb *dev = port->dev;
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struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
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u32 tag = DDB_LINK_TAG(port->lnr);
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2023-07-31 22:29:08 +02:00
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u32 base = dev->link[port->lnr].info->lnb_base;
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2017-08-27 23:54:49 +02:00
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int i;
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u32 fmode = dev->link[port->lnr].lnb.fmode;
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if (fmode == 2 || fmode == 1)
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return 0;
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2018-06-23 16:52:22 +02:00
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if (fmode == 4)
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2021-03-11 22:31:52 +01:00
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if (!max_emulate_switch(fe, cmd->msg, cmd->msg_len))
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return 0;
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2018-06-23 16:52:22 +02:00
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2017-08-27 23:54:49 +02:00
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if (dvb->diseqc_send_master_cmd)
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dvb->diseqc_send_master_cmd(fe, cmd);
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mutex_lock(&dev->link[port->lnr].lnb.lock);
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2023-07-31 22:29:08 +02:00
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ddbwritel(dev, 0, tag | base | LNB_BUF_LEVEL(dvb->input));
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2017-08-27 23:54:49 +02:00
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for (i = 0; i < cmd->msg_len; i++)
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2023-07-31 22:29:08 +02:00
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ddbwritel(dev, cmd->msg[i], tag | base | LNB_BUF_WRITE(dvb->input));
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2017-08-27 23:54:49 +02:00
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lnb_command(dev, port->lnr, dvb->input, LNB_CMD_DISEQC);
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mutex_unlock(&dev->link[port->lnr].lnb.lock);
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return 0;
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}
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static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input,
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struct dvb_diseqc_master_cmd *cmd)
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{
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u32 tag = DDB_LINK_TAG(link);
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2023-07-31 22:29:08 +02:00
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u32 base = dev->link[link].info->lnb_base;
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2017-08-27 23:54:49 +02:00
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int i;
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2023-07-31 22:29:08 +02:00
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ddbwritel(dev, 0, tag | base | LNB_BUF_LEVEL(input));
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2017-08-27 23:54:49 +02:00
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for (i = 0; i < cmd->msg_len; i++)
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2023-07-31 22:29:08 +02:00
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ddbwritel(dev, cmd->msg[i], tag | base | LNB_BUF_WRITE(input));
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2017-08-27 23:54:49 +02:00
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lnb_command(dev, link, input, LNB_CMD_DISEQC);
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return 0;
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}
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static int lnb_set_sat(struct ddb *dev, u32 link,
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u32 input, u32 sat, u32 band, u32 hor)
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{
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struct dvb_diseqc_master_cmd cmd = {
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.msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00},
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.msg_len = 4
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};
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cmd.msg[3] = 0xf0 | (((sat << 2) & 0x0c) |
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(band ? 1 : 0) | (hor ? 2 : 0));
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return lnb_send_diseqc(dev, link, input, &cmd);
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}
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static int lnb_set_tone(struct ddb *dev, u32 link, u32 input,
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2017-09-10 23:11:15 +02:00
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enum fe_sec_tone_mode tone)
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2017-08-27 23:54:49 +02:00
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{
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int s = 0;
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u32 mask = (1ULL << input);
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switch (tone) {
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case SEC_TONE_OFF:
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if (!(dev->link[link].lnb.tone & mask))
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return 0;
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dev->link[link].lnb.tone &= ~(1ULL << input);
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break;
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case SEC_TONE_ON:
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if (dev->link[link].lnb.tone & mask)
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return 0;
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dev->link[link].lnb.tone |= (1ULL << input);
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break;
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default:
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s = -EINVAL;
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break;
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2017-09-10 23:11:15 +02:00
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}
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2017-08-27 23:54:49 +02:00
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if (!s)
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s = lnb_command(dev, link, input, LNB_CMD_NOP);
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return s;
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}
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static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input,
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2017-09-10 23:11:15 +02:00
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enum fe_sec_voltage voltage)
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2017-08-27 23:54:49 +02:00
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{
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int s = 0;
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2021-03-09 20:21:09 +01:00
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if (no_voltage)
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voltage = SEC_VOLTAGE_OFF;
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2017-08-27 23:54:49 +02:00
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if (dev->link[link].lnb.oldvoltage[input] == voltage)
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return 0;
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switch (voltage) {
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case SEC_VOLTAGE_OFF:
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if (dev->link[link].lnb.voltage[input])
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return 0;
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lnb_command(dev, link, input, LNB_CMD_OFF);
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break;
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case SEC_VOLTAGE_13:
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lnb_command(dev, link, input, LNB_CMD_LOW);
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break;
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case SEC_VOLTAGE_18:
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lnb_command(dev, link, input, LNB_CMD_HIGH);
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break;
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default:
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s = -EINVAL;
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break;
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2017-09-10 23:11:15 +02:00
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}
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2017-08-27 23:54:49 +02:00
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dev->link[link].lnb.oldvoltage[input] = voltage;
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return s;
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}
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static int max_set_input_unlocked(struct dvb_frontend *fe, int in)
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{
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struct ddb_input *input = fe->sec_priv;
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struct ddb_port *port = input->port;
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struct ddb *dev = port->dev;
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struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
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int res = 0;
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if (in > 3)
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return -EINVAL;
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if (dvb->input != in) {
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u32 bit = (1ULL << input->nr);
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u32 obit = dev->link[port->lnr].lnb.voltage[dvb->input] & bit;
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dev->link[port->lnr].lnb.voltage[dvb->input] &= ~bit;
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dvb->input = in;
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dev->link[port->lnr].lnb.voltage[dvb->input] |= obit;
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}
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2018-06-23 16:52:22 +02:00
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if (dvb->set_input)
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res = dvb->set_input(fe, in);
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2017-08-27 23:54:49 +02:00
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return res;
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}
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static int max_set_input(struct dvb_frontend *fe, int in)
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{
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struct ddb_input *input = fe->sec_priv;
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struct ddb_port *port = input->port;
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struct ddb *dev = input->port->dev;
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int res;
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mutex_lock(&dev->link[port->lnr].lnb.lock);
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res = max_set_input_unlocked(fe, in);
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mutex_unlock(&dev->link[port->lnr].lnb.lock);
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return res;
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}
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2017-09-10 23:11:15 +02:00
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static int max_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
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2017-08-27 23:54:49 +02:00
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{
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struct ddb_input *input = fe->sec_priv;
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struct ddb_port *port = input->port;
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struct ddb *dev = port->dev;
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struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
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int tuner = 0;
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int res = 0;
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u32 fmode = dev->link[port->lnr].lnb.fmode;
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mutex_lock(&dev->link[port->lnr].lnb.lock);
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dvb->tone = tone;
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switch (fmode) {
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default:
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case 0:
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case 3:
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res = lnb_set_tone(dev, port->lnr, dvb->input, tone);
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break;
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case 1:
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case 2:
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if (old_quattro) {
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if (dvb->tone == SEC_TONE_ON)
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tuner |= 2;
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if (dvb->voltage == SEC_VOLTAGE_18)
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tuner |= 1;
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} else {
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if (dvb->tone == SEC_TONE_ON)
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tuner |= 1;
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if (dvb->voltage == SEC_VOLTAGE_18)
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tuner |= 2;
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}
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res = max_set_input_unlocked(fe, tuner);
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break;
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}
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mutex_unlock(&dev->link[port->lnr].lnb.lock);
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return res;
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}
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2017-09-10 23:11:15 +02:00
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static int max_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
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2017-08-27 23:54:49 +02:00
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{
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struct ddb_input *input = fe->sec_priv;
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struct ddb_port *port = input->port;
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struct ddb *dev = port->dev;
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struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
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int tuner = 0;
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u32 nv, ov = dev->link[port->lnr].lnb.voltages;
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int res = 0;
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u32 fmode = dev->link[port->lnr].lnb.fmode;
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mutex_lock(&dev->link[port->lnr].lnb.lock);
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dvb->voltage = voltage;
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switch (fmode) {
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case 3:
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default:
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case 0:
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if (fmode == 3)
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max_set_input_unlocked(fe, 0);
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if (voltage == SEC_VOLTAGE_OFF)
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dev->link[port->lnr].lnb.voltage[dvb->input] &=
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~(1ULL << input->nr);
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else
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dev->link[port->lnr].lnb.voltage[dvb->input] |=
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(1ULL << input->nr);
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res = lnb_set_voltage(dev, port->lnr, dvb->input, voltage);
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break;
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case 1:
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case 2:
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if (voltage == SEC_VOLTAGE_OFF)
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dev->link[port->lnr].lnb.voltages &=
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~(1ULL << input->nr);
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else
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dev->link[port->lnr].lnb.voltages |=
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(1ULL << input->nr);
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nv = dev->link[port->lnr].lnb.voltages;
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if (old_quattro) {
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if (dvb->tone == SEC_TONE_ON)
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tuner |= 2;
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if (dvb->voltage == SEC_VOLTAGE_18)
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tuner |= 1;
|
|
|
|
} else {
|
|
|
|
if (dvb->tone == SEC_TONE_ON)
|
|
|
|
tuner |= 1;
|
|
|
|
if (dvb->voltage == SEC_VOLTAGE_18)
|
|
|
|
tuner |= 2;
|
|
|
|
}
|
|
|
|
res = max_set_input_unlocked(fe, tuner);
|
|
|
|
|
|
|
|
if (nv != ov) {
|
|
|
|
if (nv) {
|
|
|
|
lnb_set_voltage(dev, port->lnr, 0,
|
|
|
|
SEC_VOLTAGE_13);
|
|
|
|
if (fmode == 1) {
|
|
|
|
lnb_set_voltage(dev, port->lnr, 0,
|
|
|
|
SEC_VOLTAGE_13);
|
|
|
|
if (old_quattro) {
|
|
|
|
lnb_set_voltage(dev,
|
|
|
|
port->lnr, 1,
|
|
|
|
SEC_VOLTAGE_18);
|
|
|
|
lnb_set_voltage(dev, port->lnr,
|
|
|
|
2,
|
|
|
|
SEC_VOLTAGE_13);
|
|
|
|
} else {
|
|
|
|
lnb_set_voltage(dev, port->lnr,
|
|
|
|
1,
|
|
|
|
SEC_VOLTAGE_13);
|
|
|
|
lnb_set_voltage(dev, port->lnr,
|
|
|
|
2,
|
|
|
|
SEC_VOLTAGE_18);
|
|
|
|
}
|
|
|
|
lnb_set_voltage(dev, port->lnr, 3,
|
|
|
|
SEC_VOLTAGE_18);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
lnb_set_voltage(dev, port->lnr,
|
|
|
|
0, SEC_VOLTAGE_OFF);
|
|
|
|
if (fmode == 1) {
|
|
|
|
lnb_set_voltage(dev, port->lnr, 1,
|
|
|
|
SEC_VOLTAGE_OFF);
|
|
|
|
lnb_set_voltage(dev, port->lnr, 2,
|
|
|
|
SEC_VOLTAGE_OFF);
|
|
|
|
lnb_set_voltage(dev, port->lnr, 3,
|
|
|
|
SEC_VOLTAGE_OFF);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
mutex_unlock(&dev->link[port->lnr].lnb.lock);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
|
|
|
|
{
|
2020-03-31 16:39:32 +02:00
|
|
|
struct ddb_input *input = fe->sec_priv;
|
|
|
|
struct ddb_port *port = input->port;
|
|
|
|
struct ddb *dev = port->dev;
|
|
|
|
u32 tag = DDB_LINK_TAG(port->lnr);
|
2023-07-31 22:29:08 +02:00
|
|
|
u32 base = dev->link[port->lnr].info->lnb_base;
|
2020-03-31 16:39:32 +02:00
|
|
|
struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
|
|
|
|
u32 fmode = dev->link[port->lnr].lnb.fmode;
|
|
|
|
|
|
|
|
mutex_lock(&dev->link[port->lnr].lnb.lock);
|
|
|
|
switch (fmode) {
|
|
|
|
default:
|
|
|
|
case 0:
|
|
|
|
case 3:
|
2023-07-31 22:29:08 +02:00
|
|
|
ddbwritel(dev, arg ? 0x34 : 0x01, tag | base | LNB_CONTROL(dvb->input));
|
2020-03-31 16:39:32 +02:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
case 2:
|
2023-07-31 22:29:08 +02:00
|
|
|
ddbwritel(dev, arg ? 0x34 : 0x01, tag | base | LNB_CONTROL(0));
|
|
|
|
ddbwritel(dev, arg ? 0x34 : 0x01, tag | base | LNB_CONTROL(1));
|
|
|
|
ddbwritel(dev, arg ? 0x34 : 0x01, tag | base | LNB_CONTROL(2));
|
|
|
|
ddbwritel(dev, arg ? 0x34 : 0x01, tag | base | LNB_CONTROL(3));
|
2020-03-31 16:39:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
mutex_unlock(&dev->link[port->lnr].lnb.lock);
|
2017-08-27 23:54:49 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-09-10 23:11:15 +02:00
|
|
|
static int max_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd burst)
|
2017-08-27 23:54:49 +02:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxl_fw_read(void *priv, u8 *buf, u32 len)
|
|
|
|
{
|
|
|
|
struct ddb_link *link = priv;
|
|
|
|
struct ddb *dev = link->dev;
|
|
|
|
|
|
|
|
dev_info(dev->dev,
|
|
|
|
"Read mxl_fw from link %u\n", link->nr);
|
|
|
|
|
|
|
|
return ddbridge_flashread(dev, link->nr, buf, 0xc0000, len);
|
|
|
|
}
|
|
|
|
|
|
|
|
int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm)
|
|
|
|
{
|
|
|
|
u32 l = link->nr;
|
|
|
|
|
|
|
|
if (link->lnb.fmode == fm)
|
|
|
|
return 0;
|
|
|
|
dev_info(dev->dev, "Set fmode link %u = %u\n", l, fm);
|
|
|
|
mutex_lock(&link->lnb.lock);
|
|
|
|
if (fm == 2 || fm == 1) {
|
|
|
|
if (fmode_sat >= 0) {
|
|
|
|
lnb_set_sat(dev, l, 0, fmode_sat, 0, 0);
|
|
|
|
if (old_quattro) {
|
|
|
|
lnb_set_sat(dev, l, 1, fmode_sat, 0, 1);
|
|
|
|
lnb_set_sat(dev, l, 2, fmode_sat, 1, 0);
|
|
|
|
} else {
|
|
|
|
lnb_set_sat(dev, l, 1, fmode_sat, 1, 0);
|
|
|
|
lnb_set_sat(dev, l, 2, fmode_sat, 0, 1);
|
|
|
|
}
|
|
|
|
lnb_set_sat(dev, l, 3, fmode_sat, 1, 1);
|
|
|
|
}
|
|
|
|
lnb_set_tone(dev, l, 0, SEC_TONE_OFF);
|
|
|
|
if (old_quattro) {
|
|
|
|
lnb_set_tone(dev, l, 1, SEC_TONE_OFF);
|
|
|
|
lnb_set_tone(dev, l, 2, SEC_TONE_ON);
|
|
|
|
} else {
|
|
|
|
lnb_set_tone(dev, l, 1, SEC_TONE_ON);
|
|
|
|
lnb_set_tone(dev, l, 2, SEC_TONE_OFF);
|
|
|
|
}
|
|
|
|
lnb_set_tone(dev, l, 3, SEC_TONE_ON);
|
|
|
|
}
|
|
|
|
link->lnb.fmode = fm;
|
|
|
|
mutex_unlock(&link->lnb.lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* MAXS8 related functions */
|
|
|
|
|
|
|
|
static struct mxl5xx_cfg mxl5xx = {
|
|
|
|
.adr = 0x60,
|
|
|
|
.type = 0x01,
|
|
|
|
.clk = 27000000,
|
|
|
|
.ts_clk = 139,
|
|
|
|
.cap = 12,
|
|
|
|
.fw_read = mxl_fw_read,
|
|
|
|
};
|
|
|
|
|
|
|
|
int ddb_fe_attach_mxl5xx(struct ddb_input *input)
|
|
|
|
{
|
|
|
|
struct ddb *dev = input->port->dev;
|
|
|
|
struct i2c_adapter *i2c = &input->port->i2c->adap;
|
|
|
|
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
|
|
|
|
struct ddb_port *port = input->port;
|
|
|
|
struct ddb_link *link = &dev->link[port->lnr];
|
|
|
|
struct mxl5xx_cfg cfg;
|
|
|
|
int demod, tuner;
|
|
|
|
|
|
|
|
cfg = mxl5xx;
|
|
|
|
cfg.fw_priv = link;
|
|
|
|
if (dev->link[0].info->type == DDB_OCTONET)
|
|
|
|
;/*cfg.ts_clk = 69;*/
|
|
|
|
|
|
|
|
demod = input->nr;
|
|
|
|
tuner = demod & 3;
|
2018-06-23 16:52:22 +02:00
|
|
|
if (fmode >= 3)
|
2017-08-27 23:54:49 +02:00
|
|
|
tuner = 0;
|
2022-02-12 15:14:44 +01:00
|
|
|
dvb->fe = dvb_attach(mxl5xx_attach, i2c, &cfg,
|
|
|
|
demod, tuner, &dvb->set_input);
|
2017-08-27 23:54:49 +02:00
|
|
|
if (!dvb->fe) {
|
|
|
|
dev_err(dev->dev, "No MXL5XX found!\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
if (input->nr < 4) {
|
|
|
|
lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT);
|
|
|
|
lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF);
|
|
|
|
}
|
|
|
|
ddb_lnb_init_fmode(dev, link, fmode);
|
|
|
|
|
|
|
|
dvb->fe->ops.set_voltage = max_set_voltage;
|
|
|
|
dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage;
|
|
|
|
dvb->fe->ops.set_tone = max_set_tone;
|
|
|
|
dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd;
|
|
|
|
dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd;
|
|
|
|
dvb->fe->ops.diseqc_send_burst = max_send_burst;
|
|
|
|
dvb->fe->sec_priv = input;
|
2022-02-12 15:14:44 +01:00
|
|
|
#ifndef KERNEL_DVB_CORE
|
2017-08-27 23:54:49 +02:00
|
|
|
dvb->fe->ops.set_input = max_set_input;
|
2022-02-12 15:14:44 +01:00
|
|
|
#endif
|
2017-08-27 23:54:49 +02:00
|
|
|
dvb->input = tuner;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-12-05 19:59:23 +01:00
|
|
|
/* MAX MCI related functions */
|
2022-02-12 15:14:44 +01:00
|
|
|
struct dvb_frontend *ddb_sx8_attach(struct ddb_input *input, int nr, int tuner,
|
|
|
|
int (**fn_set_input)(struct dvb_frontend *fe, int input));
|
2023-07-31 22:31:44 +02:00
|
|
|
struct dvb_frontend *ddb_mx_attach(struct ddb_input *input, int nr, int tuner, int type);
|
|
|
|
|
2017-12-05 19:59:23 +01:00
|
|
|
|
2018-05-15 23:01:39 +02:00
|
|
|
int ddb_fe_attach_mci(struct ddb_input *input, u32 type)
|
2017-12-05 19:59:23 +01:00
|
|
|
{
|
|
|
|
struct ddb *dev = input->port->dev;
|
|
|
|
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
|
|
|
|
struct ddb_port *port = input->port;
|
|
|
|
struct ddb_link *link = &dev->link[port->lnr];
|
|
|
|
int demod, tuner;
|
2018-06-23 16:52:22 +02:00
|
|
|
int fm = fmode;
|
2020-08-29 15:32:42 +02:00
|
|
|
|
2017-12-05 19:59:23 +01:00
|
|
|
demod = input->nr;
|
|
|
|
tuner = demod & 3;
|
2018-05-15 23:01:39 +02:00
|
|
|
switch (type) {
|
|
|
|
case DDB_TUNER_MCI_SX8:
|
2018-06-23 16:52:22 +02:00
|
|
|
if (fm >= 3)
|
2018-05-15 23:01:39 +02:00
|
|
|
tuner = 0;
|
2022-02-12 15:14:44 +01:00
|
|
|
dvb->fe = ddb_sx8_attach(input, demod, tuner, &dvb->set_input);
|
2023-07-31 22:31:44 +02:00
|
|
|
dvb->input = tuner;
|
2018-05-15 23:01:39 +02:00
|
|
|
break;
|
|
|
|
case DDB_TUNER_MCI_M4:
|
2018-06-23 16:52:22 +02:00
|
|
|
fm = 0;
|
2023-07-31 22:31:44 +02:00
|
|
|
dvb->fe = ddb_mx_attach(input, demod, tuner, 0);
|
|
|
|
dvb->input = tuner;
|
|
|
|
break;
|
|
|
|
case DDB_TUNER_MCI_M8:
|
|
|
|
fm = 3;
|
|
|
|
dvb->fe = ddb_mx_attach(input, demod, tuner, 1);
|
|
|
|
dvb->input = 0;
|
|
|
|
break;
|
|
|
|
case DDB_TUNER_MCI_M8A:
|
|
|
|
fm = 3;
|
|
|
|
dvb->fe = ddb_mx_attach(input, demod, tuner, 2);
|
|
|
|
dvb->input = 0;
|
|
|
|
break;
|
|
|
|
case DDB_TUNER_MCI_M2:
|
|
|
|
{
|
|
|
|
u32 mode, mmode;
|
|
|
|
|
|
|
|
// delmode: 0 - sat,sat 1-cable,cable/sat
|
|
|
|
switch (delmode & 1) {
|
|
|
|
case 0:
|
|
|
|
mode = 2;
|
|
|
|
mmode = 2;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
mode = 1;
|
|
|
|
mmode = demod ? 3 : 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!demod)
|
|
|
|
ddb_mci_cmd_link_simple(link, MCI_CMD_SET_INPUT_CONFIG,
|
|
|
|
0xff, mode | (delmode & 0x10));
|
|
|
|
dvb->fe = ddb_mx_attach(input, demod, tuner, mmode);
|
2023-09-05 14:28:05 +02:00
|
|
|
dvb->input = tuner;
|
2023-07-31 22:31:44 +02:00
|
|
|
fm = 0;
|
2018-05-15 23:01:39 +02:00
|
|
|
break;
|
2023-07-31 22:31:44 +02:00
|
|
|
}
|
2018-05-15 23:01:39 +02:00
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2017-12-05 19:59:23 +01:00
|
|
|
if (!dvb->fe) {
|
2018-05-15 23:01:39 +02:00
|
|
|
dev_err(dev->dev, "No MCI card found!\n");
|
2017-12-05 19:59:23 +01:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2023-07-31 22:31:44 +02:00
|
|
|
if (!input->nr || (input->nr < 4 && type != DDB_TUNER_MCI_M8)) {
|
2017-12-05 19:59:23 +01:00
|
|
|
lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT);
|
|
|
|
lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF);
|
|
|
|
}
|
2018-06-23 16:52:22 +02:00
|
|
|
ddb_lnb_init_fmode(dev, link, fm);
|
2017-12-05 19:59:23 +01:00
|
|
|
|
|
|
|
dvb->fe->ops.set_voltage = max_set_voltage;
|
|
|
|
dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage;
|
|
|
|
dvb->fe->ops.set_tone = max_set_tone;
|
|
|
|
dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd;
|
|
|
|
dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd;
|
|
|
|
dvb->fe->ops.diseqc_send_burst = max_send_burst;
|
|
|
|
dvb->fe->sec_priv = input;
|
2023-07-31 22:31:44 +02:00
|
|
|
if (type == DDB_TUNER_MCI_SX8) {
|
2022-02-12 15:14:44 +01:00
|
|
|
#ifndef KERNEL_DVB_CORE
|
2018-09-10 20:20:24 +02:00
|
|
|
dvb->fe->ops.set_input = max_set_input;
|
2022-02-12 15:14:44 +01:00
|
|
|
#endif
|
2018-09-10 20:20:24 +02:00
|
|
|
}
|
2017-12-05 19:59:23 +01:00
|
|
|
return 0;
|
|
|
|
}
|