add first basic support for MCI frontends like the MAXSX8 (incomplete)
This commit is contained in:
Ralph Metzler
parent
b814026565
commit
d398909c1d
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@ -1,7 +1,7 @@
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EXTRA_CFLAGS += -DCONFIG_DVB_CXD2843 -DCONFIG_DVB_LNBP21 -DCONFIG_DVB_STV090x -DCONFIG_DVB_STV6110x -DCONFIG_DVB_DRXK -DCONFIG_DVB_STV0910 -DCONFIG_DVB_STV6111 -DCONFIG_DVB_LNBH25 -DCONFIG_DVB_MXL5XX
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
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obj-$(CONFIG_DVB_OCTONET) += octonet.o
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@ -2,8 +2,8 @@
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# Makefile for the ddbridge device driver
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#
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
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obj-$(CONFIG_DVB_OCTONET) += octonet.o
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@ -2,8 +2,8 @@
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# Makefile for the ddbridge device driver
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#
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
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ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o ddbridge-mci.o
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obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
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obj-$(CONFIG_DVB_OCTONET) += octonet.o
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@ -26,6 +26,7 @@
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#include "ddbridge-i2c.h"
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#include "ddbridge-io.h"
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#include "dvb_net.h"
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#include "ddbridge-mci.h"
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struct workqueue_struct *ddb_wq;
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@ -1748,6 +1749,10 @@ static int dvb_input_attach(struct ddb_input *input)
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if (demod_attach_dummy(input) < 0)
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return -ENODEV;
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break;
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case DDB_TUNER_MCI:
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if (ddb_fe_attach_mci(input) < 0)
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return -ENODEV;
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break;
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default:
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return 0;
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}
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@ -2038,6 +2043,16 @@ static void ddb_port_probe(struct ddb_port *port)
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return;
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}
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if (dev->link[l].info->type == DDB_OCTOPUS_MCI) {
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if (port->nr >= dev->link[l].info->mci)
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return;
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port->name = "DUAL MCI";
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port->type_name = "MCI";
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port->class = DDB_PORT_TUNER;
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port->type = DDB_TUNER_MCI;
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return;
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}
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if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) {
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port->name = "CI internal";
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port->type_name = "INTERNAL";
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@ -2658,6 +2673,7 @@ static void ddb_ports_init(struct ddb *dev)
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break;
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case DDB_OCTOPUS_MAX:
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case DDB_OCTOPUS_MAX_CT:
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case DDB_OCTOPUS_MCI:
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ddb_input_init(port, 2 * i, 0, 2 * p);
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ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1);
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break;
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@ -4249,7 +4265,8 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
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link->info = get_ddb_info(id & 0xffff, id >> 16,
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subid & 0xffff, subid >> 16);
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if (link->info->type != DDB_OCTOPUS_MAX_CT &&
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link->info->type != DDB_OCTOPUS_MAX) {
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link->info->type != DDB_OCTOPUS_MAX &&
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link->info->type != DDB_OCTOPUS_MCI ) {
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dev_info(dev->dev,
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"Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.",
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id);
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@ -24,6 +24,7 @@
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-i2c.h"
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#include "ddbridge-mci.h"
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/* MAX LNB interface related module parameters */
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@ -442,3 +443,48 @@ int ddb_fe_attach_mxl5xx(struct ddb_input *input)
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return 0;
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}
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/* MAX MCI related functions */
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static struct mci_cfg maxsx8 = {
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};
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int ddb_fe_attach_mci(struct ddb_input *input)
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{
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struct ddb *dev = input->port->dev;
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//struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct ddb_port *port = input->port;
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struct ddb_link *link = &dev->link[port->lnr];
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int demod, tuner;
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struct mci_cfg cfg;
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cfg = maxsx8;
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demod = input->nr;
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tuner = demod & 3;
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if (fmode == 3)
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tuner = 0;
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dvb->fe = dvb_attach(ddb_mci_attach, input, 0, demod);
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if (!dvb->fe) {
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dev_err(dev->dev, "No MAXSX8 found!\n");
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return -ENODEV;
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}
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if (input->nr < 4) {
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lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT);
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lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF);
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}
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ddb_lnb_init_fmode(dev, link, fmode);
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dvb->fe->ops.set_voltage = max_set_voltage;
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dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage;
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dvb->fe->ops.set_tone = max_set_tone;
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dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd;
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dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd;
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dvb->fe->ops.diseqc_send_burst = max_send_burst;
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dvb->fe->sec_priv = input;
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dvb->set_input = dvb->fe->ops.set_input;
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dvb->fe->ops.set_input = max_set_input;
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dvb->input = tuner;
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return 0;
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}
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@ -0,0 +1,519 @@
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/*
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* ddbridge-mci.c: Digital Devices microcode interface
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*
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* Copyright (C) 2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, point your browser to
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-mci.h"
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static LIST_HEAD(mci_list);
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static const u32 MCLK = (1550000000/12);
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static const u32 MAX_LDPC_BITRATE = (720000000);
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struct mci_base {
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struct list_head mci_list;
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void *key;
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struct ddb_link *link;
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struct completion completion;
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struct i2c_adapter *i2c;
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struct mutex i2c_lock;
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struct mutex tuner_lock;
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u8 adr;
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struct mutex mci_lock;
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int count;
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u8 tuner_use_count[4];
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u8 assigned_demod[8];
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u32 used_ldpc_bitrate[8];
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u8 demod_in_use[8];
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};
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struct mci {
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struct mci_base *base;
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struct dvb_frontend fe;
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int nr;
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int demod;
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int tuner;
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int first_time_lock;
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int started;
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struct mci_result signal_info;
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};
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static int mci_reset(struct mci *state)
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{
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struct ddb_link *link = state->base->link;
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u32 status = 0;
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u32 timeout = 40;
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ddblwritel(link, MCI_CONTROL_RESET, MCI_CONTROL);
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ddblwritel(link, 0, MCI_CONTROL + 4); /* 1= no internal init */
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msleep(300);
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ddblwritel(link, 0, MCI_CONTROL);
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while(1) {
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status = ddblreadl(link, MCI_CONTROL);
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if ((status & MCI_CONTROL_READY) == MCI_CONTROL_READY)
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break;
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if (--timeout == 0)
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break;
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msleep(50);
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}
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if ((status & MCI_CONTROL_READY) == 0 )
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return -1;
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if (link->ids.device == 0x0009)
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ddblwritel(link, SX8_TSCONFIG_MODE_NORMAL, SX8_TSCONFIG);
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return 0;
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}
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static int _mci_cmd_unlocked(struct mci *state,
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u32 *cmd, u32 cmd_len,
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u32 *res, u32 res_len)
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{
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struct ddb_link *link = state->base->link;
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u32 i, val;
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unsigned long stat;
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val = ddblreadl(link, MCI_CONTROL);
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if (val & (MCI_CONTROL_RESET | MCI_CONTROL_START_COMMAND))
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return -EIO;
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if (cmd && cmd_len)
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for (i = 0; i < cmd_len; i++)
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ddblwritel(link, cmd[i], MCI_COMMAND + i * 4);
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val |= (MCI_CONTROL_START_COMMAND | MCI_CONTROL_ENABLE_DONE_INTERRUPT);
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ddblwritel(link, val, MCI_CONTROL);
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stat = wait_for_completion_timeout(&state->base->completion, HZ);
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if (stat == 0) {
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printk("MCI timeout\n");
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return -EIO;
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}
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if (res && res_len)
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for (i = 0; i < res_len; i++)
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res[i] = ddblreadl(link, MCI_RESULT + i * 4);
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return 0;
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}
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static int mci_cmd_unlocked(struct mci *state,
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struct mci_command *command,
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struct mci_result *result)
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{
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u32 *cmd = (u32 *) command;
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u32 *res = (u32 *) result;
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return _mci_cmd_unlocked(state, cmd, sizeof(*command)/sizeof(u32),
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res, sizeof(*result)/sizeof(u32));
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}
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static int mci_cmd(struct mci *state,
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struct mci_command *command,
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struct mci_result *result)
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{
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int stat;
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mutex_lock(&state->base->mci_lock);
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stat = _mci_cmd_unlocked(state,
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(u32 *)command, sizeof(*command)/sizeof(u32),
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(u32 *)result, sizeof(*result)/sizeof(u32));
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mutex_unlock(&state->base->mci_lock);
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return stat;
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}
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static int _mci_cmd(struct mci *state,
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struct mci_command *command, u32 command_len,
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struct mci_result *result, u32 result_len)
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{
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int stat;
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mutex_lock(&state->base->mci_lock);
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stat = _mci_cmd_unlocked(state,
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(u32 *)command, command_len,
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(u32 *)result, result_len);
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mutex_unlock(&state->base->mci_lock);
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return stat;
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}
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static void mci_handler(void *priv)
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{
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struct mci_base *base = (struct mci_base *)priv;
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complete(&base->completion);
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}
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static const u8 dvbs2_bits_per_symbol[] = {
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0, 0, 0, 0,
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/* S2 QPSK */
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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/* S2 8PSK */
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3,
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/* S2 16APSK */
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4,
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/* S2 32APSK */
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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3, 0, 4, 0,
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2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, // S2X 32APSK
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6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, // S2X 64APSK
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7, 7, 7, 7, // S2X 128APSK
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8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, // S2X 256APSK
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, // S2X 32APSK
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3, 4, 5, 6, 8, 10,
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};
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static void release(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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state->base->count--;
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if (state->base->count == 0) {
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list_del(&state->base->mci_list);
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kfree(state->base);
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}
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kfree(state);
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}
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static int get_info(struct dvb_frontend *fe)
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{
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int stat;
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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cmd.command = SX8_CMD_GETSIGNALINFO;
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cmd.demod = state->demod;
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stat = mci_cmd(state, &cmd, &state->signal_info);
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return stat;
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}
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static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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int stat;
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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u32 val;
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struct mci_result *res = (struct mci_result *)&val;
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cmd.command = SX8_CMD_GETSTATUS;
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cmd.demod = state->demod;
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stat = _mci_cmd(state, &cmd, 1, res, 1);
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if (stat)
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return stat;
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if (res->status == SX8_DEMOD_LOCKED)
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*status = 0x1f;
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else
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*status = 0;
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return stat;
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}
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static int mci_set_tuner(struct dvb_frontend *fe, u32 tuner, u32 on)
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{
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.tuner = state->tuner;
|
||||
cmd.command = on ? SX8_CMD_TUNER_ENABLE : SX8_CMD_TUNER_DISABLE;
|
||||
return mci_cmd(state, &cmd, NULL);
|
||||
}
|
||||
|
||||
static int stop(struct dvb_frontend *fe)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
struct mci_command cmd;
|
||||
u32 input = state->tuner;
|
||||
|
||||
if (state->demod != 0xff) {
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
cmd.demod = state->demod;
|
||||
cmd.command = SX8_CMD_STOP;
|
||||
mci_cmd(state, &cmd, NULL);
|
||||
}
|
||||
mutex_lock(&state->base->tuner_lock);
|
||||
state->base->tuner_use_count[input]--;
|
||||
if (!state->base->tuner_use_count[input])
|
||||
mci_set_tuner(fe, input, 0);
|
||||
state->base->demod_in_use[state->demod] = 0;
|
||||
state->base->used_ldpc_bitrate[state->nr] = 0;
|
||||
state->demod = 0xff;
|
||||
state->base->assigned_demod[state->nr] = 0xff;
|
||||
mutex_unlock(&state->base->tuner_lock);
|
||||
state->started = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int start(struct dvb_frontend *fe)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
||||
static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
|
||||
u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
|
||||
struct mci_command cmd;
|
||||
u32 input = state->tuner;
|
||||
u32 bits_per_symbol = 3;
|
||||
int i, stat = 0;
|
||||
|
||||
mutex_lock(&state->base->tuner_lock);
|
||||
for (i = 0; i < 8; i++)
|
||||
used_ldpc_bitrate += state->base->used_ldpc_bitrate[i];
|
||||
if (used_ldpc_bitrate >= MAX_LDPC_BITRATE) {
|
||||
stat = -EBUSY;
|
||||
goto unlock;
|
||||
}
|
||||
free_ldpc_bitrate = MAX_LDPC_BITRATE - used_ldpc_bitrate;
|
||||
if (free_ldpc_bitrate > MAX_DEMOD_LDPC_BITRATE)
|
||||
free_ldpc_bitrate = MAX_DEMOD_LDPC_BITRATE;
|
||||
|
||||
while (p->symbol_rate * bits_per_symbol > MAX_DEMOD_LDPC_BITRATE)
|
||||
bits_per_symbol--;
|
||||
|
||||
if (bits_per_symbol < 2) {
|
||||
stat = -EBUSY;
|
||||
goto unlock;
|
||||
}
|
||||
i = (p->symbol_rate > MCLK / 2) ? 3 : 7;
|
||||
while (i >= 0 && state->base->demod_in_use[i])
|
||||
i--;
|
||||
if (i < 0) {
|
||||
stat = -EBUSY;
|
||||
goto unlock;
|
||||
}
|
||||
state->base->demod_in_use[i] = 1;
|
||||
state->base->used_ldpc_bitrate[state->nr] = p->symbol_rate * bits_per_symbol;
|
||||
state->demod = state->base->assigned_demod[state->nr] = i;
|
||||
|
||||
if (!state->base->tuner_use_count[input])
|
||||
mci_set_tuner(fe, input, 1);
|
||||
state->base->tuner_use_count[input]++;
|
||||
unlock:
|
||||
mutex_unlock(&state->base->tuner_lock);
|
||||
if (stat)
|
||||
return stat;
|
||||
|
||||
printk("frontend %u: tuner=%u demod=%u\n", state->nr, state->tuner, state->demod);
|
||||
cmd.command = SX8_CMD_SEARCH;
|
||||
cmd.dvbs2_search.flags = 3; /* S1 + S2 */
|
||||
#if 1
|
||||
/* Enable all Modcods up to bits_per_symbol */
|
||||
cmd.dvbs2_search.s2_modulation_mask = (1 << (bits_per_symbol - 1)) - 1;
|
||||
#else
|
||||
/* Enable Modcods matching bits_per_symbol */
|
||||
cmd.dvbs2_search.s2_modulation_mask = (1 << (bits_per_symbol - 2));
|
||||
#endif
|
||||
cmd.dvbs2_search.retry = 255; /* forever */
|
||||
cmd.dvbs2_search.frequency = p->frequency * 1000;
|
||||
cmd.dvbs2_search.symbol_rate = p->symbol_rate;
|
||||
cmd.tuner = state->tuner;
|
||||
cmd.demod = state->demod;
|
||||
cmd.output = state->nr;
|
||||
stat = mci_cmd(state, &cmd, NULL);
|
||||
return stat;
|
||||
}
|
||||
|
||||
static int set_parameters(struct dvb_frontend *fe)
|
||||
{
|
||||
int stat = 0;
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
|
||||
if (state->started)
|
||||
stop(fe);
|
||||
stat = start(fe);
|
||||
if (!stat) {
|
||||
state->started = 1;
|
||||
state->first_time_lock = 1;
|
||||
state->signal_info.status = SX8_DEMOD_WAIT_SIGNAL;
|
||||
}
|
||||
return stat;
|
||||
}
|
||||
|
||||
static int tune(struct dvb_frontend *fe, bool re_tune,
|
||||
unsigned int mode_flags,
|
||||
unsigned int *delay, enum fe_status *status)
|
||||
{
|
||||
int r;
|
||||
|
||||
if (re_tune) {
|
||||
r = set_parameters(fe);
|
||||
if (r)
|
||||
return r;
|
||||
}
|
||||
r = read_status(fe, status);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
if (*status & FE_HAS_LOCK)
|
||||
return 0;
|
||||
*delay = HZ / 10;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int get_algo(struct dvb_frontend *fe)
|
||||
{
|
||||
return DVBFE_ALGO_HW;
|
||||
}
|
||||
|
||||
static int set_input(struct dvb_frontend *fe, int input)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
||||
|
||||
state->tuner = p->input = input;
|
||||
printk("fe %u, input = %u\n", state->nr, input);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sleep(struct dvb_frontend *fe)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
|
||||
}
|
||||
|
||||
static int get_snr(struct dvb_frontend *fe)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
||||
s32 snr;
|
||||
|
||||
p->cnr.len = 1;
|
||||
p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
|
||||
p->cnr.stat[0].svalue = (s64) state->dvbs2_signal_info.signal_to_noise * 100;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int get_strength(struct dvb_frontend *fe)
|
||||
{
|
||||
struct mci *state = fe->demodulator_priv;
|
||||
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
||||
s32 str;
|
||||
|
||||
str = 100000 - (state->signal_info.dvbs2_signal_info.channel_power * 10 + 108750);
|
||||
p->strength.len = 1;
|
||||
p->strength.stat[0].scale = FE_SCALE_DECIBEL;
|
||||
p->strength.stat[0].svalue = str;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dvb_frontend_ops mci_ops = {
|
||||
.delsys = { SYS_DVBS, SYS_DVBS2 },
|
||||
.info = {
|
||||
.name = "DVB-S/S2X",
|
||||
.frequency_min = 950000,
|
||||
.frequency_max = 2150000,
|
||||
.frequency_stepsize = 0,
|
||||
.frequency_tolerance = 0,
|
||||
.symbol_rate_min = 100000,
|
||||
.symbol_rate_max = 70000000,
|
||||
.caps = FE_CAN_INVERSION_AUTO |
|
||||
FE_CAN_FEC_AUTO |
|
||||
FE_CAN_QPSK |
|
||||
FE_CAN_2G_MODULATION |
|
||||
FE_CAN_MULTISTREAM,
|
||||
},
|
||||
.get_frontend_algo = get_algo,
|
||||
.tune = tune,
|
||||
.release = release,
|
||||
.read_status = read_status,
|
||||
.set_input = set_input,
|
||||
};
|
||||
|
||||
static struct mci_base *match_base(void *key)
|
||||
{
|
||||
struct mci_base *p;
|
||||
|
||||
list_for_each_entry(p, &mci_list, mci_list)
|
||||
if (p->key == key)
|
||||
return p;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int probe(struct mci *state)
|
||||
{
|
||||
mci_reset(state);
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct dvb_frontend *ddb_mci_attach(struct ddb_input *input, int mci_type, int nr)
|
||||
{
|
||||
struct ddb_port *port = input->port;
|
||||
struct ddb *dev = port->dev;
|
||||
struct ddb_link *link = &dev->link[port->lnr];
|
||||
struct mci_base *base;
|
||||
struct mci *state;
|
||||
void *key = mci_type ? (void *) port : (void *) link;
|
||||
|
||||
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
||||
if (!state)
|
||||
return NULL;
|
||||
|
||||
base = match_base(key);
|
||||
if (base) {
|
||||
base->count++;
|
||||
state->base = base;
|
||||
} else {
|
||||
base = kzalloc(sizeof(*base), GFP_KERNEL);
|
||||
if (!base)
|
||||
goto fail;
|
||||
base->key = key;
|
||||
base->count = 1;
|
||||
base->link = link;
|
||||
mutex_init(&base->mci_lock);
|
||||
mutex_init(&base->tuner_lock);
|
||||
ddb_irq_set(dev, link->nr, 0, mci_handler, base);
|
||||
init_completion(&base->completion);
|
||||
state->base = base;
|
||||
if (probe(state) < 0) {
|
||||
kfree(base);
|
||||
goto fail;
|
||||
}
|
||||
list_add(&base->mci_list, &mci_list);
|
||||
}
|
||||
state->fe.ops = mci_ops;
|
||||
state->fe.demodulator_priv = state;
|
||||
state->nr = nr;
|
||||
|
||||
state->tuner = nr;
|
||||
state->demod = nr;
|
||||
|
||||
return &state->fe;
|
||||
fail:
|
||||
kfree(state);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
/*
|
||||
* ddbridge-mci.h: Digital Devices micro code interface
|
||||
*
|
||||
* Copyright (C) 2017 Digital Devices GmbH
|
||||
* Marcus Metzler <mocm@metzlerbros.de>
|
||||
* Ralph Metzler <rjkm@metzlerbros.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 only, as published by the Free Software Foundation.
|
||||
*
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, point your browser to
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
#ifndef _DDBRIDGE_MCI_H_
|
||||
#define _DDBRIDGE_MCI_H_
|
||||
|
||||
#define MCI_CONTROL (0x500)
|
||||
#define MCI_COMMAND (0x600)
|
||||
#define MCI_RESULT (0x680)
|
||||
|
||||
#define MCI_COMMAND_SIZE (0x80)
|
||||
#define MCI_RESULT_SIZE (0x80)
|
||||
|
||||
#define MCI_CONTROL_START_COMMAND (0x00000001)
|
||||
#define MCI_CONTROL_ENABLE_DONE_INTERRUPT (0x00000002)
|
||||
#define MCI_CONTROL_RESET (0x00008000)
|
||||
#define MCI_CONTROL_READY (0x00010000)
|
||||
|
||||
#define SX8_TSCONFIG (0x280)
|
||||
|
||||
#define SX8_TSCONFIG_MODE_MASK (0x00000003)
|
||||
#define SX8_TSCONFIG_MODE_OFF (0x00000000)
|
||||
#define SX8_TSCONFIG_MODE_NORMAL (0x00000001)
|
||||
#define SX8_TSCONFIG_MODE_IQ (0x00000003)
|
||||
|
||||
|
||||
#define SX8_DEMOD_STOPPED (0)
|
||||
#define SX8_DEMOD_WAIT_SIGNAL (2)
|
||||
#define SX8_DEMOD_TIMEOUT (14)
|
||||
#define SX8_DEMOD_LOCKED (15)
|
||||
|
||||
#define SX8_CMD_TUNER_ENABLE (0x01)
|
||||
#define SX8_CMD_TUNER_DISABLE (0x02)
|
||||
#define SX8_CMD_SEARCH (0x03)
|
||||
#define SX8_CMD_GETSTATUS (0x04)
|
||||
#define SX8_CMD_STOP (0x05)
|
||||
#define SX8_CMD_GETSIGNALINFO (0x07)
|
||||
|
||||
#define SX8_CMD_SELECT_IQOUT (0x10)
|
||||
#define SX8_CMD_SELECT_TSOUT (0x11)
|
||||
|
||||
#define SX8_CMD_DIAG_READ8 (0xE0)
|
||||
#define SX8_CMD_DIAG_READ32 (0xE1)
|
||||
#define SX8_CMD_DIAG_WRITE8 (0xE2)
|
||||
#define SX8_CMD_DIAG_WRITE32 (0xE3)
|
||||
|
||||
#define SX8_CMD_DIAG_READV (0xE8)
|
||||
#define SX8_CMD_DIAG_WRITEV (0xE9)
|
||||
|
||||
|
||||
#define M4_CMD_DIAG_READX (0xE0)
|
||||
#define M4_CMD_DIAG_READT (0xE1)
|
||||
#define M4_CMD_DIAG_WRITEX (0xE2)
|
||||
#define M4_CMD_DIAG_WRITET (0xE3)
|
||||
|
||||
#define M4_CMD_DIAG_READRF (0xE8)
|
||||
#define M4_CMD_DIAG_WRITERF (0xE9)
|
||||
|
||||
|
||||
#define SX8_ERROR_UNSUPPORTED (0x80)
|
||||
#define SX8_SUCCESS(status) (status < SX8_ERROR_UNSUPPORTED)
|
||||
|
||||
struct mci_command {
|
||||
union {
|
||||
u32 command_word;
|
||||
struct {
|
||||
u8 command;
|
||||
u8 tuner;
|
||||
u8 demod;
|
||||
u8 output;
|
||||
};
|
||||
};
|
||||
union {
|
||||
u32 params[31];
|
||||
struct {
|
||||
u8 flags;
|
||||
u8 s2_modulation_mask;
|
||||
u8 rsvd;
|
||||
u8 retry;
|
||||
u32 frequency;
|
||||
u32 symbol_rate;
|
||||
} dvbs2_search;
|
||||
};
|
||||
};
|
||||
|
||||
struct mci_result {
|
||||
union {
|
||||
u32 status_word;
|
||||
struct {
|
||||
u8 status;
|
||||
u8 rsvd;
|
||||
u16 time;
|
||||
};
|
||||
};
|
||||
union {
|
||||
u32 result[27];
|
||||
struct {
|
||||
u8 standard;
|
||||
u8 pls_code; /* puncture rate for DVB-S */
|
||||
u8 roll_off; /* 7-6: rolloff, 5-2: rsrvd, 1:short, 0:pilots */
|
||||
u8 rsvd;
|
||||
u32 frequency;
|
||||
u32 symbol_rate;
|
||||
s16 channel_power;
|
||||
s16 band_power;
|
||||
s16 signal_to_noise;
|
||||
s16 rsvd2;
|
||||
u32 packet_errors;
|
||||
u32 ber_numerator;
|
||||
u32 ber_denominator;
|
||||
} dvbs2_signal_info;
|
||||
};
|
||||
u32 version[4];
|
||||
};
|
||||
|
||||
struct mci_cfg {
|
||||
|
||||
|
||||
};
|
||||
|
||||
struct dvb_frontend *ddb_mci_attach(struct ddb_input *input, int mci_type, int nr);
|
||||
#endif
|
||||
|
|
@ -144,15 +144,16 @@ struct ddb_ids {
|
|||
|
||||
struct ddb_info {
|
||||
u32 type;
|
||||
#define DDB_NONE 0
|
||||
#define DDB_OCTOPUS 1
|
||||
#define DDB_OCTOPUS_CI 2
|
||||
#define DDB_MOD 3
|
||||
#define DDB_OCTONET 4
|
||||
#define DDB_OCTOPUS_MAX 5
|
||||
#define DDB_OCTOPUS_MAX_CT 6
|
||||
#define DDB_OCTOPRO 7
|
||||
#define DDB_OCTOPRO_HDIN 8
|
||||
#define DDB_NONE 0
|
||||
#define DDB_OCTOPUS 1
|
||||
#define DDB_OCTOPUS_CI 2
|
||||
#define DDB_MOD 3
|
||||
#define DDB_OCTONET 4
|
||||
#define DDB_OCTOPUS_MAX 5
|
||||
#define DDB_OCTOPUS_MAX_CT 6
|
||||
#define DDB_OCTOPRO 7
|
||||
#define DDB_OCTOPRO_HDIN 8
|
||||
#define DDB_OCTOPUS_MCI 9
|
||||
u32 version;
|
||||
char *name;
|
||||
u32 i2c_mask;
|
||||
|
|
@ -173,6 +174,7 @@ struct ddb_info {
|
|||
#define TS_QUIRK_ALT_OSC 8
|
||||
u32 tempmon_irq;
|
||||
u32 lostlock_irq;
|
||||
u8 mci;
|
||||
const struct ddb_regmap *regmap;
|
||||
};
|
||||
|
||||
|
|
@ -300,6 +302,7 @@ struct ddb_port {
|
|||
#define DDB_CI_EXTERNAL_XO2_B 13
|
||||
#define DDB_TUNER_DVBS_STV0910_PR 14
|
||||
#define DDB_TUNER_DVBC2T2I_SONY_P 15
|
||||
#define DDB_TUNER_MCI 16
|
||||
|
||||
#define DDB_TUNER_XO2 32
|
||||
#define DDB_TUNER_DVBS_STV0910 (DDB_TUNER_XO2 + 0)
|
||||
|
|
@ -550,8 +553,10 @@ void ddb_i2c_release(struct ddb *dev);
|
|||
int ddb_ci_attach(struct ddb_port *port, u32 bitrate);
|
||||
|
||||
int ddb_fe_attach_mxl5xx(struct ddb_input *input);
|
||||
int ddb_fe_attach_mci(struct ddb_input *input);
|
||||
int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm);
|
||||
|
||||
struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
|
||||
void (*handler)(void *), void *data);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue