mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
- add support for new Max S8/A8 with temperature monitor
- move temperature monitor code from mod to core and cleanup modulator ioctls
This commit is contained in:
Ralph Metzler
parent
2ec7863b04
commit
1f4ae2bd51
@ -285,7 +285,6 @@ static struct ddb_regmap octopus_mod_map = {
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.channel = &octopus_mod_channel,
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};
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static struct ddb_regmap octopus_mod_2_map = {
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.irq_version = 2,
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.irq_base_odma = 64,
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@ -306,17 +305,67 @@ static struct ddb_info ddb_s2_48 = {
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.port_num = 4,
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.i2c_mask = 0x01,
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.board_control = 1,
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.tempmon_irq = 24,
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};
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static struct ddb_info ddb_ct_8 = {
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static struct ddb_info ddb_ct2_8 = {
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.type = DDB_OCTOPUS_MAX_CT,
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.name = "Digital Devices MAX CT8",
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.name = "Digital Devices MAX A8 CT2",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 0x0ff,
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.board_control_2 = 0xf00,
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.ts_quirks = TS_QUIRK_SERIAL,
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.tempmon_irq = 24,
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};
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static struct ddb_info ddb_c2t2_8 = {
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.type = DDB_OCTOPUS_MAX_CT,
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.name = "Digital Devices MAX A8 C2T2",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 0x0ff,
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.board_control_2 = 0xf00,
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.ts_quirks = TS_QUIRK_SERIAL,
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.tempmon_irq = 24,
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};
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static struct ddb_info ddb_isdbt_8 = {
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.type = DDB_OCTOPUS_MAX_CT,
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.name = "Digital Devices MAX A8 ISDBT",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 0x0ff,
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.board_control_2 = 0xf00,
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.ts_quirks = TS_QUIRK_SERIAL,
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.tempmon_irq = 24,
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};
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static struct ddb_info ddb_c2t2i_v0_8 = {
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.type = DDB_OCTOPUS_MAX_CT,
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.name = "Digital Devices MAX A8 C2T2I V0",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 0x0ff,
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.board_control_2 = 0xf00,
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.ts_quirks = TS_QUIRK_SERIAL,
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.tempmon_irq = 24,
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};
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static struct ddb_info ddb_c2t2i_8 = {
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.type = DDB_OCTOPUS_MAX_CT,
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.name = "Digital Devices MAX A8 C2T2I",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 0x0ff,
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.board_control_2 = 0xf00,
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.ts_quirks = TS_QUIRK_SERIAL,
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.tempmon_irq = 24,
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};
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@ -2601,6 +2650,11 @@ static void ddb_port_probe(struct ddb_port *port)
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port->type = DDB_TUNER_ISDBT_SONY_P;
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port->type_name = "ISDBT_SONY";
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break;
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case 0xc1:
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port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
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port->type = DDB_TUNER_DVBC2T2_SONY_P;
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port->type_name = "DVBC2T2_ISDBT_SONY";
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break;
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default:
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return;
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}
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@ -4359,10 +4413,23 @@ static ssize_t fan_store(struct device *device, struct device_attribute *d,
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return count;
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}
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static ssize_t fanspeed_show(struct device *device,
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struct device_attribute *attr, char *buf)
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{
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struct ddb *dev = dev_get_drvdata(device);
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int num = attr->attr.name[8] - 0x30;
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struct ddb_link *link = &dev->link[num];
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u32 spd;
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spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff;
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return sprintf(buf, "%u\n", spd * 100);
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}
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static ssize_t temp_show(struct device *device,
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struct device_attribute *attr, char *buf)
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{
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struct ddb *dev = dev_get_drvdata(device);
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struct ddb_link *link = &dev->link[0];
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struct i2c_adapter *adap;
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s32 temp, temp2, temp3;
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int i;
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@ -4849,6 +4916,13 @@ static struct device_attribute ddb_attrs_led[] = {
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__ATTR(led3, 0664, led_show, led_store),
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};
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static struct device_attribute ddb_attrs_fanspeed[] = {
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__ATTR_MRO(fanspeed0, fanspeed_show),
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__ATTR_MRO(fanspeed1, fanspeed_show),
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__ATTR_MRO(fanspeed2, fanspeed_show),
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__ATTR_MRO(fanspeed3, fanspeed_show),
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};
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static struct class ddb_class = {
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.name = "ddbridge",
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.owner = THIS_MODULE,
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@ -4878,6 +4952,9 @@ static void ddb_device_attrs_del(struct ddb *dev)
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{
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int i;
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for (i = 0; i < 4; i++)
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if (dev->link[i].info->tempmon_irq)
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device_remove_file(dev->ddb_dev, &ddb_attrs_fanspeed[i]);
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for (i = 0; i < dev->link[0].info->temp_num; i++)
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device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
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for (i = 0; i < dev->link[0].info->port_num; i++)
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@ -4920,6 +4997,12 @@ static int ddb_device_attrs_add(struct ddb *dev)
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&ddb_attrs_led[i]))
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goto fail;
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}
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for (i = 0; i < 4; i++)
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if (dev->link[i].info &&
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dev->link[i].info->tempmon_irq)
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if (device_create_file(dev->ddb_dev,
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&ddb_attrs_fanspeed[i]))
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goto fail;
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return 0;
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fail:
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return -1;
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@ -4994,6 +5077,7 @@ static void link_tasklet(unsigned long data)
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LINK_IRQ_HANDLE(l, 1);
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LINK_IRQ_HANDLE(l, 2);
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LINK_IRQ_HANDLE(l, 3);
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LINK_IRQ_HANDLE(l, 24);
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}
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static void gtl_irq_handler(unsigned long priv)
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@ -5010,6 +5094,7 @@ static void gtl_irq_handler(unsigned long priv)
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LINK_IRQ_HANDLE(l, 1);
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LINK_IRQ_HANDLE(l, 2);
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LINK_IRQ_HANDLE(l, 3);
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LINK_IRQ_HANDLE(l, 24);
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}
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#else
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tasklet_schedule(&link->tasklet);
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@ -5054,7 +5139,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
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link->info = &ddb_s2_48;
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break;
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case 0x0008dd01:
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link->info = &ddb_ct_8;
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link->info = &ddb_c2t2_8;
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break;
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default:
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pr_info("DDBridge: Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.",
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@ -5068,16 +5153,24 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
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dev->handler_data[0][base + l] = (unsigned long) link;
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dev->handler[0][base + l] = gtl_irq_handler;
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dev->link[l].ids.hwid = ddbreadl(dev, DDB_LINK_TAG(l) | 0);
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dev->link[l].ids.regmapid = ddbreadl(dev, DDB_LINK_TAG(l) | 4);
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dev->link[l].ids.vendor = id >> 16;;
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dev->link[l].ids.device = id & 0xffff;;
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//dev->link[l].ids.subvendor = id->subvendor;
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//dev->link[l].ids.subdevice = id->subdevice;
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pr_info("GTL %s\n", dev->link[l].info->name);
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pr_info("GTL HW %08x REGMAP %08x\n",
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ddbreadl(dev, DDB_LINK_TAG(l) | 0),
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ddbreadl(dev, DDB_LINK_TAG(l) | 4));
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dev->link[l].ids.hwid,
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dev->link[l].ids.regmapid);
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pr_info("GTL ID %08x\n",
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ddbreadl(dev, DDB_LINK_TAG(l) | 8));
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tasklet_init(&link->tasklet, link_tasklet, (unsigned long) link);
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ddbwritel(dev, 0xffffffff, DDB_LINK_TAG(l) | INTERRUPT_ACK);
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ddbwritel(dev, 0xf, DDB_LINK_TAG(l) | INTERRUPT_ENABLE);
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ddbwritel(dev, 0x0100000f, DDB_LINK_TAG(l) | INTERRUPT_ENABLE);
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return 0;
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}
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@ -5093,13 +5186,110 @@ static int ddb_gtl_init(struct ddb *dev)
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return 0;
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static void tempmon_setfan(struct ddb_link *link)
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{
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u32 temp, temp2, pwm;
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if ((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) {
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pr_info("Over temperature condition\n");
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link->OverTemperatureError = 1;
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}
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temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
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if (temp & 0x80)
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temp = 0;
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temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF;
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if (temp2 & 0x80)
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temp2 = 0;
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if (temp2 > temp)
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temp = temp2;
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pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
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if (pwm > 10)
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pwm = 10;
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if (temp >= link->temp_tab[pwm]) {
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while( pwm < 10 && temp >= link->temp_tab[pwm + 1])
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pwm += 1;
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} else {
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while( pwm > 1 && temp < link->temp_tab[pwm - 2])
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pwm -= 1;
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}
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ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
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}
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static void temp_handler(unsigned long data)
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{
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struct ddb_link *link = (struct ddb_link *) data;
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spin_lock(&link->temp_lock);
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tempmon_setfan(link);
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spin_unlock(&link->temp_lock);
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}
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static int tempmon_init(struct ddb_link *link, int FirstTime)
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{
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struct ddb *dev = link->dev;
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int status = 0;
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u32 l = link->nr;
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spin_lock_irq(&link->temp_lock);
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if (FirstTime) {
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static u8 TemperatureTable[11] = {30,35,40,45,50,55,60,65,70,75,80};
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memcpy(link->temp_tab, TemperatureTable, sizeof(TemperatureTable));
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}
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dev->handler[l][link->info->tempmon_irq] = temp_handler;
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dev->handler_data[l][link->info->tempmon_irq] = (unsigned long) link;
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ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
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TEMPMON_CONTROL_INTENABLE),
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TEMPMON_CONTROL);
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ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
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link->OverTemperatureError =
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((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0);
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if (link->OverTemperatureError) {
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pr_info("Over temperature condition\n");
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status = -1;
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}
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tempmon_setfan(link);
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spin_unlock_irq(&link->temp_lock);
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return status;
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}
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static int ddb_init_tempmon(struct ddb_link *link)
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{
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struct ddb *dev = link->dev;
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struct ddb_info *info = link->info;
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if (!info->tempmon_irq)
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return;
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if (info->type == DDB_OCTOPUS_MAX ||
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info->type == DDB_OCTOPUS_MAX_CT)
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if (link->ids.regmapid < 0x00010002)
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return;
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spin_lock_init(&link->temp_lock);
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printk("init_tempmon\n");
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tempmon_init(link, 1);
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static int ddb_init_boards(struct ddb *dev)
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{
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struct ddb_info *info;
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struct ddb_link *link;
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u32 l;
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for (l = 0; l < DDB_MAX_LINK; l++) {
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info = dev->link[l].info;
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link = &dev->link[l];
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info = link->info;
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if (!info)
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continue;
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if (info->board_control) {
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@ -5113,6 +5303,7 @@ static int ddb_init_boards(struct ddb *dev)
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DDB_LINK_TAG(l) | BOARD_CONTROL);
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usleep_range(2000, 3000);
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}
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ddb_init_tempmon(link);
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}
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return 0;
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}
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@ -215,12 +215,12 @@ static void mod_set_rateinc(struct ddb *dev, u32 chan)
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static u32 qamtab[6] = { 0x000, 0x600, 0x601, 0x602, 0x903, 0x604 };
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void ddbridge_mod_output_start(struct ddb_output *output)
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int ddbridge_mod_output_start(struct ddb_output *output)
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{
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struct ddb *dev = output->port->dev;
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u32 Channel = output->nr;
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struct ddb_mod *mod = &dev->mod[output->nr];
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u32 Symbolrate = 6900000;
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u32 Symbolrate = mod->symbolrate;
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/*PCRIncrement = RoundPCR(PCRIncrement);*/
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/*PCRDecrement = RoundPCR(PCRDecrement);*/
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@ -256,8 +256,7 @@ void ddbridge_mod_output_start(struct ddb_output *output)
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u32 d = gcd(KF,LF);
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u32 checkLF;
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mod->modulation = QAM_256 - 1;
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ddbwritel(dev, mod->modulation, CHANNEL_SETTINGS(Channel));
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ddbwritel(dev, mod->modulation - 1, CHANNEL_SETTINGS(Channel));
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ddbwritel(dev, Output, CHANNEL_SETTINGS2(Channel));
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KF = KF / d;
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@ -297,6 +296,7 @@ void ddbridge_mod_output_start(struct ddb_output *output)
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if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_UNMUTE))
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return -EINVAL;
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pr_info("mod_output_start %d.%d\n", dev->nr, output->nr);
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return 0;
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}
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/****************************************************************************/
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@ -422,14 +422,14 @@ static int mod_get_vga(struct ddb *dev, u32 *pGain)
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*pGain = ddbreadl(dev, RF_VGA);
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return 0;
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}
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static void mod_TemperatureMonitorSetFan(struct ddb *dev)
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#if 0
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static void TemperatureMonitorSetFan(struct ddb *dev)
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{
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u32 tqam, pwm;
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if ((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) {
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pr_info("Over temperature condition\n");
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dev->mod_base.OverTemperatureError = 1;
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dev->OverTemperatureError = 1;
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}
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tqam = (ddbreadl(dev, TEMPMON2_QAMCORE) >> 8) & 0xFF;
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if (tqam & 0x80)
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@ -439,55 +439,55 @@ static void mod_TemperatureMonitorSetFan(struct ddb *dev)
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if (pwm > 10)
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pwm = 10;
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if (tqam >= dev->mod_base.temp_tab[pwm]) {
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while( pwm < 10 && tqam >= dev->mod_base.temp_tab[pwm + 1])
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if (tqam >= dev->temp_tab[pwm]) {
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while( pwm < 10 && tqam >= dev->temp_tab[pwm + 1])
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pwm += 1;
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} else {
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while( pwm > 1 && tqam < dev->mod_base.temp_tab[pwm - 2])
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while( pwm > 1 && tqam < dev->temp_tab[pwm - 2])
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pwm -= 1;
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}
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ddbwritel(dev, (pwm << 8), TEMPMON_FANCONTROL);
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}
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static void mod_temp_handler(unsigned long data)
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static void temp_handler(unsigned long data)
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{
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struct ddb *dev = (struct ddb *) data;
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pr_info("mod_temp_handler\n");
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pr_info("temp_handler\n");
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spin_lock(&dev->mod_base.temp_lock);
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mod_TemperatureMonitorSetFan(dev);
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spin_unlock(&dev->mod_base.temp_lock);
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spin_lock(&dev->temp_lock);
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TemperatureMonitorSetFan(dev);
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spin_unlock(&dev->temp_lock);
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}
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static int mod_TemperatureMonitorInit(struct ddb *dev, int FirstTime) {
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static int TemperatureMonitorInit(struct ddb *dev, int FirstTime) {
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int status = 0;
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spin_lock_irq(&dev->mod_base.temp_lock);
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spin_lock_irq(&dev->temp_lock);
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if (FirstTime) {
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static u8 TemperatureTable[11] = {30,35,40,45,50,55,60,65,70,75,80};
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memcpy(dev->mod_base.temp_tab, TemperatureTable, sizeof(TemperatureTable));
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memcpy(dev->temp_tab, TemperatureTable, sizeof(TemperatureTable));
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}
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dev->handler[0][8] = mod_temp_handler;
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dev->handler[0][8] = temp_handler;
|
||||
dev->handler_data[0][8] = (unsigned long) dev;
|
||||
ddbwritel(dev, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
|
||||
TEMPMON_CONTROL_INTENABLE),
|
||||
TEMPMON_CONTROL);
|
||||
ddbwritel(dev, (3 << 8), TEMPMON_FANCONTROL);
|
||||
|
||||
dev->mod_base.OverTemperatureError =
|
||||
dev->OverTemperatureError =
|
||||
((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0);
|
||||
if (dev->mod_base.OverTemperatureError) {
|
||||
if (dev->OverTemperatureError) {
|
||||
pr_info("Over temperature condition\n");
|
||||
status = -1;
|
||||
}
|
||||
mod_TemperatureMonitorSetFan(dev);
|
||||
spin_unlock_irq(&dev->mod_base.temp_lock);
|
||||
TemperatureMonitorSetFan(dev);
|
||||
spin_unlock_irq(&dev->temp_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif
|
||||
/****************************************************************************/
|
||||
/****************************************************************************/
|
||||
/****************************************************************************/
|
||||
@ -1063,12 +1063,24 @@ u32 eqtab[] = {
|
||||
0x00001B23, 0x0000EEB7, 0x00006A28
|
||||
};
|
||||
|
||||
static int mod_set_modulation(struct ddb *dev, int chan, enum fe_modulation mod)
|
||||
static int mod_set_modrate(struct ddb *dev, int chan,
|
||||
enum fe_modulation mod, u32 srate)
|
||||
{
|
||||
u64 ofac;
|
||||
|
||||
if (mod > QAM_256 || mod < QAM_16)
|
||||
return -EINVAL;
|
||||
if (dev->link[0].info->version < 2) {
|
||||
if (srate != 6900000)
|
||||
return -EINVAL;
|
||||
} else {
|
||||
if (srate > 7100000)
|
||||
return -EINVAL;
|
||||
}
|
||||
dev->mod[chan].symbolrate = srate;
|
||||
dev->mod[chan].modulation = mod;
|
||||
dev->mod[chan].obitrate = 0x0061072787900000ULL * (mod + 3);
|
||||
ofac = ((((u64) srate) << 32) * 188 ) / 204;
|
||||
dev->mod[chan].obitrate = ofac * (mod + 3);
|
||||
dev->mod[chan].ibitrate = dev->mod[chan].obitrate;
|
||||
if (dev->link[0].info->version < 2)
|
||||
ddbwritel(dev, qamtab[mod], CHANNEL_SETTINGS(chan));
|
||||
@ -1180,9 +1192,10 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
|
||||
|
||||
iqfreq = flash->DataSet[0].FrequencyFactor *
|
||||
(FrequencyCH10 + (9 - i) * 8);
|
||||
iqfreq += (dev->link[0].ids.hwid == 0x0203dd01) ? 22 : 0 ;
|
||||
iqsteps = flash->DataSet[0].IQTableLength;
|
||||
mod_set_iq(dev, iqsteps, i, iqfreq);
|
||||
mod_set_modulation(dev, i, QAM_256);
|
||||
mod_set_modrate(dev, i, QAM_256, 6900000);
|
||||
}
|
||||
|
||||
mod_bypass_equalizer(dev, 1);
|
||||
@ -1391,7 +1404,29 @@ void ddbridge_mod_rate_handler(unsigned long data)
|
||||
PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
|
||||
}
|
||||
|
||||
static int mod_ioctl_1(struct file *file, unsigned int cmd, void *parg)
|
||||
static void mod_calc_rateinc(struct ddb_mod *mod)
|
||||
{
|
||||
u32 ri;
|
||||
|
||||
pr_info("ibitrate %llu\n", mod->ibitrate);
|
||||
pr_info("obitrate %llu\n", mod->obitrate);
|
||||
|
||||
if (mod->ibitrate != 0) {
|
||||
u64 d = mod->obitrate - mod->ibitrate;
|
||||
|
||||
d = div64_u64(d, mod->obitrate >> 24);
|
||||
if (d > 0xfffffe)
|
||||
ri = 0xfffffe;
|
||||
else
|
||||
ri = d;
|
||||
} else
|
||||
ri = 0;
|
||||
mod->rate_inc = ri;
|
||||
pr_info("ibr=%llu, obr=%llu, ri=0x%06x\n",
|
||||
mod->ibitrate >> 32, mod->obitrate >> 32, ri);
|
||||
}
|
||||
|
||||
int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ddb_output *output = dvbdev->priv;
|
||||
@ -1405,11 +1440,13 @@ static int mod_ioctl_1(struct file *file, unsigned int cmd, void *parg)
|
||||
{
|
||||
struct dvb_mod_params *mp = parg;
|
||||
|
||||
pr_info("set base freq\n");
|
||||
if (mp->base_frequency != dev->mod_base.frequency)
|
||||
if (set_base_frequency(dev, mp->base_frequency))
|
||||
return -EINVAL;
|
||||
pr_info("set attenuator\n");
|
||||
if (dev->link[0].info->version < 2) {
|
||||
if (mp->base_frequency != dev->mod_base.frequency)
|
||||
if (set_base_frequency(dev, mp->base_frequency))
|
||||
return -EINVAL;
|
||||
} else {
|
||||
dev->mod_base.frequency = mp->base_frequency;
|
||||
}
|
||||
mod_set_attenuator(dev, mp->attenuator);
|
||||
break;
|
||||
}
|
||||
@ -1417,10 +1454,8 @@ static int mod_ioctl_1(struct file *file, unsigned int cmd, void *parg)
|
||||
{
|
||||
struct dvb_mod_channel_params *cp = parg;
|
||||
int res;
|
||||
u32 ri;
|
||||
|
||||
pr_info("set modulation\n");
|
||||
res = mod_set_modulation(dev, output->nr, cp->modulation);
|
||||
res = mod_set_modrate(dev, output->nr, cp->modulation, 6900000);
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
@ -1429,24 +1464,7 @@ static int mod_ioctl_1(struct file *file, unsigned int cmd, void *parg)
|
||||
dev->mod[output->nr].ibitrate = cp->input_bitrate;
|
||||
dev->mod[output->nr].pcr_correction = cp->pcr_correction;
|
||||
|
||||
pr_info("ibitrate %llu\n", dev->mod[output->nr].ibitrate);
|
||||
pr_info("obitrate %llu\n", dev->mod[output->nr].obitrate);
|
||||
if (cp->input_bitrate != 0) {
|
||||
u64 d = dev->mod[output->nr].obitrate -
|
||||
dev->mod[output->nr].ibitrate;
|
||||
|
||||
d = div64_u64(d, dev->mod[output->nr].obitrate >> 24);
|
||||
if (d > 0xfffffe)
|
||||
ri = 0xfffffe;
|
||||
else
|
||||
ri = d;
|
||||
} else
|
||||
ri = 0;
|
||||
dev->mod[output->nr].rate_inc = ri;
|
||||
pr_info("ibr=%llu, obr=%llu, ri=0x%06x\n",
|
||||
dev->mod[output->nr].ibitrate >> 32,
|
||||
dev->mod[output->nr].obitrate >> 32,
|
||||
ri);
|
||||
mod_calc_rateinc(&dev->mod[output->nr]);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@ -1456,83 +1474,17 @@ static int mod_ioctl_1(struct file *file, unsigned int cmd, void *parg)
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/****************************************************************************/
|
||||
/****************************************************************************/
|
||||
|
||||
static int mod_ioctl_2(struct file *file, unsigned int cmd, void *parg)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ddb_output *output = dvbdev->priv;
|
||||
struct ddb *dev = output->port->dev;
|
||||
|
||||
/* unsigned long arg = (unsigned long) parg; */
|
||||
int ret = 0;
|
||||
|
||||
switch (cmd) {
|
||||
case DVB_MOD_SET:
|
||||
{
|
||||
struct dvb_mod_params *mp = parg;
|
||||
|
||||
pr_info("set base freq\n");
|
||||
dev->mod_base.frequency = mp->base_frequency;
|
||||
pr_info("set attenuator\n");
|
||||
mod_set_attenuator(dev, mp->attenuator);
|
||||
break;
|
||||
}
|
||||
case DVB_MOD_CHANNEL_SET:
|
||||
{
|
||||
struct dvb_mod_channel_params *cp = parg;
|
||||
int res;
|
||||
u32 ri;
|
||||
|
||||
res = mod_set_modulation(dev, output->nr, cp->modulation);
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
if (cp->input_bitrate > dev->mod[output->nr].obitrate)
|
||||
return -EINVAL;
|
||||
dev->mod[output->nr].ibitrate = cp->input_bitrate;
|
||||
dev->mod[output->nr].pcr_correction = cp->pcr_correction;
|
||||
|
||||
pr_info("ibitrate %llu\n", dev->mod[output->nr].ibitrate);
|
||||
pr_info("obitrate %llu\n", dev->mod[output->nr].obitrate);
|
||||
if (cp->input_bitrate != 0) {
|
||||
u64 d = dev->mod[output->nr].obitrate -
|
||||
dev->mod[output->nr].ibitrate;
|
||||
|
||||
d = div64_u64(d, dev->mod[output->nr].obitrate >> 24);
|
||||
if (d > 0xfffffe)
|
||||
ri = 0xfffffe;
|
||||
else
|
||||
ri = d;
|
||||
} else
|
||||
ri = 0;
|
||||
dev->mod[output->nr].rate_inc = ri;
|
||||
pr_info("ibr=%llu, obr=%llu, ri=0x%06x\n",
|
||||
dev->mod[output->nr].ibitrate >> 32,
|
||||
dev->mod[output->nr].obitrate >> 32,
|
||||
ri);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static int mod_init_2(struct ddb *dev, u32 Frequency)
|
||||
{
|
||||
int status;
|
||||
int status, i;
|
||||
int streams = dev->link[0].info->port_num;
|
||||
|
||||
dev->mod_base.frequency = Frequency;
|
||||
mod_TemperatureMonitorInit(dev, 1);
|
||||
status = mod_fsm_setup(dev, 0, 0);
|
||||
|
||||
for (i = 0; i < streams; i++)
|
||||
mod_set_modrate(dev, i, QAM_256, 6900000);
|
||||
|
||||
if (streams <= 8)
|
||||
mod_set_vga(dev, RF_VGA_GAIN_N8);
|
||||
else if (streams <= 16)
|
||||
@ -1544,22 +1496,8 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
|
||||
{
|
||||
struct dvb_device *dvbdev = file->private_data;
|
||||
struct ddb_output *output = dvbdev->priv;
|
||||
struct ddb *dev = output->port->dev;
|
||||
|
||||
if (dev->link[0].info->version <= 0)
|
||||
return mod_ioctl_1(file, cmd, parg);
|
||||
if (dev->link[0].info->version == 2)
|
||||
return mod_ioctl_2(file, cmd, parg);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int ddbridge_mod_init(struct ddb *dev)
|
||||
{
|
||||
spin_lock_init(&dev->mod_base.temp_lock);
|
||||
if (dev->link[0].info->version <= 1)
|
||||
return mod_init_1(dev, 722000000);
|
||||
if (dev->link[0].info->version == 2)
|
||||
|
||||
@ -147,7 +147,7 @@
|
||||
#define DAC_CONTROL_RESET (0x200)
|
||||
|
||||
/* Temperature Monitor ( 2x LM75A @ 0x90,0x92 I2c ) */
|
||||
#define TEMPMON_BASE (0xA0)
|
||||
#define TEMPMON_BASE (0x1c0)
|
||||
#define TEMPMON_CONTROL (TEMPMON_BASE + 0x00)
|
||||
|
||||
#define TEMPMON_CONTROL_SCAN (0x00000001)
|
||||
|
||||
@ -475,6 +475,7 @@ static struct ddb_info ddb_mod_fsm_24 = {
|
||||
.regmap = &octopus_mod_2_map,
|
||||
.port_num = 24,
|
||||
.temp_num = 1,
|
||||
.tempmon_irq = 8,
|
||||
};
|
||||
|
||||
static struct ddb_info ddb_mod_fsm_16 = {
|
||||
@ -484,6 +485,7 @@ static struct ddb_info ddb_mod_fsm_16 = {
|
||||
.regmap = &octopus_mod_2_map,
|
||||
.port_num = 16,
|
||||
.temp_num = 1,
|
||||
.tempmon_irq = 8,
|
||||
};
|
||||
|
||||
static struct ddb_info ddb_mod_fsm_8 = {
|
||||
@ -493,6 +495,7 @@ static struct ddb_info ddb_mod_fsm_8 = {
|
||||
.regmap = &octopus_mod_2_map,
|
||||
.port_num = 8,
|
||||
.temp_num = 1,
|
||||
.tempmon_irq = 8,
|
||||
};
|
||||
|
||||
static struct ddb_info ddb_octopro_hdin = {
|
||||
@ -541,15 +544,18 @@ static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
|
||||
DDB_ID(DDVID, 0x0006, DDVID, 0x0032, ddb_ctv7),
|
||||
DDB_ID(DDVID, 0x0006, DDVID, 0x0033, ddb_ctv7),
|
||||
DDB_ID(DDVID, 0x0007, DDVID, 0x0023, ddb_s2_48),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0034, ddb_ct_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0035, ddb_ct_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0036, ddb_ct_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0034, ddb_ct2_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0035, ddb_c2t2_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0036, ddb_isdbt_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0037, ddb_c2t2i_v0_8),
|
||||
DDB_ID(DDVID, 0x0008, DDVID, 0x0038, ddb_c2t2i_8),
|
||||
DDB_ID(DDVID, 0x0011, DDVID, 0x0040, ddb_ci),
|
||||
DDB_ID(DDVID, 0x0011, DDVID, 0x0041, ddb_cis),
|
||||
DDB_ID(DDVID, 0x0012, DDVID, 0x0042, ddb_ci),
|
||||
DDB_ID(DDVID, 0x0013, DDVID, 0x0043, ddb_ci_s2_pro),
|
||||
DDB_ID(DDVID, 0x0201, DDVID, 0x0001, ddb_mod),
|
||||
DDB_ID(DDVID, 0x0201, DDVID, 0x0002, ddb_mod),
|
||||
DDB_ID(DDVID, 0x0203, DDVID, 0x0001, ddb_mod),
|
||||
DDB_ID(DDVID, 0x0210, DDVID, 0x0001, ddb_mod_fsm_24),
|
||||
DDB_ID(DDVID, 0x0210, DDVID, 0x0002, ddb_mod_fsm_16),
|
||||
DDB_ID(DDVID, 0x0210, DDVID, 0x0003, ddb_mod_fsm_8),
|
||||
|
||||
@ -172,6 +172,7 @@ struct ddb_info {
|
||||
#define TS_QUIRK_SERIAL 1
|
||||
#define TS_QUIRK_REVERSED 2
|
||||
#define TS_QUIRK_NO_OUTPUT 4
|
||||
u32 tempmon_irq;
|
||||
struct ddb_regmap *regmap;
|
||||
};
|
||||
|
||||
@ -338,10 +339,6 @@ struct mod_base {
|
||||
u32 frequency;
|
||||
u32 flat_start;
|
||||
u32 flat_end;
|
||||
|
||||
spinlock_t temp_lock;
|
||||
int OverTemperatureError;
|
||||
u8 temp_tab[11];
|
||||
};
|
||||
|
||||
struct ddb_mod {
|
||||
@ -424,6 +421,10 @@ struct ddb_link {
|
||||
struct ddb_lnb lnb;
|
||||
struct tasklet_struct tasklet;
|
||||
struct ddb_ids ids;
|
||||
|
||||
spinlock_t temp_lock;
|
||||
int OverTemperatureError;
|
||||
u8 temp_tab[11];
|
||||
};
|
||||
|
||||
struct ddb {
|
||||
@ -471,6 +472,7 @@ struct ddb {
|
||||
|
||||
struct mod_base mod_base;
|
||||
struct ddb_mod mod[24];
|
||||
|
||||
};
|
||||
|
||||
static inline void ddbwriteb(struct ddb *dev, u32 val, u32 adr)
|
||||
@ -520,7 +522,7 @@ static inline void gtlw(struct ddb_link *link)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
|
||||
static u32 ddblreadl(struct ddb_link *link, u32 adr)
|
||||
{
|
||||
if (unlikely(link->nr)) {
|
||||
@ -554,7 +556,6 @@ static void ddblwritel(struct ddb_link *link, u32 val, u32 adr)
|
||||
}
|
||||
writel(val, (char *) (link->dev->regs + (adr)));
|
||||
}
|
||||
#endif
|
||||
|
||||
static u32 ddbreadl(struct ddb *dev, u32 adr)
|
||||
{
|
||||
@ -744,7 +745,7 @@ struct DDMOD_FLASH {
|
||||
int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg);
|
||||
int ddbridge_mod_init(struct ddb *dev);
|
||||
void ddbridge_mod_output_stop(struct ddb_output *output);
|
||||
void ddbridge_mod_output_start(struct ddb_output *output);
|
||||
int ddbridge_mod_output_start(struct ddb_output *output);
|
||||
void ddbridge_mod_rate_handler(unsigned long data);
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user