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add MODULATOR_RESET property
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6bdfe43958
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3778a64de5
@ -474,17 +474,16 @@ static int mod_fsm_setup(struct ddb *dev, u32 MaxUsedChannels)
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u32 Capacity;
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u32 tmp = ddbreadl(dev, FSM_STATUS);
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if ((tmp & FSM_STATUS_READY) == 0) {
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status = mod_setup_max2871(dev, max2871_fsm);
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if (status)
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return status;
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ddbwritel(dev, FSM_CMD_RESET, FSM_CONTROL);
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msleep(20);
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status = mod_setup_max2871(dev, max2871_fsm);
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if (status)
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return status;
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ddbwritel(dev, FSM_CMD_RESET, FSM_CONTROL);
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msleep(20);
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tmp = ddbreadl(dev, FSM_STATUS);
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if ((tmp & FSM_STATUS_READY) == 0)
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return -1;
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tmp = ddbreadl(dev, FSM_STATUS);
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if ((tmp & FSM_STATUS_READY) == 0)
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return -1;
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}
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Capacity = ddbreadl(dev, FSM_CAPACITY);
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if (((tmp & FSM_STATUS_QAMREADY) != 0) &&
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((Capacity & FSM_CAPACITY_INUSE) != 0))
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@ -1529,6 +1528,11 @@ static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
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if (mod->port->dev->link[0].info->version == 2)
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return mod_set_vga(mod->port->dev, tvp->u.data);
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return -EINVAL;
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case MODULATOR_RESET:
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if (mod->port->dev->link[0].info->version == 2)
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return mod_fsm_setup(mod->port->dev,0 );
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return -EINVAL;
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}
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return 0;
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}
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@ -30,6 +30,7 @@ struct dvb_mod_channel_params {
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#define MODULATOR_INPUT_BITRATE 33 /* Hz */
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#define MODULATOR_PCR_MODE 34 /* 1=pcr correction enabled */
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#define MODULATOR_GAIN 35
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#define MODULATOR_RESET 36
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#define MODULATOR_OUTPUT_ARI 64
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#endif /*_UAPI_DVBMOD_H_*/
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