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Merge branch 'internal'

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2021-02-25 15:00:30 +01:00
parent 1863ad2270 01ca1b8805
commit 5714b85238
10 changed files with 105 additions and 53 deletions
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3
apps/octonet/ddupdate.c
View File

@@ -200,6 +200,7 @@ static int usage()
"-n N\n only update card N (default with N=0)\n\n"
"-a \n update all cards\n\n"
"-b file\n fpga image file override (ignored if -a is used)\n\n"
"-f \n force update\n\n"
"-v \n more verbose (up to -v -v -v)\n\n"
);
}
@@ -250,7 +251,7 @@ int main(int argc, char **argv)
break;
case 'h':
usage();
break;
return 0;
default:
break;

20
apps/octonet/flash.c
View File

@@ -50,15 +50,15 @@ struct flash_info flashs[] = {
{ { 0x01, 0x40, 0x15 }, SPANSION_S25FL116K, 4096, 0x200000, "SPANSION S25FL116K 16 MBit" },
{ { 0x01, 0x40, 0x16 }, SPANSION_S25FL132K, 4096, 0x400000, "SPANSION S25FL132K 32 MBit" },
{ { 0x01, 0x40, 0x17 }, SPANSION_S25FL164K, 4096, 0x800000, "SPANSION S25FL164K 64 MBit" },
{ { 0xef, 0x40, 0x15 }, WINBOND_W25Q16JV, 4096, 0x200000, "Winbond 16 MBit" },
{ { 0xef, 0x40, 0x16 }, WINBOND_W25Q32JV, 4096, 0x400000, "Winbond 32 MBit" },
{ { 0xef, 0x40, 0x17 }, WINBOND_W25Q64JV, 4096, 0x800000, "Winbond 64 MBit" },
{ { 0xef, 0x40, 0x18 }, WINBOND_W25Q128JV, 4096, 0x1000000, "Winbond 128 MBit" },
{ { 0xef, 0x70, 0x15 }, WINBOND_W25Q16JV, 4096, 0x200000, "Winbond 16 MBit" },
{ { 0xef, 0x70, 0x16 }, WINBOND_W25Q32JV, 4096, 0x400000, "Winbond 32 MBit" },
{ { 0xef, 0x70, 0x17 }, WINBOND_W25Q64JV, 4096, 0x800000, "Winbond 64 MBit" },
{ { 0xef, 0x70, 0x18 }, WINBOND_W25Q128JV, 4096, 0x1000000, "Winbond 128 MBit" },
{ { 0x1f, 0x28, 0xff }, ATMEL_AT45DB642D, 1024, 0x800000, "Atmel AT45DB642D 64 MBit" },
{ { 0xef, 0x40, 0x15 }, WINBOND_W25Q16JV, 4096, 0x200000, "Winbond W25Q16JV 16 MBit" },
{ { 0xef, 0x40, 0x16 }, WINBOND_W25Q32JV, 4096, 0x400000, "Winbond W25Q32JV 32 MBit" },
{ { 0xef, 0x40, 0x17 }, WINBOND_W25Q64JV, 4096, 0x800000, "Winbond W25Q64JV 64 MBit" },
{ { 0xef, 0x40, 0x18 }, WINBOND_W25Q128JV, 4096, 0x1000000, "Winbond W25Q128JV 128 MBit" },
{ { 0xef, 0x70, 0x15 }, WINBOND_W25Q16JV, 4096, 0x200000, "Winbond W25Q16JV 16 MBit" },
{ { 0xef, 0x70, 0x16 }, WINBOND_W25Q32JV, 4096, 0x400000, "Winbond W25Q32JV 32 MBit" },
{ { 0xef, 0x70, 0x17 }, WINBOND_W25Q64JV, 4096, 0x800000, "Winbond W25Q64JV 64 MBit" },
{ { 0xef, 0x70, 0x18 }, WINBOND_W25Q128JV, 4096, 0x1000000, "Winbond W25Q128JV 128 MBit" },
{ { 0x1f, 0x28, 0xff }, ATMEL_AT45DB642D, 1024, 0x800000, "Atmel AT45DB642D 64 MBit" },
{ { 0x00, 0x00, 0x00 }, UNKNOWN_FLASH, 0, 0, "Unknown" },
};
@@ -68,7 +68,7 @@ static struct flash_info *flash_getinfo(uint8_t *id)
while (f->id[0]) {
if ((f->id[0] == id[0]) && (f->id[1] == id[1]) &&
((id[0] == 0xff) || (f->id[0] == id[0])))
((id[2] == 0xff) || (f->id[2] == id[2])))
break;
f++;
}

4
apps/setmod3.c
View File

@@ -58,7 +58,7 @@ int main(int argc, char*argv[])
struct dvb_mod_params mp;
struct dvb_mod_channel_params mc;
uint32_t data;
int adapter = 0, channel = 0, gain = -1;
int32_t adapter = 0, channel = 0, gain = -1;
int32_t base = -1, freq = -1, rate = -1;
char mod_name[128];
@@ -134,6 +134,8 @@ int main(int argc, char*argv[])
//get_property(fd, MODULATOR_ATTENUATOR, &data);
//printf("Modulator attenuator = %u\n", data);
if (gain > 0)
set_property(fd, MODULATOR_GAIN, gain);
if (base > 0)
set_property(fd, MODULATOR_BASE_FREQUENCY, base);
if (freq > 0)

59
ddbridge/ddbridge-core.c
View File

@@ -527,6 +527,18 @@ static void ddb_output_stop(struct ddb_output *output)
}
}
static void update_loss(struct ddb_dma *dma)
{
struct ddb_input *input = (struct ddb_input *)dma->io;
u32 packet_loss = dma->packet_loss;
u32 cur_counter = ddbreadl(input->port->dev, TS_STAT(input)) & 0xffff;
if (cur_counter < (packet_loss & 0xffff))
packet_loss += 0x10000;
packet_loss = ((packet_loss & 0xffff0000) | cur_counter);
dma->packet_loss = packet_loss;
}
static void ddb_input_stop_unlocked(struct ddb_input *input)
{
struct ddb *dev = input->port->dev;
@@ -540,7 +552,8 @@ static void ddb_input_stop_unlocked(struct ddb_input *input)
dev_warn(input->port->dev->dev,
"DMA stalled %u times!\n",
input->dma->stall_count);
if (input->dma->packet_loss)
update_loss(input->dma);
if (input->dma->packet_loss > 1)
dev_warn(input->port->dev->dev,
"%u packets lost due to low DMA performance!\n",
input->dma->packet_loss);
@@ -1068,7 +1081,11 @@ static int demod_attach_dummy(struct ddb_input *input)
{
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
#if 0
dvb->fe = dvb_attach(dummy_attach);
#else
dvb->fe = dummy_attach();
#endif
return 0;
}
@@ -2277,21 +2294,36 @@ static void input_write_dvb(struct ddb_input *input,
}
while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || (4 & dma->ctrl)) {
if (4 & dma->ctrl) {
/*dev_err(dev->dev, "Overflow dma %d\n", dma->nr);*/
dev_warn(dev->dev, "Overflow dma input %u\n", input->nr);
ack = 1;
}
if (alt_dma)
dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
dma2->size, DMA_FROM_DEVICE);
if (raw_stream || input->con)
if (raw_stream || input->con) {
dvb_dmx_swfilter_raw(&dvb->demux,
dma2->vbuf[dma->cbuf],
dma2->size);
else
dvb_dmx_swfilter_packets(&dvb->demux,
} else {
if (dma2->vbuf[dma->cbuf][0] != 0x47) {
if (!dma2->unaligned) {
dma2->unaligned++;
dev_warn(dev->dev, "Input %u dma buffer unaligned, "
"switching to unaligned processing.\n",
input->nr);
print_hex_dump(KERN_INFO, "TS: ", DUMP_PREFIX_OFFSET, 32, 1,
dma2->vbuf[dma->cbuf],
256, false);
}
dvb_dmx_swfilter(&dvb->demux,
dma2->vbuf[dma->cbuf],
dma2->size / 188);
dma2->size);
} else
dvb_dmx_swfilter_packets(&dvb->demux,
dma2->vbuf[dma->cbuf],
dma2->size / 188);
}
dma->cbuf = (dma->cbuf + 1) % dma2->num;
if (ack)
ddbwritel(dev, (dma->cbuf << 11),
@@ -2321,16 +2353,7 @@ static void input_tasklet(unsigned long data)
}
dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
{
u32 packet_loss = dma->packet_loss;
u32 cur_counter = ddbreadl(dev, TS_STAT(input)) & 0xffff;
if (cur_counter < (packet_loss & 0xffff))
packet_loss += 0x10000;
packet_loss = ((packet_loss & 0xffff0000) | cur_counter);
dma->packet_loss = packet_loss;
}
update_loss(dma);
if (4 & dma->ctrl)
dma->stall_count++;
if (input->redi)
@@ -3453,8 +3476,6 @@ static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
if (msg.link > 3)
return -EFAULT;
link = &dev->link[msg.link];
if (!link->mci_base)
return -EFAULT;
res = ddb_mci_cmd_link(link, &msg.cmd, &msg.res);
if (copy_to_user(parg, &msg, sizeof(msg)))
return -EFAULT;

1
ddbridge/ddbridge-main.c
View File

@@ -139,6 +139,7 @@ static void __devexit ddb_remove(struct pci_dev *pdev)
ddb_buffers_free(dev);
ddb_unmap(dev);
pci_clear_master(pdev);
pci_set_drvdata(pdev, NULL);
pci_disable_device(pdev);
}

27
ddbridge/ddbridge-mci.c
View File

@@ -59,7 +59,11 @@ static int mci_reset(struct ddb_link *link)
dev_err(link->dev->dev, "MCI init failed!\n");
return -1;
}
dev_info(link->dev->dev, "MCI port OK, init time %u msecs\n", (40-timeout)*50);
dev_info(link->dev->dev, "MCI port OK, init time %u msecs\n", (40 - timeout) * 50);
print_hex_dump(KERN_INFO, "ddbridge: MCI INIT INFO: ", DUMP_PREFIX_NONE, 16, 1,
link->dev->regs + regmap->mci_buf->base + MCI_COMMAND_SIZE,
16, false);
return 0;
}
@@ -166,11 +170,17 @@ int mci_init(struct ddb_link *link)
int mci_cmd_val(struct ddb_link *link, uint32_t cmd, uint32_t val)
{
struct mci_result result;
#if 0
struct mci_command command = {
.command_word = cmd,
.params = { val },
};
#else
struct mci_command command;
command.command_word = cmd;
command.params[0] = val;
#endif
return ddb_mci_cmd_link(link, &command, &result);
}
@@ -209,6 +219,21 @@ int ddb_mci_get_status(struct mci *mci, struct mci_result *res)
return ddb_mci_cmd_raw(mci, &cmd, 1, res, 1);
}
static void ddb_mci_print_info(struct mci *mci)
{
struct ddb_link *link = mci->base->link;
const struct ddb_regmap *regmap = link->info->regmap;
struct mci_command cmd;
struct mci_result res;
cmd.command = 0x0f;
if (ddb_mci_cmd_raw(mci, &cmd, 1, &res, 1) < 0)
return;
print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
link->dev->regs + regmap->mci_buf->base + MCI_COMMAND_SIZE,
16, false);
}
int ddb_mci_get_snr(struct dvb_frontend *fe)
{
struct mci *mci = fe->demodulator_priv;

6
ddbridge/ddbridge-sx8.c
View File

@@ -136,6 +136,10 @@ static int read_status(struct dvb_frontend *fe, enum fe_status *status)
stat = ddb_mci_get_status(&state->mci, &res);
if (stat)
return stat;
if (sx8_base->iq_mode >= 2) {
*status = 0x1f;
return stat;
}
*status = 0x00;
ddb_mci_get_info(&state->mci);
if (res.status == SX8_DEMOD_WAIT_MATYPE)
@@ -407,7 +411,7 @@ static int start_iq(struct dvb_frontend *fe, u32 flags,
mci_set_tuner(fe, input, 1);
*/
sx8_base->tuner_use_count[input]++;
sx8_base->iq_mode = (ts_config > 1);
sx8_base->iq_mode = 2;
unlock:
mutex_unlock(&mci_base->tuner_lock);
if (stat)

1
ddbridge/ddbridge.h
View File

@@ -219,6 +219,7 @@ struct ddb_dma {
u32 stall_count;
u32 packet_loss;
u32 unaligned;
};
struct ddb_dvb {

28
frontends/cxd2843.c
View File

@@ -54,6 +54,7 @@ struct cxd_state {
struct dvb_frontend frontend;
struct i2c_adapter *i2c;
struct mutex mutex;
int repi2cerr;
u8 adrt;
u8 curbankt;
@@ -91,12 +92,13 @@ struct cxd_state {
u8 is24MHz;
};
static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len, int flag)
{
struct i2c_msg msg = {
.addr = adr, .flags = 0, .buf = data, .len = len};
if (i2c_transfer(adap, &msg, 1) != 1) {
pr_err("cxd2843: i2c_write error adr %02x data %02x\n", adr, data[0]);
if (flag)
pr_err("cxd2843: i2c_write error adr %02x data %02x\n", adr, data[0]);
return -1;
}
return 0;
@@ -113,14 +115,14 @@ static int writeregs(struct cxd_state *state, u8 adr, u8 reg,
}
data[0] = reg;
memcpy(data + 1, regd, len);
return i2c_write(state->i2c, adr, data, len + 1);
return i2c_write(state->i2c, adr, data, len + 1, state->repi2cerr);
}
static int writereg(struct cxd_state *state, u8 adr, u8 reg, u8 dat)
{
u8 mm[2] = {reg, dat};
return i2c_write(state->i2c, adr, mm, 2);
return i2c_write(state->i2c, adr, mm, 2, state->repi2cerr);
}
static int i2c_read(struct i2c_adapter *adap,
@@ -130,17 +132,19 @@ static int i2c_read(struct i2c_adapter *adap,
.buf = msg, .len = len},
{ .addr = adr, .flags = I2C_M_RD,
.buf = answ, .len = alen } };
if (i2c_transfer(adap, msgs, 2) != 2) {
pr_err("cxd2843: i2c_read error\n");
if (i2c_transfer(adap, msgs, 2) != 2)
return -1;
}
return 0;
}
static int readregs(struct cxd_state *state, u8 adr, u8 reg,
u8 *val, int count)
{
return i2c_read(state->i2c, adr, &reg, 1, val, count);
int ret = i2c_read(state->i2c, adr, &reg, 1, val, count);
if (ret && state->repi2cerr)
pr_err("cxd2843: i2c_read error\n");
return ret;
}
static int readregst_unlocked(struct cxd_state *cxd, u8 bank,
@@ -1644,7 +1648,7 @@ static void init_state(struct cxd_state *state, struct cxd2843_cfg *cfg)
/* IF Fullscale 0x50 = 1.4V, 0x39 = 1V, 0x28 = 0.7V */
state->IF_FS = 0x50;
state->is24MHz = (cfg->osc == 24000000) ? 1 : 0;
printk("is24Mhz = %u\n", state->is24MHz);
printk("is24Mhz = %u, adr = %02x\n", state->is24MHz, cfg->adr);
}
static int get_tune_settings(struct dvb_frontend *fe,
@@ -2646,8 +2650,9 @@ static int probe(struct cxd_state *state)
status = readregsx(state, 0x00, 0xFD, &ChipID, 1);
if (status)
return status;
printk("ChipID = %02X\n", ChipID);
state->repi2cerr = 1;
//pr_info("cxd2843: ChipID = %02X\n", ChipID);
switch (ChipID) {
case 0xa4:
state->type = CXD2843;
@@ -2682,7 +2687,6 @@ struct dvb_frontend *cxd2843_attach(struct i2c_adapter *i2c,
{
struct cxd_state *state = NULL;
pr_info("attach\n");
state = kzalloc(sizeof(struct cxd_state), GFP_KERNEL);
if (!state)
return NULL;

9
frontends/tda18212dd.c
View File

@@ -447,18 +447,13 @@ static int attach_init(struct tda_state *state)
if (!state->m_isMaster)
state->m_bLTEnable = false;
/*pr_info("tda18212dd: ChipID %04x %s\n", state->m_ID,
state->m_isMaster ? "master" : "slave");*/
if (state->m_ID != 18212)
return -1;
stat = read_reg(state, POWER_STATE_1 , &PowerState);
if (stat < 0)
return stat;
/*pr_info("tda18212dd: PowerState %02x\n", PowerState);*/
if (state->m_isMaster) {
if (PowerState & 0x02) {
/* msleep for XTAL Calibration
@@ -539,7 +534,6 @@ static int PowerMeasurement(struct tda_state *state, u8 *pPowerLevel)
if (*pPowerLevel > 110)
*pPowerLevel = 110;
} while (0);
/* pr_info("PL %d\n", *pPowerLevel); */
return status;
}
@@ -806,7 +800,6 @@ static int set_params(struct dvb_frontend *fe)
bw = (p->bandwidth_hz + 999999) / 1000000;
state->m_Frequency = p->frequency;
/*pr_info("tuner bw=%u freq=%u\n", bw, state->m_Frequency);*/
if (p->delivery_system == SYS_DVBT ||
p->delivery_system == SYS_DVBT2 ||
p->delivery_system == SYS_ISDBT ||