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https://github.com/DigitalDevices/dddvb.git
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Added FEC and Modulation type for DVB-S2X (Specified in ETSI EN 302 307-2)
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040a1c58b6
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@ -1,4 +1,4 @@
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all: cit citin flashprog modt ddtest setmod ddflash setmod2 pls setmod3
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all: cit citin flashprog modt ddtest setmod ddflash setmod2 pls setmod3 modcod
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cit: cit.c
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$(CC) -o cit cit.c -lpthread
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@ -15,6 +15,9 @@ setmod2: setmod2.c
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setmod3: setmod3.c
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$(CC) -o setmod3 setmod3.c -I../include/
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modcod: modcod.c
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$(CC) -o modcod modcod.c -I../include/
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%.o: %.c
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$(CC) $(CFLAGS) -o $@ $<
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61
apps/modcod.c
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61
apps/modcod.c
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@ -0,0 +1,61 @@
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#include <stdio.h>
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#include <ctype.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <fcntl.h>
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#include <sys/ioctl.h>
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#include <pthread.h>
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#include <linux/dvb/mod.h>
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int main()
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{
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const enum fe_modulation modcod2modS2X[0x3D] = {
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MODULATION_NONE, MODULATION_NONE, //2
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QPSK, QPSK, QPSK, //3
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APSK_8, APSK_8,APSK_8,APSK_8,APSK_8, //5
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APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,//13
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APSK_32,MODULATION_NONE,APSK_32,APSK_32,APSK_32,//5
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APSK_64, APSK_64, MODULATION_NONE, APSK_64,MODULATION_NONE, APSK_64,MODULATION_NONE ,APSK_64,//8
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APSK_128, APSK_128,
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APSK_256, APSK_256,APSK_256,APSK_256,APSK_256,APSK_256,
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QPSK, QPSK,QPSK,QPSK,QPSK,QPSK,
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PSK_8,PSK_8,PSK_8,PSK_8,
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APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,
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APSK_32,APSK_32,
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};
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const enum fe_code_rate modcod2fecS2X[0x3D] = {
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FEC_NONE, FEC_NONE, //2
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FEC_13_45, FEC_9_20, FEC_11_20, //3
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FEC_5_9_L, FEC_26_45_L, FEC_23_36, FEC_25_36, FEC_13_18, //5
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FEC_1_2_L, FEC_8_15_L, FEC_5_9_L, FEC_26_45, FEC_3_5, FEC_3_5_L, FEC_28_45, FEC_23_36,FEC_2_3_L, FEC_25_36, FEC_13_18,FEC_7_9, FEC_77_90, //13
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FEC_2_3_L, FEC_NONE, FEC_32_45, FEC_11_15, FEC_7_9,
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FEC_32_45_L, FEC_11_15,FEC_NONE ,FEC_7_9, FEC_NONE, FEC_4_5, FEC_NONE, FEC_5_6, //8
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FEC_3_4,FEC_7_9, FEC_29_45_L,FEC_2_3_L,FEC_31_45_L,FEC_32_45,FEC_11_15_L,
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FEC_3_4,FEC_11_45,FEC_4_15,FEC_14_45,FEC_7_15,FEC_8_15,
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FEC_32_45,FEC_7_15,FEC_8_15,FEC_26_45,FEC_32_45,FEC_7_15,
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FEC_8_15,FEC_26_45,FEC_3_5,FEC_32_45,FEC_2_3,FEC_32_45,
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};
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uint8_t modcod;
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modcod = 248;
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if(modcod2modS2X[((modcod & 0x7F) >> 1)] == APSK_32)
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printf("modcod2modS2X OK\r\n");
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if(modcod2fecS2X[((modcod & 0x7F) >> 1)] == FEC_32_45)
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printf("modcod2modS2X OK\r\n");
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modcod = 132;
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if(modcod2modS2X[((modcod & 0x7F) >> 1)] == QPSK)
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printf("modcod2modS2X OK\r\n");
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if(modcod2fecS2X[((modcod & 0x7F) >> 1)] == FEC_13_45)
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printf("modcod2modS2X OK\r\n");
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//printf("test mod=%u value= %d APSK_32=%d \n",mod, modcod2modS2X[((mod & 0x7F) >> 1)], APSK_32);
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//printf("test mod=%u value= %d FEC_32_45=%d \n",mod, modcod2fecS2X[((mod & 0x7F) >> 1)], FEC_32_45);
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}
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@ -228,6 +228,35 @@ void ddb_mci_proc_info(struct mci *mci, struct dtv_frontend_properties *p)
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ROLLOFF_35, ROLLOFF_25, ROLLOFF_20, ROLLOFF_10,
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ROLLOFF_5, ROLLOFF_15, ROLLOFF_35, ROLLOFF_35
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};
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const enum fe_modulation modcod2modS2X[0x3D] = {
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MODULATION_NONE, MODULATION_NONE, //2
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QPSK, QPSK, QPSK, //3
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APSK_8, APSK_8,APSK_8,APSK_8,APSK_8, //5
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APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,//13
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APSK_32,MODULATION_NONE,APSK_32,APSK_32,APSK_32,//5
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APSK_64, APSK_64, MODULATION_NONE, APSK_64,MODULATION_NONE, APSK_64,MODULATION_NONE ,APSK_64,//8
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APSK_128, APSK_128,
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APSK_256, APSK_256,APSK_256,APSK_256,APSK_256,APSK_256,
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QPSK, QPSK,QPSK,QPSK,QPSK,QPSK,
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PSK_8,PSK_8,PSK_8,PSK_8,
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APSK_16,APSK_16,APSK_16,APSK_16,APSK_16,
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APSK_32,APSK_32,
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};
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const enum fe_code_rate modcod2fecS2X[0x3D] = {
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FEC_NONE, FEC_NONE, //2
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FEC_13_45, FEC_9_20, FEC_11_20, //3
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FEC_5_9_L, FEC_26_45_L, FEC_23_36, FEC_25_36, FEC_13_18, //5
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FEC_1_2_L, FEC_8_15_L, FEC_5_9_L, FEC_26_45, FEC_3_5, FEC_3_5_L, FEC_28_45, FEC_23_36,FEC_2_3_L, FEC_25_36, FEC_13_18,FEC_7_9, FEC_77_90, //13
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FEC_2_3_L, FEC_NONE, FEC_32_45, FEC_11_15, FEC_7_9,
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FEC_32_45_L, FEC_11_15,FEC_NONE ,FEC_7_9, FEC_NONE, FEC_4_5, FEC_NONE, FEC_5_6, //8
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FEC_3_4,FEC_7_9, FEC_29_45_L,FEC_2_3_L,FEC_31_45_L,FEC_32_45,FEC_11_15_L,
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FEC_3_4,FEC_11_45,FEC_4_15,FEC_14_45,FEC_7_15,FEC_8_15,
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FEC_32_45,FEC_7_15,FEC_8_15,FEC_26_45,FEC_32_45,FEC_7_15,
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FEC_8_15,FEC_26_45,FEC_3_5,FEC_32_45,FEC_2_3,FEC_32_45,
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};
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p->frequency =
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mci->signal_info.dvbs2_signal_info.frequency;
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@ -252,8 +281,17 @@ void ddb_mci_proc_info(struct mci *mci, struct dtv_frontend_properties *p)
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ro_lut[mci->signal_info.
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dvbs2_signal_info.roll_off & 7];
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p->pilot = (pls_code & 1) ? PILOT_ON : PILOT_OFF;
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p->fec_inner = modcod2fec[modcod];
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p->modulation = modcod2mod[modcod];
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if(modcod & 0x80) //DVB-S2X
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{
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uint8_t modcodS2X = (modcod & 0x7F) >> 1;
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p->fec_inner = modcod2fecS2X[modcodS2X];
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p->modulation = modcod2modS2X[modcodS2X];
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}
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else
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{
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p->fec_inner = modcod2fec[modcod];
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p->modulation = modcod2mod[modcod];
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}
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p->transmission_mode = pls_code;
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} else {
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p->delivery_system = SYS_DVBS;
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@ -314,6 +314,33 @@ enum fe_code_rate {
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FEC_2_5,
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FEC_1_4,
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FEC_1_3,
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FEC_13_45,
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FEC_9_20,
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FEC_11_20,
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FEC_5_9_L,
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FEC_26_45_L,
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FEC_23_36,
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FEC_25_36,
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FEC_13_18,
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FEC_1_2_L,
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FEC_8_15_L,
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FEC_26_45,
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FEC_3_5_L,
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FEC_28_45,
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FEC_2_3_L,
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FEC_7_9,
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FEC_32_45_L,
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FEC_77_90,
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FEC_32_45,
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FEC_11_15,
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FEC_29_45_L,
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FEC_31_45_L,
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FEC_11_15_L,
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FEC_11_45,
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FEC_4_15,
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FEC_14_45,
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FEC_7_15,
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FEC_8_15,
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};
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/**
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@ -354,6 +381,8 @@ enum fe_modulation {
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APSK_64,
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APSK_128,
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APSK_256,
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APSK_8,
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MODULATION_NONE,
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};
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/**
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