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				synced 2025-03-01 10:35:23 +00:00 
			
		
		
		
	add DDBridge to all message lines
This commit is contained in:
		| @@ -432,7 +432,7 @@ static int ddb_unredirect(struct ddb_port *port) | ||||
| 	struct ddb_input *oredi, *iredi = 0; | ||||
| 	struct ddb_output *iredo = 0; | ||||
|  | ||||
| 	/*pr_info("unredirect %d.%d\n", port->dev->nr, port->nr);*/ | ||||
| 	/*pr_info("DDBridge: unredirect %d.%d\n", port->dev->nr, port->nr);*/ | ||||
| 	mutex_lock(&redirect_lock); | ||||
| 	if (port->output->dma->running) { | ||||
| 		mutex_unlock(&redirect_lock); | ||||
| @@ -1030,7 +1030,7 @@ static u32 ddb_input_avail(struct ddb_input *input) | ||||
| 	off = (stat & 0x7ff) << 7; | ||||
|  | ||||
| 	if (ctrl & 4) { | ||||
| 		pr_err("IA %d %d %08x\n", idx, off, ctrl); | ||||
| 		pr_err("DDBridge: IA %d %d %08x\n", idx, off, ctrl); | ||||
| 		ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); | ||||
| 		return 0; | ||||
| 	} | ||||
| @@ -1308,7 +1308,7 @@ static int demod_attach_drxk(struct ddb_input *input) | ||||
| 				  i2c, 0x29 + (input->nr & 1), | ||||
| 				  &dvb->fe2); | ||||
| 	if (!fe) { | ||||
| 		pr_err("No DRXK found!\n"); | ||||
| 		pr_err("DDBridge: No DRXK found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	fe->sec_priv = input; | ||||
| @@ -1353,7 +1353,7 @@ static int demod_attach_cxd2843(struct ddb_input *input, int par) | ||||
| 					  (input->nr & 1) ? | ||||
| 					  &cxd2843_1 : &cxd2843_0); | ||||
| 	if (!dvb->fe) { | ||||
| 		pr_err("No cxd2837/38/43 found!\n"); | ||||
| 		pr_err("DDBridge: No cxd2837/38/43 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	fe->sec_priv = input; | ||||
| @@ -1376,7 +1376,7 @@ static int demod_attach_stv0367dd(struct ddb_input *input) | ||||
| 				  &cfg, | ||||
| 				  &dvb->fe2); | ||||
| 	if (!dvb->fe) { | ||||
| 		pr_err("No stv0367 found!\n"); | ||||
| 		pr_err("DDBridge: No stv0367 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	fe->sec_priv = input; | ||||
| @@ -1397,7 +1397,7 @@ static int tuner_attach_tda18271(struct ddb_input *input) | ||||
| 	if (dvb->fe->ops.i2c_gate_ctrl) | ||||
| 		dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); | ||||
| 	if (!fe) { | ||||
| 		pr_err("No TDA18271 found!\n"); | ||||
| 		pr_err("DDBridge: No TDA18271 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	return 0; | ||||
| @@ -1412,7 +1412,7 @@ static int tuner_attach_tda18212dd(struct ddb_input *input) | ||||
| 	fe = dvb_attach(tda18212dd_attach, dvb->fe, i2c, | ||||
| 			(input->nr & 1) ? 0x63 : 0x60); | ||||
| 	if (!fe) { | ||||
| 		pr_err("No TDA18212 found!\n"); | ||||
| 		pr_err("DDBridge: No TDA18212 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	return 0; | ||||
| @@ -1437,7 +1437,7 @@ static int tuner_attach_tda18212(struct ddb_input *input) | ||||
| 	cfg = (input->nr & 1) ? &tda18212_1 : &tda18212_0; | ||||
| 	fe = dvb_attach(tda18212_attach, dvb->fe, i2c, cfg); | ||||
| 	if (!fe) { | ||||
| 		pr_err("No TDA18212 found!\n"); | ||||
| 		pr_err("DDBridge: No TDA18212 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	return 0; | ||||
| @@ -1514,13 +1514,13 @@ static int demod_attach_stv0900(struct ddb_input *input, int type) | ||||
| 			     (input->nr & 1) ? STV090x_DEMODULATOR_1 | ||||
| 			     : STV090x_DEMODULATOR_0); | ||||
| 	if (!dvb->fe) { | ||||
| 		pr_err("No STV0900 found!\n"); | ||||
| 		pr_err("DDBridge: No STV0900 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, | ||||
| 			0, (input->nr & 1) ? | ||||
| 			(0x09 - type) : (0x0b - type))) { | ||||
| 		pr_err("No LNBH24 found!\n"); | ||||
| 		pr_err("DDBridge: No LNBH24 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	return 0; | ||||
| @@ -1537,10 +1537,10 @@ static int tuner_attach_stv6110(struct ddb_input *input, int type) | ||||
|  | ||||
| 	ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); | ||||
| 	if (!ctl) { | ||||
| 		pr_err("No STV6110X found!\n"); | ||||
| 		pr_err("DDBridge: No STV6110X found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	pr_info("attach tuner input %d adr %02x\n", | ||||
| 	pr_info("DDBridge: attach tuner input %d adr %02x\n", | ||||
| 		input->nr, tunerconf->addr); | ||||
|  | ||||
| 	feconf->tuner_init          = ctl->tuner_init; | ||||
| @@ -1580,14 +1580,14 @@ static int demod_attach_stv0910(struct ddb_input *input, int type) | ||||
| 				     &cfg, (input->nr & 1)); | ||||
| 	} | ||||
| 	if (!dvb->fe) { | ||||
| 		pr_err("No STV0910 found!\n"); | ||||
| 		pr_err("DDBridge: No STV0910 found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	if (!dvb_attach(lnbh25_attach, dvb->fe, i2c, | ||||
| 			((input->nr & 1) ? 0x0d : 0x0c))) { | ||||
| 		if (!dvb_attach(lnbh25_attach, dvb->fe, i2c, | ||||
| 				((input->nr & 1) ? 0x09 : 0x08))) { | ||||
| 			pr_err("No LNBH25 found!\n"); | ||||
| 			pr_err("DDBridge: No LNBH25 found!\n"); | ||||
| 			return -ENODEV; | ||||
| 		} | ||||
| 	} | ||||
| @@ -1605,7 +1605,7 @@ static int tuner_attach_stv6111(struct ddb_input *input, int type) | ||||
| 	if (!fe) { | ||||
| 		fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); | ||||
| 		if (!fe) { | ||||
| 			pr_err("No STV6111 found at 0x%02x!\n", adr); | ||||
| 			pr_err("DDBridge: No STV6111 found at 0x%02x!\n", adr); | ||||
| 			return -ENODEV; | ||||
| 		} | ||||
| 	} | ||||
| @@ -1627,7 +1627,7 @@ static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd) | ||||
| 		msleep(20); | ||||
| 	} | ||||
| 	if (c == 10) | ||||
| 		pr_info("lnb_command lnb = %08x  cmd = %08x\n", lnb, cmd); | ||||
| 		pr_info("DDBridge: lnb_command lnb = %08x  cmd = %08x\n", lnb, cmd); | ||||
| 	return 0; | ||||
| } | ||||
|  | ||||
| @@ -1894,7 +1894,7 @@ static int mxl_fw_read(void *priv, u8 *buf, u32 len) | ||||
| 	struct ddb_link *link = priv; | ||||
| 	struct ddb *dev = link->dev; | ||||
|  | ||||
| 	pr_info("Read mxl_fw from link %u\n", link->nr); | ||||
| 	pr_info("DDBridge: Read mxl_fw from link %u\n", link->nr); | ||||
|  | ||||
| 	return ddbridge_flashread(dev, link->nr, buf, 0xc0000, len); | ||||
| } | ||||
| @@ -1905,7 +1905,7 @@ static int lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm) | ||||
|  | ||||
| 	if (link->lnb.fmode == fm) | ||||
| 		return 0; | ||||
| 	pr_info("Set fmode link %u = %u\n", l, fm); | ||||
| 	pr_info("DDBridge: Set fmode link %u = %u\n", l, fm); | ||||
| 	mutex_lock(&link->lnb.lock); | ||||
| 	if (fm == 2 || fm == 1) { | ||||
| 		lnb_set_tone(dev, l, 0, SEC_TONE_OFF); | ||||
| @@ -1953,7 +1953,7 @@ static int fe_attach_mxl5xx(struct ddb_input *input) | ||||
| 		tuner = 0; | ||||
| 	dvb->fe = dvb_attach(mxl5xx_attach, i2c, &cfg, demod, tuner); | ||||
| 	if (!dvb->fe) { | ||||
| 		pr_err("No MXL5XX found!\n"); | ||||
| 		pr_err("DDBridge: No MXL5XX found!\n"); | ||||
| 		return -ENODEV; | ||||
| 	} | ||||
| 	if (input->nr < 4) { | ||||
| @@ -2333,7 +2333,7 @@ static int port_has_encti(struct ddb_port *port) | ||||
| 	int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); | ||||
|  | ||||
| 	if (!ret) | ||||
| 		pr_info("[0x20]=0x%02x\n", val); | ||||
| 		pr_info("DDBridge: [0x20]=0x%02x\n", val); | ||||
| 	return ret ? 0 : 1; | ||||
| } | ||||
|  | ||||
| @@ -2429,7 +2429,7 @@ static int init_xo2(struct ddb_port *port) | ||||
| 		return res; | ||||
|  | ||||
| 	if (data[0] != 0x01)  { | ||||
| 		pr_info("Port %d: invalid XO2\n", port->nr); | ||||
| 		pr_info("DDBridge: Port %d: invalid XO2\n", port->nr); | ||||
| 		return -1; | ||||
| 	} | ||||
|  | ||||
| @@ -2448,7 +2448,7 @@ static int init_xo2(struct ddb_port *port) | ||||
| 	i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); | ||||
|  | ||||
| 	if (dev->link[port->lnr].info->con_clock) { | ||||
| 		pr_info("Setting continuous clock for XO2\n"); | ||||
| 		pr_info("DDBridge: Setting continuous clock for XO2\n"); | ||||
| 		i2c_write_reg(i2c, 0x10, 0x0a, 0x03); | ||||
| 		i2c_write_reg(i2c, 0x10, 0x0b, 0x03); | ||||
| 	} else { | ||||
| @@ -2475,11 +2475,11 @@ static int init_xo2_ci(struct ddb_port *port) | ||||
| 		return res; | ||||
|  | ||||
| 	if (data[0] > 1)  { | ||||
| 		pr_info("Port %d: invalid XO2 CI %02x\n", | ||||
| 		pr_info("DDBridge: Port %d: invalid XO2 CI %02x\n", | ||||
| 			port->nr, data[0]); | ||||
| 		return -1; | ||||
| 	} | ||||
| 	pr_info("Port %d: DuoFlex CI %u.%u\n", port->nr, data[0], data[1]); | ||||
| 	pr_info("DDBridge: Port %d: DuoFlex CI %u.%u\n", port->nr, data[0], data[1]); | ||||
|  | ||||
| 	i2c_read_reg(i2c, 0x10, 0x08, &val); | ||||
| 	if (val != 0) { | ||||
| @@ -2498,7 +2498,7 @@ static int init_xo2_ci(struct ddb_port *port) | ||||
| 	usleep_range(2000, 3000); | ||||
|  | ||||
| 	if (dev->link[port->lnr].info->con_clock) { | ||||
| 		pr_info("Setting continuous clock for DuoFLex CI\n"); | ||||
| 		pr_info("DDBridge: Setting continuous clock for DuoFLex CI\n"); | ||||
| 		i2c_write_reg(i2c, 0x10, 0x0a, 0x03); | ||||
| 		i2c_write_reg(i2c, 0x10, 0x0b, 0x03); | ||||
| 	} else { | ||||
| @@ -2607,13 +2607,13 @@ static void ddb_port_probe(struct ddb_port *port) | ||||
| 			ddbwritel(dev, I2C_SPEED_400, | ||||
| 				  port->i2c->regs + I2C_TIMING); | ||||
| 		} else { | ||||
| 			pr_info(KERN_INFO "Port %d: Uninitialized DuoFlex\n", | ||||
| 			pr_info(KERN_INFO "DDBridge: Port %d: Uninitialized DuoFlex\n", | ||||
| 			       port->nr); | ||||
| 			return; | ||||
| 		} | ||||
| 	} else if (port_has_xo2(port, &type, &id)) { | ||||
| 		ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); | ||||
| 		/*pr_info("XO2 ID %02x\n", id);*/ | ||||
| 		/*pr_info("DDBridge: XO2 ID %02x\n", id);*/ | ||||
| 		if (type == 2) { | ||||
| 			port->name = "DuoFlex CI"; | ||||
| 			port->class = DDB_PORT_CI; | ||||
| @@ -2915,7 +2915,7 @@ static int slot_reset_xo2(struct dvb_ca_en50221 *ca, int slot) | ||||
| { | ||||
| 	struct ddb_ci *ci = ca->data; | ||||
|  | ||||
| 	pr_info("%s\n", __func__); | ||||
| 	pr_info("DDBridge: %s\n", __func__); | ||||
| 	write_creg(ci, 0x01, 0x01); | ||||
| 	write_creg(ci, 0x04, 0x04); | ||||
| 	msleep(20); | ||||
| @@ -2929,7 +2929,7 @@ static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot) | ||||
| { | ||||
| 	struct ddb_ci *ci = ca->data; | ||||
|  | ||||
| 	pr_info("%s\n", __func__); | ||||
| 	pr_info("DDBridge: %s\n", __func__); | ||||
| 	/*i2c_write_reg(i2c, adr, 0x03, 0x60);*/ | ||||
| 	/*i2c_write_reg(i2c, adr, 0x00, 0xc0);*/ | ||||
| 	write_creg(ci, 0x10, 0xff); | ||||
| @@ -2941,7 +2941,7 @@ static int slot_ts_enable_xo2(struct dvb_ca_en50221 *ca, int slot) | ||||
| { | ||||
| 	struct ddb_ci *ci = ca->data; | ||||
|  | ||||
| 	pr_info("%s\n", __func__); | ||||
| 	pr_info("DDBridge: %s\n", __func__); | ||||
| 	write_creg(ci, 0x00, 0x10); | ||||
| 	return 0; | ||||
| } | ||||
| @@ -3071,7 +3071,7 @@ static int ddb_port_attach(struct ddb_port *port) | ||||
| 		break; | ||||
| 	} | ||||
| 	if (ret < 0) | ||||
| 		pr_err("port_attach on port %d failed\n", port->nr); | ||||
| 		pr_err("DDBridge: port_attach on port %d failed\n", port->nr); | ||||
| 	return ret; | ||||
| } | ||||
|  | ||||
| @@ -3083,12 +3083,12 @@ static int ddb_ports_attach(struct ddb *dev) | ||||
| 	dev->ns_num = dev->link[0].info->ns_num; | ||||
| 	for (i = 0; i < dev->ns_num; i++) | ||||
| 		dev->ns[i].nr = i; | ||||
| 	pr_info("%d netstream channels\n", dev->ns_num); | ||||
| 	pr_info("DDBridge: %d netstream channels\n", dev->ns_num); | ||||
|  | ||||
| 	if (dev->port_num) { | ||||
| 		ret = dvb_register_adapters(dev); | ||||
| 		if (ret < 0) { | ||||
| 			pr_err("Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); | ||||
| 			pr_err("DDBridge: Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); | ||||
| 			return ret; | ||||
| 		} | ||||
| 	} | ||||
| @@ -3172,14 +3172,14 @@ static void input_write_dvb(struct ddb_input *input, | ||||
| 	while (dma->cbuf != ((dma->stat >> 11) & 0x1f) | ||||
| 	       || (4 & dma->ctrl)) { | ||||
| 		if (4 & dma->ctrl) { | ||||
| 			/*pr_err("Overflow dma %d\n", dma->nr);*/ | ||||
| 			/*pr_err("DDBridge: Overflow dma %d\n", dma->nr);*/ | ||||
| 			ack = 1; | ||||
| 		} | ||||
| 		if (alt_dma) | ||||
| 			dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], | ||||
| 						dma2->size, DMA_FROM_DEVICE); | ||||
| #if 0 | ||||
| 		pr_info("%02x %02x %02x %02x \n", | ||||
| 		pr_info("DDBridge: %02x %02x %02x %02x \n", | ||||
| 			dma2->vbuf[dma->cbuf][0], dma2->vbuf[dma->cbuf][1], | ||||
| 			dma2->vbuf[dma->cbuf][2], dma2->vbuf[dma->cbuf][3]); | ||||
| #endif | ||||
| @@ -3219,7 +3219,7 @@ static void input_tasklet(unsigned long data) | ||||
|  | ||||
| #if 0 | ||||
| 	if (4 & dma->ctrl) | ||||
| 		pr_err("Overflow dma %d\n", dma->nr); | ||||
| 		pr_err("DDBridge: Overflow dma %d\n", dma->nr); | ||||
| #endif | ||||
| 	if (input->redi) | ||||
| 		input_write_dvb(input, input->redi); | ||||
| @@ -3317,7 +3317,7 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out) | ||||
| 		dma->div = INPUT_DMA_IRQ_DIV; | ||||
| 	} | ||||
| 	ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); | ||||
| 	pr_info("init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", | ||||
| 	pr_info("DDBridge: init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", | ||||
| 		io->port->lnr, io->nr, nr, dma->regs, dma->bufregs);  | ||||
| } | ||||
|  | ||||
| @@ -3333,7 +3333,7 @@ static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) | ||||
| 	rm = io_regmap(input, 1); | ||||
| 	input->regs = DDB_LINK_TAG(port->lnr) | | ||||
| 		(rm->input->base + rm->input->size * nr); | ||||
| 	pr_info("init link %u, input %u, regs %08x\n", port->lnr, nr, input->regs);  | ||||
| 	pr_info("DDBridge: init link %u, input %u, regs %08x\n", port->lnr, nr, input->regs);  | ||||
| 	if (dev->has_dma) { | ||||
| 		struct ddb_regmap *rm0 = io_regmap(input, 0); | ||||
| 		u32 base = rm0->irq_base_idma; | ||||
| @@ -3342,7 +3342,7 @@ static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) | ||||
| 		if (port->lnr) | ||||
| 			dma_nr += 32 + (port->lnr - 1) * 8; | ||||
| 		 | ||||
| 		pr_info("init link %u, input %u, handler %u\n", port->lnr, nr, dma_nr + base);  | ||||
| 		pr_info("DDBridge: init link %u, input %u, handler %u\n", port->lnr, nr, dma_nr + base);  | ||||
| 		dev->handler[0][dma_nr + base] = input_handler; | ||||
| 		dev->handler_data[0][dma_nr + base] = (unsigned long) input; | ||||
| 		ddb_dma_init(input, dma_nr, 0); | ||||
| @@ -3361,7 +3361,7 @@ static void ddb_output_init(struct ddb_port *port, int nr) | ||||
| 	rm = io_regmap(output, 1); | ||||
| 	output->regs = DDB_LINK_TAG(port->lnr) | | ||||
| 		(rm->output->base + rm->output->size * nr); | ||||
| 	pr_info("init link %u, output %u, regs %08x\n", port->lnr, nr, output->regs);  | ||||
| 	pr_info("DDBridge: init link %u, output %u, regs %08x\n", port->lnr, nr, output->regs);  | ||||
| 	if (dev->has_dma) { | ||||
| 		struct ddb_regmap *rm0 = io_regmap(output, 0); | ||||
| 		u32 base = rm0->irq_base_odma; | ||||
| @@ -3439,7 +3439,7 @@ static void ddb_ports_init(struct ddb *dev) | ||||
| 				port->name = "DuoFlex CI_B"; | ||||
| 				port->i2c = dev->port[p - 1].i2c; | ||||
| 			} | ||||
| 			pr_info("Port %u: Link %u, Link Port %u (TAB %u): %s\n", | ||||
| 			pr_info("DDBridge: Port %u: Link %u, Link Port %u (TAB %u): %s\n", | ||||
| 				port->pnr, port->lnr, port->nr, | ||||
| 				port->nr + 1, port->name); | ||||
|  | ||||
| @@ -3736,7 +3736,7 @@ static irqreturn_t irq_thread(int irq, void *dev_id) | ||||
| { | ||||
| 	/* struct ddb *dev = (struct ddb *) dev_id; */ | ||||
|  | ||||
| 	/*pr_info("%s\n", __func__);*/ | ||||
| 	/*pr_info("DDBridge: %s\n", __func__);*/ | ||||
|  | ||||
| 	return IRQ_HANDLED; | ||||
| } | ||||
| @@ -3803,9 +3803,9 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg) | ||||
| 			return -EINVAL; | ||||
| 		ctrl = (input->port->lnr << 16) | ((input->nr & 7) << 8) | | ||||
| 			((ts->filter_mask & 3) << 2); | ||||
| 		/*pr_info("GET_TS %u.%u\n", input->port->lnr, input->nr);*/ | ||||
| 		/*pr_info("DDBridge: GET_TS %u.%u\n", input->port->lnr, input->nr);*/ | ||||
| 		if (ddbreadl(dev, TS_CAPTURE_CONTROL) & 1) { | ||||
| 			pr_info("ts capture busy\n"); | ||||
| 			pr_info("DDBridge: ts capture busy\n"); | ||||
| 			return -EBUSY; | ||||
| 		} | ||||
| 		ddb_dvb_ns_input_start(input); | ||||
| @@ -3839,7 +3839,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg) | ||||
| 		if (ctrl & 1) | ||||
| 			return -EBUSY; | ||||
| 		if (ctrl & (1 << 14)) { | ||||
| 			/*pr_info("ts capture timeout\n");*/ | ||||
| 			/*pr_info("DDBridge: ts capture timeout\n");*/ | ||||
| 			return -EAGAIN; | ||||
| 		} | ||||
| 		ddbcpyfrom(dev, dev->tsbuf, TS_CAPTURE_MEMORY, | ||||
| @@ -3853,10 +3853,10 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg) | ||||
| 	{ | ||||
| 		u32 ctrl = 0; | ||||
|  | ||||
| 		/*pr_info("cancel ts capture: 0x%x\n", ctrl);*/ | ||||
| 		/*pr_info("DDBridge: cancel ts capture: 0x%x\n", ctrl);*/ | ||||
| 		ddbwritel(dev, ctrl, TS_CAPTURE_CONTROL); | ||||
| 		ctrl = ddbreadl(dev, TS_CAPTURE_CONTROL); | ||||
| 		/*pr_info("control register is 0x%x\n", ctrl);*/ | ||||
| 		/*pr_info("DDBridge: control register is 0x%x\n", ctrl);*/ | ||||
| 		break; | ||||
| 	} | ||||
| 	case NSD_STOP_GET_TS: | ||||
| @@ -3868,10 +3868,10 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg) | ||||
| 		if (!input) | ||||
| 			return -EINVAL; | ||||
| 		if (ctrl & 1) { | ||||
| 			pr_info("cannot stop ts capture, while it was neither finished nor canceled\n"); | ||||
| 			pr_info("DDBridge: cannot stop ts capture, while it was neither finished nor canceled\n"); | ||||
| 			return -EBUSY; | ||||
| 		} | ||||
| 		/*pr_info("ts capture stopped\n");*/ | ||||
| 		/*pr_info("DDBridge: ts capture stopped\n");*/ | ||||
| 		ddb_dvb_ns_input_stop(input); | ||||
| 		break; | ||||
| 	} | ||||
| @@ -4680,7 +4680,7 @@ static ssize_t redirect_store(struct device *device, | ||||
| 	res = ddb_redirect(i, p); | ||||
| 	if (res < 0) | ||||
| 		return res; | ||||
| 	pr_info("redirect: %02x, %02x\n", i, p); | ||||
| 	pr_info("DDBridge: redirect: %02x, %02x\n", i, p); | ||||
| 	return count; | ||||
| } | ||||
|  | ||||
| @@ -4704,7 +4704,7 @@ static ssize_t redirect2_store(struct device *device, | ||||
| 	res = ddb_redirect(i, p); | ||||
| 	if (res < 0) | ||||
| 		return res; | ||||
| 	pr_info("redirect: %02x, %02x\n", i, p); | ||||
| 	pr_info("DDBridge: redirect: %02x, %02x\n", i, p); | ||||
| 	return count; | ||||
| } | ||||
|  | ||||
| @@ -5023,7 +5023,7 @@ static int ddb_device_create(struct ddb *dev) | ||||
| 				     dev, "ddbridge%d", dev->nr); | ||||
| 	if (IS_ERR(dev->ddb_dev)) { | ||||
| 		res = PTR_ERR(dev->ddb_dev); | ||||
| 		pr_info("Could not create ddbridge%d\n", dev->nr); | ||||
| 		pr_info("DDBridge: Could not create ddbridge%d\n", dev->nr); | ||||
| 		goto fail; | ||||
| 	} | ||||
| 	res = ddb_device_attrs_add(dev); | ||||
| @@ -5057,7 +5057,7 @@ static void gtl_link_handler(unsigned long priv) | ||||
| 	struct ddb *dev = (struct ddb *) priv; | ||||
| 	u32 regs = dev->link[0].info->regmap->gtl->base; | ||||
|  | ||||
| 	pr_info("GT link change: %u\n", | ||||
| 	pr_info("DDBridge: GT link change: %u\n", | ||||
| 		(1 & ddbreadl(dev, regs))); | ||||
| } | ||||
|  | ||||
| @@ -5069,7 +5069,7 @@ static void link_tasklet(unsigned long data) | ||||
| 	u32 l = link->nr; | ||||
| 	 | ||||
| 	s = ddbreadl(dev, tag | INTERRUPT_STATUS); | ||||
| 	pr_info("gtl_irq %08x = %08x\n", tag | INTERRUPT_STATUS, s); | ||||
| 	pr_info("DDBridge: gtl_irq %08x = %08x\n", tag | INTERRUPT_STATUS, s); | ||||
|  | ||||
| 	if (!s) | ||||
| 		return; | ||||
| @@ -5090,7 +5090,7 @@ static void gtl_irq_handler(unsigned long priv) | ||||
|  | ||||
| 	while ((s = ddbreadl(dev, tag | INTERRUPT_STATUS)))  { | ||||
| 		ddbwritel(dev, s, tag | INTERRUPT_ACK); | ||||
| 		//pr_info("gtlirq %08x\n", s); | ||||
| 		//pr_info("DDBridge: gtlirq %08x\n", s); | ||||
| 		LINK_IRQ_HANDLE(l, 0); | ||||
| 		LINK_IRQ_HANDLE(l, 1); | ||||
| 		LINK_IRQ_HANDLE(l, 2); | ||||
| @@ -5107,9 +5107,9 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l) | ||||
| 	struct ddb_link *link = &dev->link[l]; | ||||
| 	u32 regs = dev->link[0].info->regmap->gtl->base + | ||||
| 		(l - 1) * dev->link[0].info->regmap->gtl->size; | ||||
| 	u32 id, base = dev->link[0].info->regmap->irq_base_gtl; | ||||
| 	u32 id, subid, base = dev->link[0].info->regmap->irq_base_gtl; | ||||
|  | ||||
| 	pr_info("Checking GT link %u: regs = %08x\n", l, regs); | ||||
| 	pr_info("DDBridge: Checking GT link %u: regs = %08x\n", l, regs); | ||||
|  | ||||
| 	spin_lock_init(&link->lock); | ||||
| 	mutex_init(&link->lnb.lock); | ||||
| @@ -5135,6 +5135,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l) | ||||
| 			return -1; | ||||
| 	} | ||||
| 	id = ddbreadl(dev, DDB_LINK_TAG(l) | 8); | ||||
| 	subid = ddbreadl(dev, DDB_LINK_TAG(l) | 12); | ||||
| 	switch (id) { | ||||
| 	case 0x0007dd01: | ||||
| 		link->info = &ddb_s2_48; | ||||
| @@ -5156,17 +5157,17 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l) | ||||
|  | ||||
| 	dev->link[l].ids.hwid = ddbreadl(dev, DDB_LINK_TAG(l) | 0); | ||||
| 	dev->link[l].ids.regmapid = ddbreadl(dev, DDB_LINK_TAG(l) | 4); | ||||
| 	dev->link[l].ids.vendor = id >> 16;; | ||||
| 	dev->link[l].ids.device = id & 0xffff;; | ||||
| 	//dev->link[l].ids.subvendor = id->subvendor; | ||||
| 	//dev->link[l].ids.subdevice = id->subdevice; | ||||
| 	dev->link[l].ids.vendor = id & 0xffff; | ||||
| 	dev->link[l].ids.device = id >> 16; | ||||
| 	dev->link[l].ids.subvendor = subid & 0xffff; | ||||
| 	dev->link[l].ids.subdevice = subid >> 16; | ||||
|  | ||||
| 	pr_info("GTL %s\n", dev->link[l].info->name); | ||||
| 	pr_info("DDBridge: GTL %s\n", dev->link[l].info->name); | ||||
|  | ||||
| 	pr_info("GTL HW %08x REGMAP %08x\n", | ||||
| 	pr_info("DDBridge: GTL HW %08x REGMAP %08x\n", | ||||
| 		dev->link[l].ids.hwid, | ||||
| 		dev->link[l].ids.regmapid); | ||||
| 	pr_info("GTL ID %08x\n", | ||||
| 	pr_info("DDBridge: GTL ID %08x\n", | ||||
| 		ddbreadl(dev, DDB_LINK_TAG(l) | 8)); | ||||
|  | ||||
| 	tasklet_init(&link->tasklet, link_tasklet, (unsigned long) link); | ||||
| @@ -5196,7 +5197,7 @@ static void tempmon_setfan(struct ddb_link *link) | ||||
| 	u32 temp, temp2, pwm; | ||||
| 	 | ||||
| 	if ((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) { | ||||
| 		pr_info("Over temperature condition\n"); | ||||
| 		pr_info("DDBridge: Over temperature condition\n"); | ||||
| 		link->OverTemperatureError = 1; | ||||
| 	} | ||||
| 	temp  = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; | ||||
| @@ -5254,7 +5255,7 @@ static int tempmon_init(struct ddb_link *link, int FirstTime) | ||||
| 	link->OverTemperatureError = | ||||
| 		((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0); | ||||
| 	if (link->OverTemperatureError)	{ | ||||
| 		pr_info("Over temperature condition\n"); | ||||
| 		pr_info("DDBridge: Over temperature condition\n"); | ||||
| 		status = -1; | ||||
| 	} | ||||
| 	tempmon_setfan(link); | ||||
| @@ -5293,6 +5294,11 @@ static int ddb_init_boards(struct ddb *dev) | ||||
| 		info = link->info; | ||||
| 		if (!info) | ||||
| 			continue; | ||||
| 		pr_info("DDBridge: link %u vendor %04x device %04x subvendor %04x subdevice %04x\n", | ||||
| 			l, | ||||
| 			dev->link[l].ids.vendor, dev->link[l].ids.device, | ||||
| 			dev->link[l].ids.subvendor, dev->link[l].ids.subdevice); | ||||
| 		 | ||||
| 		if (info->board_control) { | ||||
| 			ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); | ||||
| 			msleep(100); | ||||
| @@ -5332,7 +5338,7 @@ static int ddb_init(struct ddb *dev) | ||||
| 		goto fail; | ||||
| 	ddb_ports_init(dev); | ||||
| 	if (ddb_buffers_alloc(dev) < 0) { | ||||
| 		pr_info(": Could not allocate buffer memory\n"); | ||||
| 		pr_info("DDBridge: Could not allocate buffer memory\n"); | ||||
| 		goto fail2; | ||||
| 	} | ||||
| #if 0 | ||||
| @@ -5355,14 +5361,14 @@ static int ddb_init(struct ddb *dev) | ||||
|  | ||||
| fail3: | ||||
| 	ddb_ports_detach(dev); | ||||
| 	pr_err("fail3\n"); | ||||
| 	pr_err("DDBridge: fail3\n"); | ||||
| 	ddb_ports_release(dev); | ||||
| fail2: | ||||
| 	pr_err("fail2\n"); | ||||
| 	pr_err("DDBridge: fail2\n"); | ||||
| 	ddb_buffers_free(dev); | ||||
| 	ddb_i2c_release(dev); | ||||
| fail: | ||||
| 	pr_err("fail1\n"); | ||||
| 	pr_err("DDBridge: fail1\n"); | ||||
| 	return -1; | ||||
| } | ||||
|  | ||||
|   | ||||
| @@ -115,7 +115,7 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) | ||||
| 	stat = wait_for_completion_timeout(&i2c->completion, HZ); | ||||
| 	val = ddbreadl(dev, i2c->regs + I2C_COMMAND); | ||||
| 	if (stat == 0) { | ||||
| 		pr_err("DDBridge I2C timeout, card %d, port %d, link %u\n", | ||||
| 		pr_err("DDBridge: I2C timeout, card %d, port %d, link %u\n", | ||||
| 		       dev->nr, i2c->nr, i2c->link); | ||||
| #if 1 | ||||
| 		{ | ||||
|   | ||||
| @@ -182,7 +182,7 @@ void ddbridge_mod_output_stop(struct ddb_output *output) | ||||
| 	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr)); | ||||
| #endif | ||||
| 	mod_busy(dev, output->nr); | ||||
| 	pr_info("mod_output_stop %d.%d\n", dev->nr, output->nr); | ||||
| 	pr_info("DDBridge: mod_output_stop %d.%d\n", dev->nr, output->nr); | ||||
| } | ||||
|  | ||||
| static void mod_set_incs(struct ddb_output *output) | ||||
| @@ -217,8 +217,8 @@ static void mod_calc_rateinc(struct ddb_mod *mod) | ||||
| { | ||||
| 	u32 ri; | ||||
| 	 | ||||
| 	pr_info("ibitrate %llu\n", mod->ibitrate); | ||||
| 	pr_info("obitrate %llu\n", mod->obitrate); | ||||
| 	pr_info("DDBridge: ibitrate %llu\n", mod->ibitrate); | ||||
| 	pr_info("DDBridge: obitrate %llu\n", mod->obitrate); | ||||
| 	 | ||||
| 	if (mod->ibitrate != 0) { | ||||
| 		u64 d = mod->obitrate - mod->ibitrate; | ||||
| @@ -231,7 +231,7 @@ static void mod_calc_rateinc(struct ddb_mod *mod) | ||||
| 	} else | ||||
| 		ri = 0; | ||||
| 	mod->rate_inc = ri; | ||||
| 	pr_info("ibr=%llu, obr=%llu, ri=0x%06x\n", | ||||
| 	pr_info("DDBridge: ibr=%llu, obr=%llu, ri=0x%06x\n", | ||||
| 		mod->ibitrate >> 32, mod->obitrate >> 32, ri); | ||||
| } | ||||
|  | ||||
| @@ -335,8 +335,8 @@ int ddbridge_mod_output_start(struct ddb_output *output) | ||||
| 	udelay(10); | ||||
| 	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr)); | ||||
|  | ||||
| 	pr_info("CHANNEL_BASE = %08x\n", CHANNEL_BASE); | ||||
| 	pr_info("CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel)); | ||||
| 	pr_info("DDBridge: CHANNEL_BASE = %08x\n", CHANNEL_BASE); | ||||
| 	pr_info("DDBridge: CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel)); | ||||
| 	if (dev->link[0].info->version == 2) { | ||||
| 		//u32 Output = ((dev->mod_base.frequency - 114000000)/8000000 + Channel) % 96; | ||||
| 		u32 Output = (mod->frequency - 114000000) / 8000000; | ||||
| @@ -362,7 +362,7 @@ int ddbridge_mod_output_start(struct ddb_output *output) | ||||
| 		if (checkLF <= 1) | ||||
| 			return -EINVAL; | ||||
|  | ||||
| 		pr_info("KF=%u LF=%u Output=%u mod=%u\n", KF, LF, Output, mod->modulation); | ||||
| 		pr_info("DDBridge: KF=%u LF=%u Output=%u mod=%u\n", KF, LF, Output, mod->modulation); | ||||
| 		ddbwritel(dev, KF, CHANNEL_KF(Channel)); | ||||
| 		ddbwritel(dev, LF, CHANNEL_LF(Channel)); | ||||
| 		 | ||||
| @@ -384,7 +384,7 @@ int ddbridge_mod_output_start(struct ddb_output *output) | ||||
| 	if (dev->link[0].info->version == 2) | ||||
| 		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_UNMUTE)) | ||||
| 			return -EINVAL; | ||||
| 	pr_info("mod_output_start %d.%d\n", dev->nr, output->nr); | ||||
| 	pr_info("DDBridge: mod_output_start %d.%d\n", dev->nr, output->nr); | ||||
| 	return 0; | ||||
| } | ||||
|  | ||||
| @@ -477,7 +477,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels | ||||
| 	if (MaxUsedChannels == 0) | ||||
| 		MaxUsedChannels = (Capacity & FSM_CAPACITY_CUR) >> 16; | ||||
|  | ||||
| 	pr_info("max used chan = %u\n", MaxUsedChannels); | ||||
| 	pr_info("DDBridge: max used chan = %u\n", MaxUsedChannels); | ||||
| 	if (MaxUsedChannels <= 1 ) | ||||
| 		ddbwritel(dev, FSM_GAIN_N1, FSM_GAIN); | ||||
| 	else if (MaxUsedChannels <= 2) | ||||
| @@ -517,7 +517,7 @@ static void TemperatureMonitorSetFan(struct ddb *dev) | ||||
| 	u32 tqam, pwm; | ||||
| 	 | ||||
| 	if ((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) { | ||||
| 		pr_info("Over temperature condition\n"); | ||||
| 		pr_info("DDBridge: Over temperature condition\n"); | ||||
| 		dev->OverTemperatureError = 1; | ||||
| 	} | ||||
| 	tqam  = (ddbreadl(dev, TEMPMON2_QAMCORE) >> 8) & 0xFF; | ||||
| @@ -543,7 +543,7 @@ static void temp_handler(unsigned long data) | ||||
| { | ||||
| 	struct ddb *dev = (struct ddb *) data; | ||||
|  | ||||
| 	pr_info("temp_handler\n"); | ||||
| 	pr_info("DDBridge: temp_handler\n"); | ||||
|  | ||||
| 	spin_lock(&dev->temp_lock); | ||||
| 	TemperatureMonitorSetFan(dev); | ||||
| @@ -569,7 +569,7 @@ static int TemperatureMonitorInit(struct ddb *dev, int FirstTime) { | ||||
| 	dev->OverTemperatureError = | ||||
| 		((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0); | ||||
| 	if (dev->OverTemperatureError)	{ | ||||
| 		pr_info("Over temperature condition\n"); | ||||
| 		pr_info("DDBridge: Over temperature condition\n"); | ||||
| 		status = -1; | ||||
| 	} | ||||
| 	TemperatureMonitorSetFan(dev); | ||||
| @@ -727,7 +727,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
| 		mod_si598_readreg(dev, 11, &Data[4]); | ||||
| 		mod_si598_readreg(dev, 12, &Data[5]); | ||||
|  | ||||
| 		pr_info(" Data = %02x %02x %02x %02x %02x %02x\n", | ||||
| 		pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n", | ||||
| 			Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]); | ||||
| 		RFreq = (((u64)Data[1] & 0x3F) << 32) | ((u64)Data[2] << 24) | | ||||
| 			((u64)Data[3] << 16) | ((u64)Data[4] << 8) | | ||||
| @@ -741,12 +741,12 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
| 		     ((u32)(Data[1] & 0xE0) >> 6)) + 1; | ||||
| 		fDCO = fOut * (u64)(HSDiv * N); | ||||
| 		m_fXtal = fDCO << 28; | ||||
| 		pr_info("fxtal %016llx  rfreq %016llx\n", m_fXtal, RFreq); | ||||
| 		pr_info("DDBridge: fxtal %016llx  rfreq %016llx\n", m_fXtal, RFreq); | ||||
|  | ||||
| 		m_fXtal += RFreq >> 1; | ||||
| 		m_fXtal = div64_u64(m_fXtal, RFreq); | ||||
|  | ||||
| 		pr_info("fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n", | ||||
| 		pr_info("DDBridge: fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n", | ||||
| 			(u32) fOut, (u32) m_fXtal, (u32) fDCO, (u32) HSDiv, N); | ||||
| 	} | ||||
|  | ||||
| @@ -757,7 +757,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
|  | ||||
| 	if (Div < MinDiv) | ||||
| 		Div = Div + 1; | ||||
| 	pr_info(" fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n", | ||||
| 	pr_info("DDBridge:  fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n", | ||||
| 		fOut, MinDiv, MaxDiv, Div); | ||||
|  | ||||
| 	if (Div <= 11) { | ||||
| @@ -776,7 +776,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
| 				if (N > 128) | ||||
| 					break; | ||||
| 			} | ||||
| 			pr_info(" %3d: %llu %llu %llu %u\n", | ||||
| 			pr_info("DDBridge:  %3d: %llu %llu %llu %u\n", | ||||
| 				retry, Div, HSDiv * N, HSDiv, N); | ||||
| 			if (HSDiv * N < MinDiv) | ||||
| 				Div = Div + 2; | ||||
| @@ -787,7 +787,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
| 			retry = retry - 1; | ||||
| 		} | ||||
| 		if (retry == 0) { | ||||
| 			pr_err(" FAIL\n"); | ||||
| 			pr_err("DDBridge:  FAIL\n"); | ||||
| 			return -EINVAL; | ||||
| 		} | ||||
| 	} | ||||
| @@ -802,16 +802,16 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
|  | ||||
|  | ||||
| 	fDCO = (u64)fOut * (u64)N * (u64)HSDiv; | ||||
| 	pr_info("fdco %16llx\n", fDCO); | ||||
| 	pr_info("DDBridge: fdco %16llx\n", fDCO); | ||||
| 	RFreq = fDCO<<28; | ||||
| 	pr_info("%16llx %16llx\n", fDCO, RFreq); | ||||
| 	pr_info("DDBridge: %16llx %16llx\n", fDCO, RFreq); | ||||
|  | ||||
| 	fxtal = m_fXtal; | ||||
| 	do_div(RFreq, fxtal); | ||||
| 	pr_info("%16llx %d\n", RFreq, fxtal); | ||||
| 	pr_info("DDBridge: %16llx %d\n", RFreq, fxtal); | ||||
| 	RF = RFreq; | ||||
|  | ||||
| 	pr_info("fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n", | ||||
| 	pr_info("DDBridge: fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n", | ||||
| 		fOut, m_fXtal, fDCO, HSDiv, N, RFreq); | ||||
|  | ||||
| 	Data[0] = (u8)(((HSDiv - 4) << 5) | ((N - 1) >> 2)); | ||||
| @@ -821,7 +821,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq) | ||||
| 	Data[4] = (u8)((RF >>  8) & 0xFF); | ||||
| 	Data[5] = (u8)((RF)       & 0xFF); | ||||
|  | ||||
| 	pr_info(" Data = %02x %02x %02x %02x %02x %02x\n", | ||||
| 	pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n", | ||||
| 		Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]); | ||||
| 	mod_si598_writereg(dev, 7, Data[0]); | ||||
| 	mod_si598_writereg(dev, 8, Data[1]); | ||||
| @@ -955,11 +955,11 @@ static int mod_init_dac_input(struct ddb *dev) | ||||
| 	} | ||||
|  | ||||
| 	if (Sample1 == 0xFF || Sample2 == 0xFF) { | ||||
| 		pr_err(" No valid window found\n"); | ||||
| 		pr_err("DDBridge:  No valid window found\n"); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
|  | ||||
| 	pr_err(" Window = %d - %d\n", Sample1, Sample2); | ||||
| 	pr_err("DDBridge:  Window = %d - %d\n", Sample1, Sample2); | ||||
|  | ||||
| 	for (Sample = Sample1; Sample < Sample2; Sample += 1) { | ||||
| 		if (SetTable[Sample] < HldTable[Sample]) { | ||||
| @@ -970,15 +970,15 @@ static int mod_init_dac_input(struct ddb *dev) | ||||
| 		} | ||||
| 	} | ||||
|  | ||||
| 	pr_info("Select Sample %d\n", SelectSample); | ||||
| 	pr_info("DDBridge: Select Sample %d\n", SelectSample); | ||||
|  | ||||
| 	if (SelectSample == 0xFF) { | ||||
| 		pr_err("No valid sample found\n"); | ||||
| 		pr_err("DDBridge: No valid sample found\n"); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
|  | ||||
| 	if (HldTable[SelectSample] + SetTable[SelectSample] < 8) { | ||||
| 		pr_err("Too high jitter\n"); | ||||
| 		pr_err("DDBridge: Too high jitter\n"); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
|  | ||||
| @@ -993,10 +993,10 @@ static int mod_init_dac_input(struct ddb *dev) | ||||
| 	mod_read_dac_register(dev, 0x06, &ReadSeek); | ||||
| 	Seek &= ReadSeek; | ||||
| 	if ((Seek & 0x01) == 0) { | ||||
| 		pr_err("Insufficient timing margin\n"); | ||||
| 		pr_err("DDBridge: Insufficient timing margin\n"); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
| 	pr_info("Done\n"); | ||||
| 	pr_info("DDBridge: Done\n"); | ||||
| 	return 0; | ||||
| } | ||||
|  | ||||
| @@ -1053,7 +1053,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency) | ||||
| 		ddbwritel(dev, DAC_CONTROL_RESET, DAC_CONTROL); | ||||
| 		msleep(20); | ||||
| 		if (mod_set_si598(dev, Frequency)) { | ||||
| 			pr_err("mod_set_si598 failed\n"); | ||||
| 			pr_err("DDBridge: mod_set_si598 failed\n"); | ||||
| 			return -1; | ||||
| 		} | ||||
| 		msleep(50); | ||||
| @@ -1068,7 +1068,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency) | ||||
| 			break; | ||||
| 		msleep(100); | ||||
| 	} | ||||
| 	pr_info("mod_set_dac_clock OK\n"); | ||||
| 	pr_info("DDBridge: mod_set_dac_clock OK\n"); | ||||
| 	return hr; | ||||
| } | ||||
|  | ||||
| @@ -1174,18 +1174,18 @@ static int set_base_frequency(struct ddb *dev, u32 freq) | ||||
| 	u32 UP2Frequency = 1896; | ||||
| 	u32 down, freq10; | ||||
|  | ||||
| 	pr_info("set base to %u\n", freq); | ||||
| 	pr_info("DDBridge: set base to %u\n", freq); | ||||
| 	dev->mod_base.frequency = freq; | ||||
| 	freq /= 1000000; | ||||
| 	freq10 = dev->mod_base.flat_start + 4; | ||||
| 	down = freq + 9 * 8 + freq10 + UP1Frequency + UP2Frequency; | ||||
|  | ||||
| 	if ((freq10 + 9 * 8) > (dev->mod_base.flat_end - 4)) { | ||||
| 		pr_err("Frequency out of range %d\n", freq10); | ||||
| 		pr_err("DDBridge: Frequency out of range %d\n", freq10); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
| 	if (down % 8) { | ||||
| 		pr_err(" Invalid Frequency %d\n", down); | ||||
| 		pr_err("DDBridge:  Invalid Frequency %d\n", down); | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
| 	return mod_set_down(dev, down, 8, Ext); | ||||
| @@ -1214,12 +1214,12 @@ static int mod_init_1(struct ddb *dev, u32 Frequency) | ||||
| 		stat = -EINVAL; | ||||
| 		goto fail; | ||||
| 	} | ||||
| 	pr_info("srate = %d\n", flash->DataSet[0].Symbolrate * 1000); | ||||
| 	pr_info("DDBridge: srate = %d\n", flash->DataSet[0].Symbolrate * 1000); | ||||
|  | ||||
| 	mod_output_enable(dev, 0); | ||||
| 	stat = mod_set_dac_clock(dev, flash->DataSet[0].DACFrequency * 1000); | ||||
| 	if (stat < 0) { | ||||
| 		pr_err("setting DAC clock failed\n"); | ||||
| 		pr_err("DDBridge: setting DAC clock failed\n"); | ||||
| 		goto fail; | ||||
| 	} | ||||
| 	mod_set_dac_current(dev, 512, 512); | ||||
| @@ -1236,16 +1236,16 @@ static int mod_init_1(struct ddb *dev, u32 Frequency) | ||||
| 	FrequencyCH10 = flash->DataSet[0].FlatStart + 4; | ||||
| 	DownFrequency = Frequency + 9 * 8 + FrequencyCH10 + | ||||
| 		UP1Frequency + UP2Frequency; | ||||
| 	pr_info("CH10 = %d, Down = %d\n", FrequencyCH10, DownFrequency); | ||||
| 	pr_info("DDBridge: CH10 = %d, Down = %d\n", FrequencyCH10, DownFrequency); | ||||
|  | ||||
| 	if ((FrequencyCH10 + 9 * 8) > (flash->DataSet[0].FlatEnd - 4)) { | ||||
| 		pr_err("Frequency out of range %d\n", FrequencyCH10); | ||||
| 		pr_err("DDBridge: Frequency out of range %d\n", FrequencyCH10); | ||||
| 		stat = -EINVAL; | ||||
| 		goto fail; | ||||
| 	} | ||||
|  | ||||
| 	if (DownFrequency % 8 != 0) { | ||||
| 		pr_err(" Invalid Frequency %d\n", DownFrequency); | ||||
| 		pr_err("DDBridge:  Invalid Frequency %d\n", DownFrequency); | ||||
| 		stat = -EINVAL; | ||||
| 		goto fail; | ||||
| 	} | ||||
| @@ -1260,7 +1260,7 @@ static int mod_init_1(struct ddb *dev, u32 Frequency) | ||||
|  | ||||
| 		iqfreq = flash->DataSet[0].FrequencyFactor * | ||||
| 			(FrequencyCH10 + (9 - i) * 8); | ||||
| 		iqfreq += (dev->link[0].ids.hwid == 0x0203dd01) ? 22 : 0 ; | ||||
| 		iqfreq += (dev->link[0].ids.hwid == 0x0203dd01) ? 22 : 0; | ||||
| 		iqsteps = flash->DataSet[0].IQTableLength; | ||||
| 		mod_set_iq(dev, iqsteps, i, iqfreq); | ||||
| 		mod_set_modulation(mod, QAM_256); | ||||
| @@ -1274,7 +1274,7 @@ static int mod_init_1(struct ddb *dev, u32 Frequency) | ||||
| 			 flash->DataSet[0].PostScaleQ); | ||||
| 	mod_pre_eq_gain(dev, flash->DataSet[0].PreScale); | ||||
| 	/*mod_pre_eq_gain(dev, 0x0680);*/ | ||||
| 	pr_info("prescaler %04x\n", flash->DataSet[0].PreScale); | ||||
| 	pr_info("DDBridge: prescaler %04x\n", flash->DataSet[0].PreScale); | ||||
| 	mod_set_channelsumshift(dev, 2); | ||||
| 	mod_output_enable(dev, 1); | ||||
|  | ||||
| @@ -1398,7 +1398,7 @@ void ddbridge_mod_rate_handler(unsigned long data) | ||||
|  | ||||
| 	case CM_ADJUST: | ||||
| 		if (InPacketDiff < mod->MinInputPackets) { | ||||
| 			pr_info("PCR Adjust reset  IN: %u  Min: %u\n", | ||||
| 			pr_info("DDBridge: PCR Adjust reset  IN: %u  Min: %u\n", | ||||
| 				InPacketDiff, mod->MinInputPackets); | ||||
| 			mod->InPacketsSum = 0; | ||||
| 			mod->OutPacketsSum = 0; | ||||
| @@ -1439,7 +1439,7 @@ void ddbridge_mod_rate_handler(unsigned long data) | ||||
|  | ||||
| 		mod->PCRIncrement += PCRIncrementDiff; | ||||
| 		pcr = ConvertPCR(mod->PCRIncrement); | ||||
| 		pr_info("outl %016llx\n", pcr); | ||||
| 		pr_info("DDBridge: outl %016llx\n", pcr); | ||||
| 		ddbwritel(dev,	pcr & 0xffffffff, | ||||
| 			  CHANNEL_PCR_ADJUST_OUTL(output->nr)); | ||||
| 		ddbwritel(dev,	(pcr >> 32) & 0xffffffff, | ||||
| @@ -1466,9 +1466,9 @@ void ddbridge_mod_rate_handler(unsigned long data) | ||||
|  | ||||
| 	spin_unlock(&dma->lock); | ||||
|  | ||||
| 	pr_info("chan %d out %016llx in %016llx indiff %08x\n", | ||||
| 	pr_info("DDBridge: chan %d out %016llx in %016llx indiff %08x\n", | ||||
| 		chan, OutPackets, InPackets, InPacketDiff); | ||||
| 	pr_info("cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n", | ||||
| 	pr_info("DDBridge: cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n", | ||||
| 		mod->StateCounter, PCRAdjust, PCRAdjustExt, | ||||
| 		PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement); | ||||
| } | ||||
|   | ||||
| @@ -87,7 +87,7 @@ static int ns_alloc(struct dvbnss *nss) | ||||
| 		dev->ns[i].fe = input; | ||||
| 		nss->priv = &dev->ns[i]; | ||||
| 		ret = 0; | ||||
| 		/*pr_info("%s i=%d fe=%d\n", __func__, i, input->nr); */ | ||||
| 		/*pr_info("DDBridge: %s i=%d fe=%d\n", __func__, i, input->nr); */ | ||||
| 		break; | ||||
| 	} | ||||
| 	ddbwritel(dev, 0x03, RTP_MASTER_CONTROL); | ||||
| @@ -198,7 +198,7 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci) | ||||
| 	if (ciport < 0) | ||||
| 		return -EINVAL; | ||||
|  | ||||
| 	pr_info("input %d.%d to ci %d at port %d\n", | ||||
| 	pr_info("DDBridge: input %d.%d to ci %d at port %d\n", | ||||
| 		input->port->lnr, input->nr, ci, ciport); | ||||
| 	ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1c, | ||||
| 		  TS_CONTROL(dev->port[ciport].output)); | ||||
|   | ||||
| @@ -147,7 +147,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev) | ||||
| 	int stat; | ||||
| 	int irq_flag = IRQF_SHARED; | ||||
|  | ||||
| 	pr_info("init type 2 IRQ hardware block\n"); | ||||
| 	pr_info("DDBridge: init type 2 IRQ hardware block\n"); | ||||
|  | ||||
| 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_CONTROL); | ||||
| 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_1); | ||||
| @@ -268,7 +268,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev, | ||||
|  | ||||
| 	dev->link[0].dev = dev; | ||||
| 	dev->link[0].info = (struct ddb_info *) id->driver_data; | ||||
| 	pr_info("DDBridge driver detected: %s\n", dev->link[0].info->name); | ||||
| 	pr_info("DDBridge: device name: %s\n", dev->link[0].info->name); | ||||
|  | ||||
| 	dev->regs_len = pci_resource_len(dev->pdev, 0); | ||||
| 	dev->regs = ioremap(pci_resource_start(dev->pdev, 0), | ||||
| @@ -313,11 +313,11 @@ static int __devinit ddb_probe(struct pci_dev *pdev, | ||||
|  | ||||
| 	ddb_irq_disable(dev); | ||||
| fail0: | ||||
| 	pr_err("fail0\n"); | ||||
| 	pr_err("DDBridge: fail0\n"); | ||||
| 	if (dev->msi) | ||||
| 		pci_disable_msi(dev->pdev); | ||||
| fail: | ||||
| 	pr_err("fail\n"); | ||||
| 	pr_err("DDBridge: fail\n"); | ||||
|  | ||||
| 	ddb_unmap(dev); | ||||
| 	pci_set_drvdata(pdev, NULL); | ||||
| @@ -591,7 +591,7 @@ static __init int module_init_ddbridge(void) | ||||
| { | ||||
| 	int stat = -1; | ||||
|  | ||||
| 	pr_info("Digital Devices PCIE bridge driver " | ||||
| 	pr_info("DDBridge: Digital Devices PCIE bridge driver " | ||||
| 		DDBRIDGE_VERSION | ||||
| 		", Copyright (C) 2010-16 Digital Devices GmbH\n"); | ||||
| 	if (ddb_class_create() < 0) | ||||
|   | ||||
| @@ -177,9 +177,9 @@ static int __init octonet_probe(struct platform_device *pdev) | ||||
| 	else | ||||
| 		dev->link[0].info = &ddb_octonet_tbd; | ||||
|  | ||||
| 	pr_info("HW  %08x REGMAP %08x\n", | ||||
| 	pr_info("DDBridge: HW  %08x REGMAP %08x\n", | ||||
| 		dev->link[0].ids.hwid, dev->link[0].ids.regmapid); | ||||
| 	pr_info("MAC %08x DEVID  %08x\n", | ||||
| 	pr_info("DDBridge: MAC %08x DEVID  %08x\n", | ||||
| 		dev->link[0].ids.mac, dev->link[0].ids.devid); | ||||
|  | ||||
| 	ddbwritel(dev, 0, ETHER_CONTROL); | ||||
| @@ -233,7 +233,7 @@ static __init int init_octonet(void) | ||||
| { | ||||
| 	int res; | ||||
|  | ||||
| 	pr_info("Digital Devices OctopusNet driver " DDBRIDGE_VERSION | ||||
| 	pr_info("DDBridge: Digital Devices OctopusNet driver " DDBRIDGE_VERSION | ||||
| 		", Copyright (C) 2010-16 Digital Devices GmbH\n"); | ||||
| 	res = ddb_class_create(); | ||||
| 	if (res) | ||||
|   | ||||
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