mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
adjust to newer include files and firmware
This commit is contained in:
Ralph Metzler
parent
9acbf467ec
commit
e0fdedbef3
@ -1,9 +1,9 @@
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/*
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* ddbridge-mci.c: Digital Devices microcode interface
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*
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* Copyright (C) 2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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* Copyright (C) 2017-2018 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -238,6 +238,30 @@ static int get_info(struct dvb_frontend *fe)
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return stat;
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}
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static int get_snr(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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p->cnr.len = 1;
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p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
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p->cnr.stat[0].svalue = (s64) state->signal_info.dvbs2_signal_info.signal_to_noise * 100;
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return 0;
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}
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static int get_strength(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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s32 str;
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str = 100000 - (state->signal_info.dvbs2_signal_info.channel_power * 10 + 108750);
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p->strength.len = 1;
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p->strength.stat[0].scale = FE_SCALE_DECIBEL;
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p->strength.stat[0].svalue = str;
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return 0;
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}
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static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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int stat;
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@ -252,10 +276,14 @@ static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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if (stat)
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return stat;
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*status = 0x00;
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get_info(fe);
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get_strength(fe);
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if (res->status == SX8_DEMOD_WAIT_MATYPE)
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*status = 0x0f;
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if (res->status == SX8_DEMOD_LOCKED)
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if (res->status == SX8_DEMOD_LOCKED) {
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*status = 0x1f;
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get_snr(fe);
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}
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return stat;
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}
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@ -378,7 +406,7 @@ unlock:
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memset(&cmd, 0, sizeof(cmd));
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if (state->base->iq_mode) {
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cmd.command = SX8_CMD_SELECT_IQOUT;
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cmd.command = SX8_CMD_ENABLE_IQOUTPUT;
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cmd.demod = state->demod;
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cmd.output = 0;
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mci_cmd(state, &cmd, NULL);
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@ -412,8 +440,6 @@ static int start_iq(struct dvb_frontend *fe, u32 ts_config)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
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u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
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u32 used_demods = 0;
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struct mci_command cmd;
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u32 input = state->tuner;
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@ -538,34 +564,6 @@ static int set_input(struct dvb_frontend *fe, int input)
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static int sleep(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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}
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static int get_snr(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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s32 snr;
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get_info(fe);
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p->cnr.len = 1;
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p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
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p->cnr.stat[0].svalue = (s64) state->signal_info.dvbs2_signal_info.signal_to_noise * 100;
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return 0;
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}
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static int get_strength(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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s32 str;
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get_info(fe);
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str = 100000 - (state->signal_info.dvbs2_signal_info.channel_power * 10 + 108750);
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p->strength.len = 1;
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p->strength.stat[0].scale = FE_SCALE_DECIBEL;
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p->strength.stat[0].svalue = str;
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return 0;
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}
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@ -587,9 +585,10 @@ static struct dvb_frontend_ops mci_ops = {
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},
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.get_frontend_algo = get_algo,
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.tune = tune,
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.release = release,
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.read_status = read_status,
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.release = release,
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.read_status = read_status,
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.set_input = set_input,
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.sleep = sleep,
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};
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static struct mci_base *match_base(void *key)
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@ -1,9 +1,9 @@
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/*
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* ddbridge-mci.h: Digital Devices micro code interface
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*
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* Copyright (C) 2017 Digital Devices GmbH
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* Marcus Metzler <mocm@metzlerbros.de>
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Copyright (C) 2017-2018 Digital Devices GmbH
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* Marcus Metzler <mocm@metzlerbros.de>
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* Ralph Metzler <rjkm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -52,48 +52,53 @@
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#define SX8_TSCONFIG_BURSTSIZE_8K (0x00000020)
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#define SX8_TSCONFIG_BURSTSIZE_16K (0x00000030)
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#define SX8_DEMOD_STOPPED (0)
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#define SX8_DEMOD_IQ_MODE (1)
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#define SX8_DEMOD_WAIT_SIGNAL (2)
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#define SX8_DEMOD_WAIT_MATYPE (3)
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#define SX8_DEMOD_TIMEOUT (14)
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#define SX8_DEMOD_LOCKED (15)
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#define SX8_DEMOD_STOPPED (0)
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#define SX8_DEMOD_IQ_MODE (1)
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#define SX8_DEMOD_WAIT_SIGNAL (2)
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#define SX8_DEMOD_WAIT_MATYPE (3)
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#define SX8_DEMOD_TIMEOUT (14)
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#define SX8_DEMOD_LOCKED (15)
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#define MCI_CMD_STOP (0x01)
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#define MCI_CMD_GETSTATUS (0x02)
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#define MCI_CMD_GETSIGNALINFO (0x03)
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#define MCI_CMD_RFPOWER (0x04)
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#define M4_DEMOD_STOPPED (0)
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#define M4_DEMOD_WAIT_SIGNAL (1)
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#define M4_DEMOD_TIMEOUT (14)
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#define M4_DEMOD_LOCKED (15)
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#define MCI_CMD_SEARCH_DVBS (0x10)
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#define MCI_CMD_STOP (0x01)
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#define MCI_CMD_GETSTATUS (0x02)
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#define MCI_CMD_GETSIGNALINFO (0x03)
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#define MCI_CMD_RFPOWER (0x04)
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#define MCI_CMD_GET_IQSYMBOL (0x30)
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#define MCI_CMD_SEARCH_DVBS (0x10)
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#define SX8_CMD_INPUT_ENABLE (0x40)
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#define SX8_CMD_INPUT_DISABLE (0x41)
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#define SX8_CMD_START_IQ (0x42)
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#define SX8_CMD_STOP_IQ (0x43)
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#define SX8_CMD_SELECT_IQOUT (0x44)
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#define SX8_CMD_SELECT_TSOUT (0x45)
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#define MCI_CMD_GET_IQSYMBOL (0x30)
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#define SX8_ERROR_UNSUPPORTED (0x80)
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#define SX8_CMD_INPUT_ENABLE (0x40)
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#define SX8_CMD_INPUT_DISABLE (0x41)
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#define SX8_CMD_START_IQ (0x42)
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#define SX8_CMD_STOP_IQ (0x43)
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#define SX8_CMD_ENABLE_IQOUTPUT (0x44)
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#define SX8_CMD_DISABLE_IQOUTPUT (0x45)
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#define SX8_SUCCESS(status) (status < SX8_ERROR_UNSUPPORTED)
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#define MCI_ERROR_UNSUPPORTED (0x80)
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#define SX8_CMD_DIAG_READ8 (0xE0)
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#define SX8_CMD_DIAG_READ32 (0xE1)
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#define SX8_CMD_DIAG_WRITE8 (0xE2)
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#define SX8_CMD_DIAG_WRITE32 (0xE3)
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#define MCI_SUCCESS(status) (status < MCI_ERROR_UNSUPPORTED)
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#define M4_CMD_DIAG_READRF (0xE8)
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#define M4_CMD_DIAG_WRITERF (0xE9)
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#define SX8_CMD_DIAG_READ8 (0xE0)
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#define SX8_CMD_DIAG_READ32 (0xE1)
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#define SX8_CMD_DIAG_WRITE8 (0xE2)
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#define SX8_CMD_DIAG_WRITE32 (0xE3)
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#define M4_CMD_DIAG_READX (0xE0)
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#define M4_CMD_DIAG_READT (0xE1)
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#define M4_CMD_DIAG_WRITEX (0xE2)
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#define M4_CMD_DIAG_WRITET (0xE3)
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#define M4_CMD_DIAG_READRF (0xE8)
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#define M4_CMD_DIAG_WRITERF (0xE9)
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#define M4_CMD_DIAG_READRF (0xE8)
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#define M4_CMD_DIAG_WRITERF (0xE9)
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#define M4_CMD_DIAG_READX (0xE0)
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#define M4_CMD_DIAG_READT (0xE1)
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#define M4_CMD_DIAG_WRITEX (0xE2)
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#define M4_CMD_DIAG_WRITET (0xE3)
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#define M4_CMD_DIAG_READRF (0xE8)
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#define M4_CMD_DIAG_WRITERF (0xE9)
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struct mci_command {
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@ -149,8 +154,8 @@ struct mci_result {
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u32 ber_denominator;
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} dvbs2_signal_info;
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struct {
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u8 i_symbol;
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u8 q_symbol;
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s16 I;
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s16 Q;
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} dvbs2_signal_iq;
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};
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u32 version[4];
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