624 Commits

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Author	SHA1	Message	Date
none	f8c97ad3d6	remove init dump, cannot access regs directly on all platforms	2021-03-11 22:43:12 +01:00
none	60646a6b26	experimental diseqc receive code	2021-03-11 22:33:13 +01:00
none	de0e970999	change input locked in fmode=4 and do not send emulated sequence as diseqc	2021-03-11 22:31:52 +01:00
none	cf35c3038b	only get status if demod started	2021-03-10 22:03:56 +01:00
none	4c96f54ddf	increase L-BAND to 3GHz	2021-03-10 21:46:29 +01:00
none	eb427a8df2	properly handle flash size limits	2021-03-10 21:38:19 +01:00
none	b200ce3596	allow source selection in non-unicable mode	2021-03-10 16:20:44 +01:00
none	31f36de0d7	set default source to undef	2021-03-10 16:20:44 +01:00
mocm	9269270c79	Added install link	2021-03-09 22:14:14 +01:00
drmocm	04fa5041d3	fixes	2021-03-09 22:06:10 +01:00
drmocm	f3cbbf3ba7	Merge branch 'internal' of http://hippo:3000/rjkm/dddvb into internal	2021-03-09 21:40:52 +01:00
none	a2d39f90d5	add module parameter for disabling voltage output in Max cards.	2021-03-09 20:21:09 +01:00
none	7af71dfdcb	lock ldpc bitrate adjustment to prevent race condition during tuner stop	2021-03-09 14:23:06 +01:00
drmocm	acb5931ed0	added README.md	2021-03-08 14:29:27 +01:00
none	b025599e9f	dump more buffer bytes in case of misalignment	2021-03-01 12:58:54 +01:00
none	9028e75f63	always use unaligned processing if detected once	2021-03-01 12:58:21 +01:00
none	177e6b0fd6	check if memory is aligned to 4K	2021-03-01 12:57:45 +01:00
none	de82a50b4e	Set allocated memory to zero.	2021-03-01 12:57:20 +01:00
none	01ca1b8805	Detect and report TS misalignment and switch to unaligned processing.	2021-02-25 14:58:42 +01:00
none	28e09191af	Do not attach dummy with dvb attach.	2021-02-25 14:57:33 +01:00
none	abb2c56ddc	output overflow as warning	2021-02-24 20:30:45 +01:00
none	c6ada48892	remove check for MCI base	2021-02-24 20:27:42 +01:00
none	baf6a090b8	use packet loss function	2021-02-24 20:25:27 +01:00
none	d259d69808	add packet loss function	2021-02-24 20:24:14 +01:00
none	f72c7b2256	print MCI info	2021-02-24 20:22:36 +01:00
none	c82c9d3218	old GCC does not like init in struct	2021-02-24 20:22:08 +01:00
none	1598ab98bc	print MCI information at init	2021-02-24 20:21:57 +01:00
none	7efa935a30	remove debug messages	2021-02-24 20:20:10 +01:00
none	fc728ab51e	only report I2C errors after probing is done	2021-02-24 20:19:06 +01:00
none	ea41e57ba3	disable master at driver shutdown	2021-02-24 20:17:50 +01:00
none	cd3868afff	reenable gain control	2021-02-24 20:17:22 +01:00
none	b72f0365ea	correctly check id	2021-02-24 20:16:43 +01:00
none	b3f2580e84	add flash name	2021-02-24 20:16:26 +01:00
none	f1976b5f74	always return if help requested	2021-02-24 20:13:24 +01:00
none	ee6787d2d0	add usage for force option	2021-02-24 20:12:54 +01:00
none	37eb11fb4b	set iq_mode to 2 in start_iq()	2021-02-09 17:40:49 +01:00
none	a276a370cb	always return lock with SDR mode	2021-02-09 17:30:48 +01:00
none	8b787bbc0d	Bodo patches	2021-02-03 18:03:51 +01:00
none	e5e6e44b76	forgot isi	2021-02-02 16:44:03 +01:00
none	cfbe430b4a	more flags in SDR mode	2021-02-01 21:30:52 +01:00
none	2a1b96a6ad	correct FSM4 name	2021-02-01 21:30:23 +01:00
rjkm	cbfd9b18ea	report back inversion state	2021-01-13 14:59:27 +01:00
rjkm	bfa8cec850	always use the copy loop with 32bit accesses ... 64bit access produces errors on some platforms	2021-01-13 14:56:57 +01:00
rjkm	e413baeab9	fix error for unaligned accesses	2021-01-13 14:56:22 +01:00
rjkm	46c42c6ef0	- remove comment ... - assume unset input if not explicitely set	2020-12-18 16:44:57 +01:00
rjkm	4b053c68ef	use F output as default	2020-12-01 16:00:17 +01:00
rjkm	46a4f7476a	support new SDR modulator image with MCI	2020-12-01 15:58:35 +01:00
rjkm	65b3128cbe	allow 64 bit consisten mem addresses	2020-12-01 15:57:31 +01:00
rjkm	22c52fbf86	how partial isdbs lock	2020-12-01 15:56:21 +01:00
rjkm	766ca0e652	simplify check expression	2020-12-01 15:56:06 +01:00