27 Commits

Author SHA1 Message Date
Ralph Metzler
eb81f006e4 bump version to 0.9.30 2017-07-26 15:16:14 +02:00
Ralph Metzler
af554da865 add ddbridge-hw file with hardware info 2017-07-26 15:15:06 +02:00
Ralph Metzler
d6f56c1807 dkms compatibility
Build against specified kernel version (dkms ... -k VERSION) or against current running (uname -r) if not specified
2017-07-26 02:44:56 +02:00
Ralph Metzler
31f22ef4de also clean .*.o.d files 2017-07-26 02:42:35 +02:00
Ralph Metzler
d4d0a9b84e Improvements for cit
- Added error checking.
- Added help text.
- Added info.

Signed-off-by: Jasmin Jessich <jasmin@anw.at>
2017-07-26 02:35:40 +02:00
Ralph Metzler
24503d35ad remove no longer used module parameter 2017-07-26 02:13:27 +02:00
Ralph Metzler
3556d6464b Move device info into ddbridge-hw.c and use get_ddb_info
in ddbridge.c, ddbridge-core.c and octonet.c to get
ddb_info for specific devices.

This unifies the method for getting the device info for all hardware.
It also no longer relies on driver_data in struct pci_dev_id
which is deprecated to be used as a pointer.
2017-07-24 22:24:47 +02:00
Ralph Metzler
862c7bfc60 check for error during write 2017-07-24 22:24:13 +02:00
Ralph Metzler
fd21584ecc Use ddbridge version macro for octonet version 2017-07-24 01:05:31 +02:00
Ralph Metzler
6814a8fa23 move common functions of ddbridge and octonet to core 2017-07-24 01:03:40 +02:00
Ralph Metzler
49d4bd0da8 fix MSI/non-MSI compilation 2017-07-18 01:25:55 +02:00
Ralph Metzler
6d1cfd4cd2 acivate CAM race condition handler 2017-07-18 00:26:09 +02:00
Ralph Metzler
e68ce2ef62 add __refdata 2017-07-18 00:23:13 +02:00
Ralph Metzler
023ae44411 add missing version include 2017-07-17 23:49:19 +02:00
Ralph Metzler
7222bd58b3 change lock check order 2017-07-11 20:37:38 +02:00
Ralph Metzler
f404b3fb6d add multi-stream capability announcement 2017-07-11 20:36:52 +02:00
Ralph Metzler
de34e2ebbd correct array access 2017-07-11 20:29:20 +02:00
Ralph Metzler
774e92bd44 change to unsigned because of possible wrong range 2017-07-11 20:27:42 +02:00
Ralph Metzler
8c46d9a86a change pointer check order 2017-07-11 20:20:39 +02:00
Ralph Metzler
452771913e fix for 4.12. kernels 2017-07-11 20:17:28 +02:00
Ralph Metzler
3285b6ade0 modulator type 1 has no vga 2017-06-12 14:23:35 +02:00
Ralph Metzler
e6dd33deec write really availalble modulator channels to port_num 2017-06-12 14:21:21 +02:00
Ralph Metzler
93e42deeaa only eval register 0x1c for modulator type 1 2017-06-12 14:21:21 +02:00
Ralph Metzler
e415b6e203 force gap setting if given by attribute 2017-06-12 14:21:21 +02:00
manf
1354b9021f increased fm power 2017-06-02 01:14:15 +02:00
manf
4d17f2f5f0 mod3: atten,gain fixed 2017-06-01 20:13:08 +02:00
Ralph Metzler
5fa08eb288 add gain control 2017-06-01 16:46:44 +02:00
13 changed files with 815 additions and 753 deletions

View File

@@ -1,4 +1,5 @@
KDIR ?= /lib/modules/$(shell uname -r)/build kernelver ?= $(shell uname -r)
KDIR ?= /lib/modules/$(kernelver)/build
PWD := $(shell pwd) PWD := $(shell pwd)
MODDEFS := CONFIG_DVB_CORE=m CONFIG_DVB_DDBRIDGE=m CONFIG_DVB_DRXK=m CONFIG_DVB_TDA18271C2DD=m CONFIG_DVB_CXD2099=m CONFIG_DVB_LNBP21=m CONFIG_DVB_STV090x=m CONFIG_DVB_STV6110x=m CONFIG_DVB_STV0367=m CONFIG_DVB_TDA18212=m CONFIG_DVB_STV0367DD=m CONFIG_DVB_TDA18212DD=m CONFIG_DVB_OCTONET=m CONFIG_DVB_CXD2843=m CONFIG_DVB_STV0910=m CONFIG_DVB_STV6111=m CONFIG_DVB_LNBH25=m CONFIG_DVB_MXL5XX=m MODDEFS := CONFIG_DVB_CORE=m CONFIG_DVB_DDBRIDGE=m CONFIG_DVB_DRXK=m CONFIG_DVB_TDA18271C2DD=m CONFIG_DVB_CXD2099=m CONFIG_DVB_LNBP21=m CONFIG_DVB_STV090x=m CONFIG_DVB_STV6110x=m CONFIG_DVB_STV0367=m CONFIG_DVB_TDA18212=m CONFIG_DVB_STV0367DD=m CONFIG_DVB_TDA18212DD=m CONFIG_DVB_OCTONET=m CONFIG_DVB_CXD2843=m CONFIG_DVB_STV0910=m CONFIG_DVB_STV6111=m CONFIG_DVB_LNBH25=m CONFIG_DVB_MXL5XX=m
@@ -14,6 +15,6 @@ install: all
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules_install $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules_install
clean: clean:
rm -rf */*.o */*.ko */*.mod.c */.*.cmd .tmp_versions Module* modules* rm -rf */.*.o.d */*.o */*.ko */*.mod.c */.*.cmd .tmp_versions Module* modules*

View File

@@ -93,6 +93,10 @@ void *get_ts(void *a)
sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device); sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device);
printf("using %s for reading\n", fname); printf("using %s for reading\n", fname);
fdi = open(fname, O_RDONLY); fdi = open(fname, O_RDONLY);
if (fdi == -1) {
printf("Failed to open %s for read: %m\n", fname);
return NULL;
}
while (1) { while (1) {
memset(buf, 0, 188*rnum); memset(buf, 0, 188*rnum);
@@ -125,6 +129,10 @@ int send(void)
sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device); sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device);
printf("using %s for writing\n", fname); printf("using %s for writing\n", fname);
fdo=open(fname, O_WRONLY); fdo=open(fname, O_WRONLY);
if (fdo == -1) {
printf("Failed to open %s to write: %m\n", fname);
exit(2);
}
while (1) { while (1) {
for (i=0; i<snum; i++) { for (i=0; i<snum; i++) {
@@ -180,6 +188,8 @@ int main(int argc, char **argv)
rnum = strtoul(optarg, NULL, 10); rnum = strtoul(optarg, NULL, 10);
break; break;
case 'h': case 'h':
printf("cit -a<adapter> -d<device>\n");
exit(-1);
default: default:
break; break;
@@ -188,6 +198,7 @@ int main(int argc, char **argv)
if (optind < argc) { if (optind < argc) {
printf("Warning: unused arguments\n"); printf("Warning: unused arguments\n");
} }
printf("adapter %d, device: %d\n", adapter, device);
memset(ts+8, 180, 0x5a); memset(ts+8, 180, 0x5a);
pthread_create(&th, NULL, get_ts, NULL); pthread_create(&th, NULL, get_ts, NULL);
usleep(10000); usleep(10000);

View File

@@ -26,6 +26,20 @@
DEFINE_MUTEX(redirect_lock); DEFINE_MUTEX(redirect_lock);
static struct workqueue_struct *ddb_wq;
static int adapter_alloc;
module_param(adapter_alloc, int, 0444);
MODULE_PARM_DESC(adapter_alloc,
"0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
#ifdef CONFIG_PCI_MSI
static int msi = 1;
module_param(msi, int, 0444);
MODULE_PARM_DESC(msi,
" Control MSI interrupts: 0-disable, 1-enable (default)");
#endif
static int ci_bitrate = 70000; static int ci_bitrate = 70000;
module_param(ci_bitrate, int, 0444); module_param(ci_bitrate, int, 0444);
MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI."); MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI.");
@@ -38,10 +52,6 @@ static int vlan;
module_param(vlan, int, 0444); module_param(vlan, int, 0444);
MODULE_PARM_DESC(vlan, "VLAN and QoS IDs enabled"); MODULE_PARM_DESC(vlan, "VLAN and QoS IDs enabled");
static int tt;
module_param(tt, int, 0444);
MODULE_PARM_DESC(tt, "");
static int fmode; static int fmode;
module_param(fmode, int, 0444); module_param(fmode, int, 0444);
MODULE_PARM_DESC(fmode, "frontend emulation mode"); MODULE_PARM_DESC(fmode, "frontend emulation mode");
@@ -82,316 +92,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#include "ddbridge-mod.c" #include "ddbridge-mod.c"
#include "ddbridge-i2c.c" #include "ddbridge-i2c.c"
#include "ddbridge-ns.c" #include "ddbridge-ns.c"
#include "ddbridge-hw.c"
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
static struct ddb_regset octopus_mod_odma = {
.base = 0x300,
.num = 0x0a,
.size = 0x10,
};
static struct ddb_regset octopus_mod_odma_buf = {
.base = 0x2000,
.num = 0x0a,
.size = 0x100,
};
static struct ddb_regset octopus_mod_channel = {
.base = 0x400,
.num = 0x0a,
.size = 0x40,
};
/****************************************************************************/
static struct ddb_regset octopus_mod_2_odma = {
.base = 0x400,
.num = 0x18,
.size = 0x10,
};
static struct ddb_regset octopus_mod_2_odma_buf = {
.base = 0x8000,
.num = 0x18,
.size = 0x100,
};
static struct ddb_regset octopus_mod_2_channel = {
.base = 0x800,
.num = 0x18,
.size = 0x40,
};
static struct ddb_regset octopus_sdr_output = {
.base = 0x240,
.num = 0x14,
.size = 0x10,
};
/****************************************************************************/
static struct ddb_regset octopus_input = {
.base = 0x200,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_output = {
.base = 0x280,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_idma = {
.base = 0x300,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_idma_buf = {
.base = 0x2000,
.num = 0x08,
.size = 0x100,
};
static struct ddb_regset octopus_odma = {
.base = 0x380,
.num = 0x04,
.size = 0x10,
};
static struct ddb_regset octopus_odma_buf = {
.base = 0x2800,
.num = 0x04,
.size = 0x100,
};
static struct ddb_regset octopus_i2c = {
.base = 0x80,
.num = 0x04,
.size = 0x20,
};
static struct ddb_regset octopus_i2c_buf = {
.base = 0x1000,
.num = 0x04,
.size = 0x200,
};
/****************************************************************************/
static struct ddb_regset octopro_input = {
.base = 0x400,
.num = 0x14,
.size = 0x10,
};
static struct ddb_regset octopro_output = {
.base = 0x600,
.num = 0x0a,
.size = 0x10,
};
static struct ddb_regset octopro_idma = {
.base = 0x800,
.num = 0x40,
.size = 0x10,
};
static struct ddb_regset octopro_idma_buf = {
.base = 0x4000,
.num = 0x40,
.size = 0x100,
};
static struct ddb_regset octopro_odma = {
.base = 0xc00,
.num = 0x20,
.size = 0x10,
};
static struct ddb_regset octopro_odma_buf = {
.base = 0x8000,
.num = 0x20,
.size = 0x100,
};
static struct ddb_regset octopro_i2c = {
.base = 0x200,
.num = 0x0a,
.size = 0x20,
};
static struct ddb_regset octopro_i2c_buf = {
.base = 0x2000,
.num = 0x0a,
.size = 0x200,
};
static struct ddb_regset octopro_gtl = {
.base = 0xe00,
.num = 0x03,
.size = 0x40,
};
/****************************************************************************/
/****************************************************************************/
static struct ddb_regmap octopus_map = {
.irq_version = 1,
.irq_base_i2c = 0,
.irq_base_idma = 8,
.irq_base_odma = 16,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.idma = &octopus_idma,
.idma_buf = &octopus_idma_buf,
.odma = &octopus_odma,
.odma_buf = &octopus_odma_buf,
.input = &octopus_input,
.output = &octopus_output,
};
static struct ddb_regmap octopro_map = {
.irq_version = 2,
.irq_base_i2c = 32,
.irq_base_idma = 64,
.irq_base_odma = 128,
.irq_base_gtl = 8,
.i2c = &octopro_i2c,
.i2c_buf = &octopro_i2c_buf,
.idma = &octopro_idma,
.idma_buf = &octopro_idma_buf,
.odma = &octopro_odma,
.odma_buf = &octopro_odma_buf,
.input = &octopro_input,
.output = &octopro_output,
.gtl = &octopro_gtl,
};
static struct ddb_regmap octopro_hdin_map = {
.irq_version = 2,
.irq_base_i2c = 32,
.irq_base_idma = 64,
.irq_base_odma = 128,
.i2c = &octopro_i2c,
.i2c_buf = &octopro_i2c_buf,
.idma = &octopro_idma,
.idma_buf = &octopro_idma_buf,
.odma = &octopro_odma,
.odma_buf = &octopro_odma_buf,
.input = &octopro_input,
.output = &octopro_output,
};
static struct ddb_regmap octopus_mod_map = {
.irq_version = 1,
.irq_base_odma = 8,
.irq_base_rate = 18,
.output = &octopus_output,
.odma = &octopus_mod_odma,
.odma_buf = &octopus_mod_odma_buf,
.channel = &octopus_mod_channel,
};
static struct ddb_regmap octopus_mod_2_map = {
.irq_version = 2,
.irq_base_odma = 64,
.irq_base_rate = 32,
.output = &octopus_output,
.odma = &octopus_mod_2_odma,
.odma_buf = &octopus_mod_2_odma_buf,
.channel = &octopus_mod_2_channel,
};
static struct ddb_regmap octopus_sdr_map = {
.irq_version = 2,
.irq_base_odma = 64,
.irq_base_rate = 32,
.output = &octopus_sdr_output,
.odma = &octopus_mod_2_odma,
.odma_buf = &octopus_mod_2_odma_buf,
.channel = &octopus_mod_2_channel,
};
/****************************************************************************/
static struct ddb_info ddb_s2_48 = {
.type = DDB_OCTOPUS_MAX,
.name = "Digital Devices MAX S8 4/8",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 1,
.tempmon_irq = 24,
};
static struct ddb_info ddb_ct2_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 CT2",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_isdbt_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 ISDBT",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2i_v0_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2I V0",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2i_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2I",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
/****************************************************************************/ /****************************************************************************/
/****************************************************************************/ /****************************************************************************/
@@ -498,9 +199,9 @@ static int ddb_redirect(u32 i, u32 p)
struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; struct ddb *pdev = ddbs[(p >> 4) & 0x3f];
struct ddb_port *port; struct ddb_port *port;
if (!idev->has_dma || !pdev->has_dma) if (!pdev || !idev)
return -EINVAL; return -EINVAL;
if (!idev || !pdev) if (!pdev->has_dma || !idev->has_dma)
return -EINVAL; return -EINVAL;
port = &pdev->port[p & 0x0f]; port = &pdev->port[p & 0x0f];
@@ -685,6 +386,7 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
if (output->port->gap != 0xffffffff) { if (output->port->gap != 0xffffffff) {
flags |= 1; flags |= 1;
gap = output->port->gap; gap = output->port->gap;
max_bitrate = 0;
} }
if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) {
*con = 0x10c; *con = 0x10c;
@@ -4719,7 +4421,7 @@ static ssize_t bpsnr_show(struct device *device,
struct device_attribute *attr, char *buf) struct device_attribute *attr, char *buf)
{ {
struct ddb *dev = dev_get_drvdata(device); struct ddb *dev = dev_get_drvdata(device);
char snr[32]; unsigned char snr[32];
if (!dev->i2c_num) if (!dev->i2c_num)
return 0; return 0;
@@ -5209,28 +4911,10 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
} }
id = ddbreadl(dev, DDB_LINK_TAG(l) | 8); id = ddbreadl(dev, DDB_LINK_TAG(l) | 8);
subid = ddbreadl(dev, DDB_LINK_TAG(l) | 12); subid = ddbreadl(dev, DDB_LINK_TAG(l) | 12);
switch (id) { link->info = get_ddb_info(id & 0xffff, id >> 16,
case 0x0007dd01: subid & 0xffff, subid >> 16);
link->info = &ddb_s2_48; if (link->info->type != DDB_OCTOPUS_MAX_CT &&
break; link->info->type != DDB_OCTOPUS_MAX) {
case 0x0008dd01:
switch (subid) {
case 0x0035dd01:
default:
link->info = &ddb_c2t2_8;
break;
case 0x0036dd01:
link->info = &ddb_isdbt_8;
break;
case 0x0037dd01:
link->info = &ddb_c2t2i_v0_8;
break;
case 0x0038dd01:
link->info = &ddb_c2t2i_8;
break;
}
break;
default:
pr_info("DDBridge: Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.", pr_info("DDBridge: Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.",
id); id);
return -1; return -1;
@@ -5479,3 +5163,11 @@ static void ddb_reset_ios(struct ddb *dev)
rm->output->base + i * rm->output->size); rm->output->base + i * rm->output->size);
usleep_range(5000, 6000); usleep_range(5000, 6000);
} }
static void ddb_unmap(struct ddb *dev)
{
if (dev->regs)
iounmap(dev->regs);
vfree(dev);
}

704
ddbridge/ddbridge-hw.c Normal file
View File

@@ -0,0 +1,704 @@
/*
* ddbridge.c: Digital Devices PCIe bridge driver
*
* Copyright (C) 2010-2017 Digital Devices GmbH
* Ralph Metzler <rjkm@metzlerbros.de>
* Marcus Metzler <mocm@metzlerbros.de>
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 only, as published by the Free Software Foundation.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA
* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
*/
#include "ddbridge.h"
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
static struct ddb_regset octopus_mod_odma = {
.base = 0x300,
.num = 0x0a,
.size = 0x10,
};
static struct ddb_regset octopus_mod_odma_buf = {
.base = 0x2000,
.num = 0x0a,
.size = 0x100,
};
static struct ddb_regset octopus_mod_channel = {
.base = 0x400,
.num = 0x0a,
.size = 0x40,
};
/****************************************************************************/
static struct ddb_regset octopus_mod_2_odma = {
.base = 0x400,
.num = 0x18,
.size = 0x10,
};
static struct ddb_regset octopus_mod_2_odma_buf = {
.base = 0x8000,
.num = 0x18,
.size = 0x100,
};
static struct ddb_regset octopus_mod_2_channel = {
.base = 0x800,
.num = 0x18,
.size = 0x40,
};
static struct ddb_regset octopus_sdr_output = {
.base = 0x240,
.num = 0x14,
.size = 0x10,
};
/****************************************************************************/
static struct ddb_regset octopus_input = {
.base = 0x200,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_output = {
.base = 0x280,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_idma = {
.base = 0x300,
.num = 0x08,
.size = 0x10,
};
static struct ddb_regset octopus_idma_buf = {
.base = 0x2000,
.num = 0x08,
.size = 0x100,
};
static struct ddb_regset octopus_odma = {
.base = 0x380,
.num = 0x04,
.size = 0x10,
};
static struct ddb_regset octopus_odma_buf = {
.base = 0x2800,
.num = 0x04,
.size = 0x100,
};
static struct ddb_regset octopus_i2c = {
.base = 0x80,
.num = 0x04,
.size = 0x20,
};
static struct ddb_regset octopus_i2c_buf = {
.base = 0x1000,
.num = 0x04,
.size = 0x200,
};
/****************************************************************************/
static struct ddb_regset octopro_input = {
.base = 0x400,
.num = 0x14,
.size = 0x10,
};
static struct ddb_regset octopro_output = {
.base = 0x600,
.num = 0x0a,
.size = 0x10,
};
static struct ddb_regset octopro_idma = {
.base = 0x800,
.num = 0x40,
.size = 0x10,
};
static struct ddb_regset octopro_idma_buf = {
.base = 0x4000,
.num = 0x40,
.size = 0x100,
};
static struct ddb_regset octopro_odma = {
.base = 0xc00,
.num = 0x20,
.size = 0x10,
};
static struct ddb_regset octopro_odma_buf = {
.base = 0x8000,
.num = 0x20,
.size = 0x100,
};
static struct ddb_regset octopro_i2c = {
.base = 0x200,
.num = 0x0a,
.size = 0x20,
};
static struct ddb_regset octopro_i2c_buf = {
.base = 0x2000,
.num = 0x0a,
.size = 0x200,
};
static struct ddb_regset octopro_gtl = {
.base = 0xe00,
.num = 0x03,
.size = 0x40,
};
/****************************************************************************/
/****************************************************************************/
static struct ddb_regmap octopus_map = {
.irq_version = 1,
.irq_base_i2c = 0,
.irq_base_idma = 8,
.irq_base_odma = 16,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.idma = &octopus_idma,
.idma_buf = &octopus_idma_buf,
.odma = &octopus_odma,
.odma_buf = &octopus_odma_buf,
.input = &octopus_input,
.output = &octopus_output,
};
static struct ddb_regmap octopro_map = {
.irq_version = 2,
.irq_base_i2c = 32,
.irq_base_idma = 64,
.irq_base_odma = 128,
.irq_base_gtl = 8,
.i2c = &octopro_i2c,
.i2c_buf = &octopro_i2c_buf,
.idma = &octopro_idma,
.idma_buf = &octopro_idma_buf,
.odma = &octopro_odma,
.odma_buf = &octopro_odma_buf,
.input = &octopro_input,
.output = &octopro_output,
.gtl = &octopro_gtl,
};
static struct ddb_regmap octopro_hdin_map = {
.irq_version = 2,
.irq_base_i2c = 32,
.irq_base_idma = 64,
.irq_base_odma = 128,
.i2c = &octopro_i2c,
.i2c_buf = &octopro_i2c_buf,
.idma = &octopro_idma,
.idma_buf = &octopro_idma_buf,
.odma = &octopro_odma,
.odma_buf = &octopro_odma_buf,
.input = &octopro_input,
.output = &octopro_output,
};
static struct ddb_regmap octopus_mod_map = {
.irq_version = 1,
.irq_base_odma = 8,
.irq_base_rate = 18,
.output = &octopus_output,
.odma = &octopus_mod_odma,
.odma_buf = &octopus_mod_odma_buf,
.channel = &octopus_mod_channel,
};
static struct ddb_regmap octopus_mod_2_map = {
.irq_version = 2,
.irq_base_odma = 64,
.irq_base_rate = 32,
.output = &octopus_output,
.odma = &octopus_mod_2_odma,
.odma_buf = &octopus_mod_2_odma_buf,
.channel = &octopus_mod_2_channel,
};
static struct ddb_regmap octopus_sdr_map = {
.irq_version = 2,
.irq_base_odma = 64,
.irq_base_rate = 32,
.output = &octopus_sdr_output,
.odma = &octopus_mod_2_odma,
.odma_buf = &octopus_mod_2_odma_buf,
.channel = &octopus_mod_2_channel,
};
/****************************************************************************/
/****************************************************************************/
static struct ddb_info ddb_none = {
.type = DDB_NONE,
.name = "unknown Digital Devices device, install newer driver",
.regmap = &octopus_map,
};
static struct ddb_info ddb_octopus = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_octopusv3 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus V3 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_octopus_le = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus LE DVB adapter",
.regmap = &octopus_map,
.port_num = 2,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_octopus_oem = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus OEM",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.led_num = 1,
.fan_num = 1,
.temp_num = 1,
.temp_bus = 0,
};
static struct ddb_info ddb_octopus_mini = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus Mini",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_v6 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V6 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
static struct ddb_info ddb_v6_5 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V6.5 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_v7a = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 2,
.board_control_2 = 4,
.ts_quirks = TS_QUIRK_REVERSED,
};
static struct ddb_info ddb_v7 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V7 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 2,
.board_control_2 = 4,
.ts_quirks = TS_QUIRK_REVERSED,
};
static struct ddb_info ddb_ctv7 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine CT V7 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 3,
.board_control_2 = 4,
};
static struct ddb_info ddb_satixS2v3 = {
.type = DDB_OCTOPUS,
.name = "Mystique SaTiX-S2 V3 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
static struct ddb_info ddb_ci = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_cis = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI single",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_ci_s2_pro = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI S2 Pro",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 2,
.board_control_2 = 4,
};
static struct ddb_info ddb_ci_s2_pro_a = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI S2 Pro Advanced",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 2,
.board_control_2 = 4,
};
static struct ddb_info ddb_dvbct = {
.type = DDB_OCTOPUS,
.name = "Digital Devices DVBCT V6.1 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
/****************************************************************************/
static struct ddb_info ddb_mod = {
.type = DDB_MOD,
.name = "Digital Devices DVB-C modulator",
.regmap = &octopus_mod_map,
.port_num = 10,
.temp_num = 1,
};
static struct ddb_info ddb_mod_fsm_24 = {
.type = DDB_MOD,
.version = 2,
.name = "Digital Devices DVB-C modulator FSM-24",
.regmap = &octopus_mod_2_map,
.port_num = 24,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_mod_fsm_16 = {
.type = DDB_MOD,
.version = 2,
.name = "Digital Devices DVB-C modulator FSM-16",
.regmap = &octopus_mod_2_map,
.port_num = 16,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_mod_fsm_8 = {
.type = DDB_MOD,
.name = "Digital Devices DVB-C modulator FSM-8",
.version = 2,
.regmap = &octopus_mod_2_map,
.port_num = 8,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_sdr = {
.type = DDB_MOD,
.name = "Digital Devices SDR",
.version = 3,
.regmap = &octopus_sdr_map,
.port_num = 16,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_octopro_hdin = {
.type = DDB_OCTOPRO_HDIN,
.name = "Digital Devices OctopusNet Pro HDIN",
.regmap = &octopro_hdin_map,
.port_num = 10,
.i2c_mask = 0x3ff,
.mdio_num = 1,
};
static struct ddb_info ddb_octopro = {
.type = DDB_OCTOPRO,
.name = "Digital Devices OctopusNet Pro",
.regmap = &octopro_map,
.port_num = 10,
.i2c_mask = 0x3ff,
.mdio_num = 1,
};
static struct ddb_info ddb_s2_48 = {
.type = DDB_OCTOPUS_MAX,
.name = "Digital Devices MAX S8 4/8",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 1,
.tempmon_irq = 24,
};
static struct ddb_info ddb_ct2_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 CT2",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_isdbt_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 ISDBT",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2i_v0_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2I V0",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
.tempmon_irq = 24,
};
static struct ddb_info ddb_c2t2i_8 = {
.type = DDB_OCTOPUS_MAX_CT,
.name = "Digital Devices MAX A8 C2T2I",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 0x0ff,
.board_control_2 = 0xf00,
.ts_quirks = TS_QUIRK_SERIAL,
.tempmon_irq = 24,
};
/****************************************************************************/
/****************************************************************************/
static struct ddb_regmap octopus_net_map = {
.irq_version = 1,
.irq_base_i2c = 0,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.input = &octopus_input,
.output = &octopus_output,
};
static struct ddb_regset octopus_gtl = {
.base = 0x180,
.num = 0x01,
.size = 0x20,
};
static struct ddb_regmap octopus_net_gtl = {
.irq_version = 1,
.irq_base_i2c = 0,
.irq_base_gtl = 10,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.input = &octopus_input,
.output = &octopus_output,
.gtl = &octopus_gtl,
};
static struct ddb_info ddb_octonet = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet network DVB adapter",
.regmap = &octopus_net_map,
.port_num = 4,
.i2c_mask = 0x0f,
.ns_num = 12,
.mdio_num = 1,
};
static struct ddb_info ddb_octonet_jse = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet network DVB adapter JSE",
.regmap = &octopus_net_map,
.port_num = 4,
.i2c_mask = 0x0f,
.ns_num = 15,
.mdio_num = 1,
};
static struct ddb_info ddb_octonet_gtl = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet GTL",
.regmap = &octopus_net_gtl,
.port_num = 4,
.i2c_mask = 0x05,
.ns_num = 12,
.mdio_num = 1,
.con_clock = 1,
};
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
struct ddb_device_id {
u16 vendor;
u16 device;
u16 subvendor;
u16 subdevice;
struct ddb_info *info;
};
#define DDB_DEVID(_device, _subdevice, _info) { \
.vendor = 0xdd01, \
.device = _device, \
.subvendor = 0xdd01, \
.subdevice = _subdevice, \
.info = &_info }
static struct ddb_device_id ddb_device_ids[] = {
/* OctopusNet */
DDB_DEVID(0x0300, 0xffff, ddb_octonet),
DDB_DEVID(0x0301, 0xffff, ddb_octonet_jse),
DDB_DEVID(0x0307, 0xffff, ddb_octonet_gtl),
/* PCIe devices */
DDB_DEVID(0x0002, 0x0001, ddb_octopus),
DDB_DEVID(0x0003, 0x0001, ddb_octopus),
DDB_DEVID(0x0005, 0x0004, ddb_octopusv3),
DDB_DEVID(0x0003, 0x0002, ddb_octopus_le),
DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem),
DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini),
DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini),
DDB_DEVID(0x0003, 0x0020, ddb_v6),
DDB_DEVID(0x0003, 0x0021, ddb_v6_5),
DDB_DEVID(0x0006, 0x0022, ddb_v7),
DDB_DEVID(0x0006, 0x0024, ddb_v7a),
DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
DDB_DEVID(0x0003, 0xdb03, ddb_satixS2v3),
DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
DDB_DEVID(0x0007, 0x0023, ddb_s2_48),
DDB_DEVID(0x0008, 0x0034, ddb_ct2_8),
DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8),
DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8),
DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8),
DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8),
DDB_DEVID(0x0006, 0x0039, ddb_ctv7),
DDB_DEVID(0x0011, 0x0040, ddb_ci),
DDB_DEVID(0x0011, 0x0041, ddb_cis),
DDB_DEVID(0x0012, 0x0042, ddb_ci),
DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro),
DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
DDB_DEVID(0x0201, 0x0001, ddb_mod),
DDB_DEVID(0x0201, 0x0002, ddb_mod),
DDB_DEVID(0x0203, 0x0001, ddb_mod),
DDB_DEVID(0x0210, 0x0001, ddb_mod_fsm_24),
DDB_DEVID(0x0210, 0x0002, ddb_mod_fsm_16),
DDB_DEVID(0x0210, 0x0003, ddb_mod_fsm_8),
DDB_DEVID(0x0220, 0x0001, ddb_sdr),
/* testing on OctopusNet Pro */
DDB_DEVID(0x0320, 0xffff, ddb_octopro_hdin),
DDB_DEVID(0x0321, 0xffff, ddb_none),
DDB_DEVID(0x0322, 0xffff, ddb_octopro),
DDB_DEVID(0x0323, 0xffff, ddb_none),
DDB_DEVID(0x0328, 0xffff, ddb_none),
DDB_DEVID(0x0329, 0xffff, ddb_octopro_hdin),
};
struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice)
{
int i;
for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
struct ddb_device_id *id = &ddb_device_ids[i];
if (vendor == id->vendor &&
device == id->device &&
subvendor == id->subvendor &&
((subdevice == id->subdevice) ||
id->subdevice == 0xffff))
return id->info;
}
return &ddb_none;
}

View File

@@ -516,7 +516,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
else else
ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN); ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN);
ddbwritel(dev, FSM_CONTROL_ENABLE, FSM_CONTROL); dev->link[0].info->port_num = MaxUsedChannels;
return status; return status;
} }
@@ -1497,6 +1497,12 @@ static int mod3_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
case MODULATOR_BASE_FREQUENCY: case MODULATOR_BASE_FREQUENCY:
return mod3_set_base_frequency(mod->port->dev, tvp->u.data); return mod3_set_base_frequency(mod->port->dev, tvp->u.data);
case MODULATOR_ATTENUATOR:
return mod_set_attenuator(mod->port->dev, tvp->u.data);
case MODULATOR_GAIN:
return mod_set_vga(mod->port->dev, tvp->u.data);
} }
return -EINVAL; return -EINVAL;
} }
@@ -1521,6 +1527,10 @@ static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
case MODULATOR_INPUT_BITRATE: case MODULATOR_INPUT_BITRATE:
return mod_set_ibitrate(mod, tvp->u.data); return mod_set_ibitrate(mod, tvp->u.data);
case MODULATOR_GAIN:
if (mod->port->dev->link[0].info->version == 2)
return mod_set_vga(mod->port->dev, tvp->u.data);
return -EINVAL;
} }
return 0; return 0;
} }
@@ -1626,7 +1636,6 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
pr_err("FSM setup failed!\n"); pr_err("FSM setup failed!\n");
return -1; return -1;
} }
for (i = 0; i < streams; i++) { for (i = 0; i < streams; i++) {
struct ddb_mod *mod = &dev->mod[i]; struct ddb_mod *mod = &dev->mod[i];
@@ -1635,13 +1644,6 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
mod_set_symbolrate(mod, 6900000); mod_set_symbolrate(mod, 6900000);
mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000); mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000);
} }
if (streams <= 8)
mod_set_vga(dev, RF_VGA_GAIN_N8);
else if (streams <= 16)
mod_set_vga(dev, RF_VGA_GAIN_N16);
else
mod_set_vga(dev, RF_VGA_GAIN_N24);
mod_set_attenuator(dev, 0); mod_set_attenuator(dev, 0);
return 0; return 0;
} }
@@ -1738,7 +1740,6 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
int streams = dev->link[0].info->port_num; int streams = dev->link[0].info->port_num;
int i, ret = 0; int i, ret = 0;
mod_set_vga(dev, 64);
ret = mod_setup_max2871(dev, max2871_sdr); ret = mod_setup_max2871(dev, max2871_sdr);
if (ret) if (ret)
pr_err("DDBridge: PLL setup failed\n"); pr_err("DDBridge: PLL setup failed\n");
@@ -1768,9 +1769,11 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
mod3_set_frequency(mod, Frequency + 7000000 * i); mod3_set_frequency(mod, Frequency + 7000000 * i);
ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i)); ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i));
ddbwritel(dev, 0x00001000, SDR_CHANNEL_FM1GAIN(i)); ddbwritel(dev, 0x00002000, SDR_CHANNEL_FM1GAIN(i));
ddbwritel(dev, 0x00000800, SDR_CHANNEL_FM2GAIN(i)); ddbwritel(dev, 0x00001000, SDR_CHANNEL_FM2GAIN(i));
} }
mod_set_attenuator(dev, 0);
mod_set_vga(dev, 64);
return ret; return ret;
} }

View File

@@ -29,34 +29,12 @@
#include "ddbridge.h" #include "ddbridge.h"
#include "ddbridge-regs.h" #include "ddbridge-regs.h"
static struct workqueue_struct *ddb_wq;
static int adapter_alloc;
module_param(adapter_alloc, int, 0444);
MODULE_PARM_DESC(adapter_alloc,
"0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
#ifdef CONFIG_PCI_MSI
static int msi = 1;
module_param(msi, int, 0444);
MODULE_PARM_DESC(msi,
" Control MSI interrupts: 0-disable, 1-enable (default)");
#endif
#include "ddbridge-core.c" #include "ddbridge-core.c"
/****************************************************************************/ /****************************************************************************/
/****************************************************************************/ /****************************************************************************/
/****************************************************************************/ /****************************************************************************/
static void ddb_unmap(struct ddb *dev)
{
if (dev->regs)
iounmap(dev->regs);
vfree(dev);
}
static void __devexit ddb_irq_disable(struct ddb *dev) static void __devexit ddb_irq_disable(struct ddb *dev)
{ {
if (dev->link[0].info->regmap->irq_version == 2) { if (dev->link[0].info->regmap->irq_version == 2) {
@@ -143,6 +121,7 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
pr_info("DDBridge: MSI not available.\n"); pr_info("DDBridge: MSI not available.\n");
#endif #endif
} }
#endif
return stat; return stat;
} }
@@ -214,9 +193,7 @@ static int __devinit ddb_irq_init(struct ddb *dev)
free_irq(dev->pdev->irq, dev); free_irq(dev->pdev->irq, dev);
return stat; return stat;
} }
} else } else {
#endif
{
#ifdef DDB_TEST_THREADED #ifdef DDB_TEST_THREADED
stat = request_threaded_irq(dev->pdev->irq, irq_handler, stat = request_threaded_irq(dev->pdev->irq, irq_handler,
irq_thread, irq_thread,
@@ -268,14 +245,11 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
dev->link[0].ids.vendor = id->vendor; dev->link[0].ids.vendor = id->vendor;
dev->link[0].ids.device = id->device; dev->link[0].ids.device = id->device;
dev->link[0].ids.subvendor = id->subvendor; dev->link[0].ids.subvendor = id->subvendor;
dev->link[0].ids.subdevice = id->subdevice; dev->link[0].ids.subdevice = pdev->subsystem_device;
dev->link[0].dev = dev; dev->link[0].dev = dev;
#ifdef NUM_IDS dev->link[0].info = get_ddb_info(id->vendor, id->device,
dev->link[0].info = ddb_infos[id->driver_data]; id->subvendor, pdev->subsystem_device);
#else
dev->link[0].info = (struct ddb_info *) id->driver_data;
#endif
pr_info("DDBridge: device name: %s\n", dev->link[0].info->name); pr_info("DDBridge: device name: %s\n", dev->link[0].info->name);
dev->regs_len = pci_resource_len(dev->pdev, 0); dev->regs_len = pci_resource_len(dev->pdev, 0);
@@ -308,8 +282,9 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
ddbwritel(dev, 0, DMA_BASE_WRITE); ddbwritel(dev, 0, DMA_BASE_WRITE);
if (dev->link[0].info->type == DDB_MOD) { if (dev->link[0].info->type == DDB_MOD) {
if (ddbreadl(dev, 0x1c) == 4) if (dev->link[0].info->version == 1)
dev->link[0].info->port_num = 4; if (ddbreadl(dev, 0x1c) == 4)
dev->link[0].info->port_num = 4;
} }
stat = ddb_irq_init(dev); stat = ddb_irq_init(dev);
@@ -337,280 +312,10 @@ fail:
/****************************************************************************/ /****************************************************************************/
/****************************************************************************/ /****************************************************************************/
static struct ddb_info ddb_none = { #define DDB_DEVICE_ANY(_device) { PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID) }
.type = DDB_NONE,
.name = "unknown Digital Devices PCIe card, install newer driver",
.regmap = &octopus_map,
};
static struct ddb_info ddb_octopus = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_octopusv3 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus V3 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_octopus_le = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus LE DVB adapter",
.regmap = &octopus_map,
.port_num = 2,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_octopus_oem = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus OEM",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.led_num = 1,
.fan_num = 1,
.temp_num = 1,
.temp_bus = 0,
};
static struct ddb_info ddb_octopus_mini = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Octopus Mini",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_v6 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V6 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
static struct ddb_info ddb_v6_5 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V6.5 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
};
static struct ddb_info ddb_v7a = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 2,
.board_control_2 = 4,
.ts_quirks = TS_QUIRK_REVERSED,
};
static struct ddb_info ddb_v7 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine S2 V7 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 2,
.board_control_2 = 4,
.ts_quirks = TS_QUIRK_REVERSED,
};
static struct ddb_info ddb_ctv7 = {
.type = DDB_OCTOPUS,
.name = "Digital Devices Cine CT V7 DVB adapter",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x0f,
.board_control = 3,
.board_control_2 = 4,
};
static struct ddb_info ddb_satixS2v3 = {
.type = DDB_OCTOPUS,
.name = "Mystique SaTiX-S2 V3 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
static struct ddb_info ddb_ci = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_cis = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI single",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x03,
};
static struct ddb_info ddb_ci_s2_pro = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI S2 Pro",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 2,
.board_control_2 = 4,
};
static struct ddb_info ddb_ci_s2_pro_a = {
.type = DDB_OCTOPUS_CI,
.name = "Digital Devices Octopus CI S2 Pro Advanced",
.regmap = &octopus_map,
.port_num = 4,
.i2c_mask = 0x01,
.board_control = 2,
.board_control_2 = 4,
};
static struct ddb_info ddb_dvbct = {
.type = DDB_OCTOPUS,
.name = "Digital Devices DVBCT V6.1 DVB adapter",
.regmap = &octopus_map,
.port_num = 3,
.i2c_mask = 0x07,
};
/****************************************************************************/
static struct ddb_info ddb_mod = {
.type = DDB_MOD,
.name = "Digital Devices DVB-C modulator",
.regmap = &octopus_mod_map,
.port_num = 10,
.temp_num = 1,
};
static struct ddb_info ddb_mod_fsm_24 = {
.type = DDB_MOD,
.version = 2,
.name = "Digital Devices DVB-C modulator FSM-24",
.regmap = &octopus_mod_2_map,
.port_num = 24,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_mod_fsm_16 = {
.type = DDB_MOD,
.version = 2,
.name = "Digital Devices DVB-C modulator FSM-16",
.regmap = &octopus_mod_2_map,
.port_num = 16,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_mod_fsm_8 = {
.type = DDB_MOD,
.name = "Digital Devices DVB-C modulator FSM-8",
.version = 2,
.regmap = &octopus_mod_2_map,
.port_num = 8,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_sdr = {
.type = DDB_MOD,
.name = "Digital Devices SDR",
.version = 3,
.regmap = &octopus_sdr_map,
.port_num = 16,
.temp_num = 1,
.tempmon_irq = 8,
};
static struct ddb_info ddb_octopro_hdin = {
.type = DDB_OCTOPRO_HDIN,
.name = "Digital Devices OctopusNet Pro HDIN",
.regmap = &octopro_hdin_map,
.port_num = 10,
.i2c_mask = 0x3ff,
.mdio_num = 1,
};
static struct ddb_info ddb_octopro = {
.type = DDB_OCTOPRO,
.name = "Digital Devices OctopusNet Pro",
.regmap = &octopro_map,
.port_num = 10,
.i2c_mask = 0x3ff,
.mdio_num = 1,
};
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
#define DDB_DEVICE(_device, _subdevice, _driver_data) { \
PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, _subdevice), \
.driver_data = (kernel_ulong_t) &_driver_data }
#define DDB_DEVICE_ANY(_device) { \
PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID), \
.driver_data = (kernel_ulong_t) &ddb_none }
static const struct pci_device_id ddb_id_table[] __devinitconst = { static const struct pci_device_id ddb_id_table[] __devinitconst = {
DDB_DEVICE(0x0002, 0x0001, ddb_octopus), DDB_DEVICE_ANY(0x0002),
DDB_DEVICE(0x0003, 0x0001, ddb_octopus),
DDB_DEVICE(0x0005, 0x0004, ddb_octopusv3),
DDB_DEVICE(0x0003, 0x0002, ddb_octopus_le),
DDB_DEVICE(0x0003, 0x0003, ddb_octopus_oem),
DDB_DEVICE(0x0003, 0x0010, ddb_octopus_mini),
DDB_DEVICE(0x0005, 0x0011, ddb_octopus_mini),
DDB_DEVICE(0x0003, 0x0020, ddb_v6),
DDB_DEVICE(0x0003, 0x0021, ddb_v6_5),
DDB_DEVICE(0x0006, 0x0022, ddb_v7),
DDB_DEVICE(0x0006, 0x0024, ddb_v7a),
DDB_DEVICE(0x0003, 0x0030, ddb_dvbct),
DDB_DEVICE(0x0003, 0xdb03, ddb_satixS2v3),
DDB_DEVICE(0x0006, 0x0031, ddb_ctv7),
DDB_DEVICE(0x0006, 0x0032, ddb_ctv7),
DDB_DEVICE(0x0006, 0x0033, ddb_ctv7),
DDB_DEVICE(0x0007, 0x0023, ddb_s2_48),
DDB_DEVICE(0x0008, 0x0034, ddb_ct2_8),
DDB_DEVICE(0x0008, 0x0035, ddb_c2t2_8),
DDB_DEVICE(0x0008, 0x0036, ddb_isdbt_8),
DDB_DEVICE(0x0008, 0x0037, ddb_c2t2i_v0_8),
DDB_DEVICE(0x0008, 0x0038, ddb_c2t2i_8),
DDB_DEVICE(0x0006, 0x0039, ddb_ctv7),
DDB_DEVICE(0x0011, 0x0040, ddb_ci),
DDB_DEVICE(0x0011, 0x0041, ddb_cis),
DDB_DEVICE(0x0012, 0x0042, ddb_ci),
DDB_DEVICE(0x0013, 0x0043, ddb_ci_s2_pro),
DDB_DEVICE(0x0013, 0x0044, ddb_ci_s2_pro_a),
DDB_DEVICE(0x0201, 0x0001, ddb_mod),
DDB_DEVICE(0x0201, 0x0002, ddb_mod),
DDB_DEVICE(0x0203, 0x0001, ddb_mod),
DDB_DEVICE(0x0210, 0x0001, ddb_mod_fsm_24),
DDB_DEVICE(0x0210, 0x0002, ddb_mod_fsm_16),
DDB_DEVICE(0x0210, 0x0003, ddb_mod_fsm_8),
DDB_DEVICE(0x0220, 0x0001, ddb_sdr),
/* testing on OctopusNet Pro */
DDB_DEVICE(0x0320, PCI_ANY_ID, ddb_octopro_hdin),
DDB_DEVICE(0x0321, PCI_ANY_ID, ddb_none),
DDB_DEVICE(0x0322, PCI_ANY_ID, ddb_octopro),
DDB_DEVICE(0x0323, PCI_ANY_ID, ddb_none),
DDB_DEVICE(0x0328, PCI_ANY_ID, ddb_none),
DDB_DEVICE(0x0329, PCI_ANY_ID, ddb_octopro_hdin),
/* in case sub-ids got deleted in flash */
DDB_DEVICE_ANY(0x0003), DDB_DEVICE_ANY(0x0003),
DDB_DEVICE_ANY(0x0005), DDB_DEVICE_ANY(0x0005),
DDB_DEVICE_ANY(0x0006), DDB_DEVICE_ANY(0x0006),

View File

@@ -748,6 +748,10 @@ void ddbridge_mod_rate_handler(unsigned long data);
int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len); int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
#define DDBRIDGE_VERSION "0.9.29" #define DDBRIDGE_VERSION "0.9.30"
/* linked functions */
struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice);
#endif #endif

View File

@@ -31,83 +31,8 @@
#include <linux/pci-dma-compat.h> #include <linux/pci-dma-compat.h>
#endif #endif
static int adapter_alloc = 3;
module_param(adapter_alloc, int, 0444);
MODULE_PARM_DESC(adapter_alloc,
"0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
#include "ddbridge-core.c" #include "ddbridge-core.c"
static struct ddb_regmap octopus_net_map = {
.irq_version = 1,
.irq_base_i2c = 0,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.input = &octopus_input,
.output = &octopus_output,
};
static struct ddb_regset octopus_gtl = {
.base = 0x180,
.num = 0x01,
.size = 0x20,
};
static struct ddb_regmap octopus_net_gtl = {
.irq_version = 1,
.irq_base_i2c = 0,
.irq_base_gtl = 10,
.i2c = &octopus_i2c,
.i2c_buf = &octopus_i2c_buf,
.input = &octopus_input,
.output = &octopus_output,
.gtl = &octopus_gtl,
};
static struct ddb_info ddb_octonet = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet network DVB adapter",
.regmap = &octopus_net_map,
.port_num = 4,
.i2c_mask = 0x0f,
.ns_num = 12,
.mdio_num = 1,
};
static struct ddb_info ddb_octonet_jse = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet network DVB adapter JSE",
.regmap = &octopus_net_map,
.port_num = 4,
.i2c_mask = 0x0f,
.ns_num = 15,
.mdio_num = 1,
};
static struct ddb_info ddb_octonet_gtl = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet GTL",
.regmap = &octopus_net_gtl,
.port_num = 4,
.i2c_mask = 0x05,
.ns_num = 12,
.mdio_num = 1,
.con_clock = 1,
};
static struct ddb_info ddb_octonet_tbd = {
.type = DDB_OCTONET,
.name = "Digital Devices OctopusNet",
.regmap = &octopus_net_map,
};
static void octonet_unmap(struct ddb *dev)
{
if (dev->regs)
iounmap(dev->regs);
vfree(dev);
}
static int __exit octonet_remove(struct platform_device *pdev) static int __exit octonet_remove(struct platform_device *pdev)
{ {
struct ddb *dev; struct ddb *dev;
@@ -125,7 +50,7 @@ static int __exit octonet_remove(struct platform_device *pdev)
free_irq(platform_get_irq(dev->pfdev, 0), dev); free_irq(platform_get_irq(dev->pfdev, 0), dev);
ddb_ports_release(dev); ddb_ports_release(dev);
octonet_unmap(dev); ddb_unmap(dev);
platform_set_drvdata(pdev, 0); platform_set_drvdata(pdev, 0);
return 0; return 0;
} }
@@ -168,6 +93,7 @@ static int __init octonet_probe(struct platform_device *pdev)
dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16; dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
dev->link[0].dev = dev; dev->link[0].dev = dev;
#if 0
if (dev->link[0].ids.devid == 0x0300dd01) if (dev->link[0].ids.devid == 0x0300dd01)
dev->link[0].info = &ddb_octonet; dev->link[0].info = &ddb_octonet;
else if (dev->link[0].ids.devid == 0x0301dd01) else if (dev->link[0].ids.devid == 0x0301dd01)
@@ -176,7 +102,11 @@ static int __init octonet_probe(struct platform_device *pdev)
dev->link[0].info = &ddb_octonet_gtl; dev->link[0].info = &ddb_octonet_gtl;
else else
dev->link[0].info = &ddb_octonet_tbd; dev->link[0].info = &ddb_octonet_tbd;
#else
dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
dev->link[0].ids.device,
0xdd01, 0xffff);
#endif
pr_info("DDBridge: HW %08x REGMAP %08x\n", pr_info("DDBridge: HW %08x REGMAP %08x\n",
dev->link[0].ids.hwid, dev->link[0].ids.regmapid); dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
pr_info("DDBridge: MAC %08x DEVID %08x\n", pr_info("DDBridge: MAC %08x DEVID %08x\n",
@@ -203,7 +133,7 @@ fail:
dev_err(dev->dev, "fail\n"); dev_err(dev->dev, "fail\n");
ddbwritel(dev, 0, ETHER_CONTROL); ddbwritel(dev, 0, ETHER_CONTROL);
ddbwritel(dev, 0, INTERRUPT_ENABLE); ddbwritel(dev, 0, INTERRUPT_ENABLE);
octonet_unmap(dev); ddb_unmap(dev);
platform_set_drvdata(pdev, 0); platform_set_drvdata(pdev, 0);
return -1; return -1;
} }
@@ -217,7 +147,7 @@ static const struct of_device_id octonet_dt_ids[] = {
MODULE_DEVICE_TABLE(of, octonet_dt_ids); MODULE_DEVICE_TABLE(of, octonet_dt_ids);
#endif #endif
static struct platform_driver octonet_driver = { static struct platform_driver octonet_driver __refdata = {
.remove = __exit_p(octonet_remove), .remove = __exit_p(octonet_remove),
.probe = octonet_probe, .probe = octonet_probe,
.driver = { .driver = {
@@ -258,4 +188,4 @@ module_exit(exit_octonet);
MODULE_DESCRIPTION("GPL"); MODULE_DESCRIPTION("GPL");
MODULE_AUTHOR("Marcus and Ralph Metzler, Metzler Brothers Systementwicklung GbR"); MODULE_AUTHOR("Marcus and Ralph Metzler, Metzler Brothers Systementwicklung GbR");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_VERSION("0.6"); MODULE_VERSION(DDBRIDGE_VERSION);

View File

@@ -768,7 +768,7 @@ static int dvb_ca_en50221_write_data(struct dvb_ca_private *ca, int slot, u8 * b
status = -EAGAIN; status = -EAGAIN;
goto exit; goto exit;
} }
#if 0
/* It may need some time for the CAM to settle down, or there might be a /* It may need some time for the CAM to settle down, or there might be a
race condition between the CAM, writing HC and our last check for DA. race condition between the CAM, writing HC and our last check for DA.
This happens, if the CAM asserts DA, just after checking DA before we This happens, if the CAM asserts DA, just after checking DA before we
@@ -786,7 +786,7 @@ static int dvb_ca_en50221_write_data(struct dvb_ca_private *ca, int slot, u8 * b
status = -EAGAIN; status = -EAGAIN;
goto exit; goto exit;
} }
#endif
/* send the amount of data */ /* send the amount of data */
if ((status = ca->pub->write_cam_control(ca->pub, slot, CTRLIF_SIZE_HIGH, bytes_write >> 8)) != 0) if ((status = ca->pub->write_cam_control(ca->pub, slot, CTRLIF_SIZE_HIGH, bytes_write >> 8)) != 0)
goto exit; goto exit;

View File

@@ -31,7 +31,12 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/string.h> #include <linux/string.h>
#include <linux/version.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0))
#include <asm/uaccess.h> #include <asm/uaccess.h>
#else
#include <linux/uaccess.h>
#endif
#include "dvb_ringbuffer.h" #include "dvb_ringbuffer.h"

View File

@@ -662,15 +662,19 @@ static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount) static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
{ {
struct cxd *ci = ca->data; struct cxd *ci = ca->data;
int status;
if (ci->write_busy) if (ci->write_busy)
return -EAGAIN; return -EAGAIN;
mutex_lock(&ci->lock); mutex_lock(&ci->lock);
write_reg(ci, 0x0d, ecount >> 8); write_reg(ci, 0x0d, ecount >> 8);
write_reg(ci, 0x0e, ecount & 0xff); write_reg(ci, 0x0e, ecount & 0xff);
write_block(ci, 0x11, ebuf, ecount); status = write_block(ci, 0x11, ebuf, ecount);
ci->write_busy = 1; if (!status)
ci->write_busy = 1;
mutex_unlock(&ci->lock); mutex_unlock(&ci->lock);
if (status)
return status;
return ecount; return ecount;
} }
#endif #endif

View File

@@ -673,6 +673,7 @@ static int GetBitErrorRateS(struct stv *state, u32 *BERNumerator,
static u32 DVBS2_nBCH(enum DVBS2_ModCod ModCod, enum DVBS2_FECType FECType) static u32 DVBS2_nBCH(enum DVBS2_ModCod ModCod, enum DVBS2_FECType FECType)
{ {
static u32 nBCH[][2] = { static u32 nBCH[][2] = {
{ 0, 0}, /* dummy */
{16200, 3240}, /* QPSK_1_4, */ {16200, 3240}, /* QPSK_1_4, */
{21600, 5400}, /* QPSK_1_3, */ {21600, 5400}, /* QPSK_1_3, */
{25920, 6480}, /* QPSK_2_5, */ {25920, 6480}, /* QPSK_2_5, */
@@ -705,7 +706,7 @@ static u32 DVBS2_nBCH(enum DVBS2_ModCod ModCod, enum DVBS2_FECType FECType)
if (ModCod >= DVBS2_QPSK_1_4 && if (ModCod >= DVBS2_QPSK_1_4 &&
ModCod <= DVBS2_32APSK_9_10 && FECType <= DVBS2_16K) ModCod <= DVBS2_32APSK_9_10 && FECType <= DVBS2_16K)
return nBCH[FECType][ModCod]; return nBCH[ModCod][FECType];
return 64800; return 64800;
} }
@@ -1534,13 +1535,13 @@ static int tune(struct dvb_frontend *fe, bool re_tune,
return r; return r;
state->tune_time = jiffies; state->tune_time = jiffies;
} }
if (*status & FE_HAS_LOCK)
return 0;
*delay = HZ;
r = read_status(fe, status); r = read_status(fe, status);
if (r) if (r)
return r; return r;
if (*status & FE_HAS_LOCK)
return 0;
*delay = HZ / 10;
return 0; return 0;
} }
@@ -1781,7 +1782,8 @@ static struct dvb_frontend_ops stv0910_ops = {
.caps = FE_CAN_INVERSION_AUTO | .caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_AUTO | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QPSK |
FE_CAN_2G_MODULATION FE_CAN_2G_MODULATION |
FE_CAN_MULTISTREAM,
}, },
.init = init, .init = init,
.sleep = sleep, .sleep = sleep,

View File

@@ -29,6 +29,7 @@ struct dvb_mod_channel_params {
#define MODULATOR_ATTENUATOR 32 #define MODULATOR_ATTENUATOR 32
#define MODULATOR_INPUT_BITRATE 33 /* Hz */ #define MODULATOR_INPUT_BITRATE 33 /* Hz */
#define MODULATOR_PCR_MODE 34 /* 1=pcr correction enabled */ #define MODULATOR_PCR_MODE 34 /* 1=pcr correction enabled */
#define MODULATOR_GAIN 35
#define MODULATOR_OUTPUT_ARI 64 #define MODULATOR_OUTPUT_ARI 64
#endif /*_UAPI_DVBMOD_H_*/ #endif /*_UAPI_DVBMOD_H_*/