bump version to 0.9.32

- check for number of FSM modulator channels before allocating ports

apps/Makefile

@@ -1,4 +1,4 @@
-all: cit citin flashprog modt ddtest setmod ddflash setmod2
+all: cit citin flashprog modt ddtest setmod ddflash setmod2 pls
 
 cit: cit.c
 	$(CC) -o cit cit.c -lpthread
@@ -20,3 +20,6 @@ ddtest: ddtest.c
 
 ddflash: ddflash.c
 	$(CC) -o ddflash ddflash.c
+
+pls: pls.c
+	$(CC) -o pls pls.c

apps/octonet/ddtest.c

@@ -1319,6 +1319,120 @@ int read_id(int dev, int argc, char* argv[], uint32_t Flags)
 
 }
 
+int i2cread(int dev, int argc, char* argv[], uint32_t Flags)
+{
+	uint8_t BusNumber     = 0;
+	uint8_t DeviceAddress = 0;
+	int i;
+	uint32_t tmp;
+	char *p;
+	uint32_t BufferLength;
+	uint32_t ReadLen;
+	uint8_t *Buffer;
+	int Repeat = (Flags & REPEAT_FLAG) != 0;
+	int Silent = (Flags & SILENT_FLAG) != 0;
+	
+	if (argc < 2)
+		return -1;
+	
+	tmp = strtoul(argv[0],&p,16);
+	if (tmp > 255)
+		return -1;
+	
+	if (*p == ':') {
+		BusNumber = (uint8_t) (tmp - 1);
+		tmp = strtoul(&p[1],NULL,16);
+	}
+	if (tmp > 255 || BusNumber > 3)
+		return -1;
+	
+	DeviceAddress = (uint8_t) tmp;
+	BufferLength = (argc-2);
+	ReadLen = strtoul(argv[argc-1],NULL,0);
+	if (ReadLen > BufferLength)
+		BufferLength = ReadLen ;
+	
+	printf(" BufferLength = %d tmp = %d\n", BufferLength, ReadLen);
+	Buffer = malloc(BufferLength);
+	
+	for (i = 1; i < (argc-1); i += 1 ) {
+		tmp = strtoul(argv[i],NULL,16);
+		if (tmp > 255) {
+			free(Buffer);
+			return -1;
+		}
+		Buffer[i-1] = (uint8_t) tmp;
+	}
+	
+	do {
+		int hr = i2c_read(dev, BusNumber, DeviceAddress, Buffer, argc-2, Buffer, ReadLen);
+		if (hr < 0) {
+			printf("ioctl error\n");
+			free(Buffer);
+			return 0;
+		}
+		if (!Silent) {
+			printf("OK\n");
+			Dump(&Buffer[0],0,ReadLen);
+		}
+	} while (Repeat);
+	free(Buffer);
+	return 0;
+}
+
+int i2cwrite(int dev, int argc, char* argv[], uint32_t Flags)
+{
+    uint8_t BusNumber     = 0;
+    uint8_t DeviceAddress = 0;
+    uint32_t tmp;
+    char *p;
+    uint8_t *Buffer;
+    int i;
+    int Repeat = (Flags & REPEAT_FLAG) != 0;
+    int Silent = (Flags & SILENT_FLAG) != 0;
+
+    
+    if( argc < 1 )
+		return -1;
+    tmp = strtoul(argv[0],&p,16);
+    if( tmp > 255 )
+	    return -1;
+
+    if (*p == ':') {
+	    BusNumber = (uint8_t) (tmp - 1);
+	    tmp = strtoul(&p[1],NULL,16);
+    }
+    if( tmp > 255 || BusNumber > 3)
+	    return -1;
+
+    DeviceAddress = (uint8_t) tmp;
+    Buffer = malloc(argc - 1);
+
+    for (i = 1; i < argc; i += 1)  {
+        tmp = strtoul(argv[i],NULL,16);
+        if (tmp > 255 ) {
+		free(Buffer);
+		return -1;
+        }
+        Buffer[i-1] = (uint8_t) tmp;
+    }
+
+    do {
+	    int hr =i2c_write(dev, BusNumber,DeviceAddress,NULL,0,Buffer,argc-1);
+	    if (hr < 0) {
+		    printf("ioctl error\n");
+		    free(Buffer);
+		    return 0;
+	    }
+	    if( !Silent )
+		    printf("OK\n");
+    } while( Repeat );
+
+    free(Buffer);
+    return 0;
+}
+
+
 struct SCommand CommandTable[] = 
 {
 	{ "memread",    ReadDeviceMemory,   1,   "Read Device Memory   : memread <start> <count>" },
@@ -1343,6 +1457,8 @@ struct SCommand CommandTable[] =
 	{ "licexport",   lic_export,       1,   "License Export           : licexport" },
 	{ "licerase",    lic_erase,        1,   "License Erase            : licerase"  },
 	{ "read_id",    read_id,        1,      "Read Unique ID           : read_id"  },
+	{ "i2cread",    i2cread,        1,     "I2C Read : I2CRead  <[BusNumber:]DeviceAddress> [<write data>..] <read count>" },
+	{ "i2write",    i2cwrite,        1,    "I2C Write            : I2CWrite <[BusNumber:]DeviceAddress> [<write data>..]"},
  	{ NULL,NULL,0 }
 };
 

apps/pls.c

@@ -0,0 +1,167 @@
+/*
+ * pls.c: Convert between Gold and Root Codes for DVB-S2 PLS
+ *
+ * Copyright (C) 2017 Marcus Metzler <mocm@metzlerbros.de>
+ *                    Ralph Metzler <rjkm@metzlerbros.de>
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <stdio.h>
+#include <ctype.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <getopt.h>
+#include <stdio.h>
+#include <stdint.h>
+
+/* According to ETSI EN 302 307 5.5.4 the PLS (Physical Layer
+   Scrambling) for DVB-S2 consists of a complex randomization
+   sequence which is ultimately derived from two recursively
+   defined m-sequences  (=MLS or maximum length sequences)
+   x(i) and y(i) of polynomials over GF(2) with m=18
+   (thus their length is 2^18 - 1).
+   These m-sequences with sequence y starting from y(0) and
+   sequence x starting from x(n) are combined to form a set
+   of 2^18 - 1 different Gold code sequences.
+
+   This starting number n of sequence x selects which
+   of those 2^18 - 1 Gold code sequences to use.
+   As a DVB-S2 tuning parameter n is called the scrambling sequence index 
+   (cf. ETSI EN 300 468 table 41) or Gold sequence index,
+   commonly also just called "Gold code".
+   The 18 values of the sequence x starting from x(n)
+   (x(n) ... x(n+17)) are also called the "Root code".
+   So, Gold and Root codes are not different ways of PLS, they are
+   just different ways to select the same sequence start point.
+     
+   The initial values for x(i), i=0..18 are x(0)=1, x(1)=0, .., x(17)=0 .  
+   The polynomial used for the x sequence recursion is 1+x^7+x^18.
+   If the lower 18 bits of a variable "uint32_t X" contain x(n) ... x(n+17),
+   then we can simply calculate x(n+1) ... x(n+18) by doing:
+   X = (((X ^ (X >> 7)) & 1) << 17) | (X >> 1);
+  
+   So, if X contained the "Root code" corresponding to "Gold code" n,
+   it will now contain the "Root code" corresponding to "Gold code" (n+1).
+   Note that X=0 and n=2^18 - 1 do not exist (or rather the lattter is the same
+   as n = 0) and for n=0 to 2^18 - 2 and X=1 to 2^18 - 1 there is a
+   one-to-one correspondence (bijection).
+
+   Note that PLS has nothing to do with encryption for DRM purposes. It is used
+   to minimize interference between transponders.
+
+
+   "Combo code":
+   There is no such thing as a combo code. It is the result of a bug in older
+   STV090x drivers which resulted in a crazy race condition between a Gold->Root
+   conversion in the STV and an ongoing I2C write. 
+   Better forget about it and determine the proper Root or Gold code.
+      
+ */
+
+
+static uint32_t gold2root(uint32_t gold)
+{
+	uint32_t x, g;
+	
+	for (g = 0, x = 1; g < gold; g++)
+		x = (((x ^ (x >> 7)) & 1) << 17) | (x >> 1);
+	return x;
+}
+
+static uint32_t root2gold(uint32_t root)
+{
+	uint32_t x, g;
+	
+	for (g = 0, x = 1; g < 0x3ffff; g++)  {
+		if (root == x)
+			return g;
+		x = (((x ^ (x >> 7)) & 1) << 17) | (x >> 1);
+	}
+	return 0xffffffff;
+}
+
+int main(int argc, char **argv)
+{
+	uint32_t gold = 0xffffffff, root = 0xffffffff;
+	
+	while (1) {
+                int option_index = 0;
+		int c;
+                static struct option long_options[] = {
+			{"gold", required_argument, 0, 'g'},
+			{"root", required_argument, 0, 'r'},
+			{"help", no_argument , 0, 'h'},
+			{0, 0, 0, 0}
+		};
+                c = getopt_long(argc, argv, 
+				"r:g:h",
+				long_options, &option_index);
+		if (c==-1)
+ 			break;
+		
+		switch (c) {
+		case 'g':
+			gold = strtoul(optarg, NULL, 0);
+			break;
+		case 'r':
+			root = strtoul(optarg, NULL, 0);
+			break;
+		case 'h':
+			printf("pls -g gold_code\n");
+			printf("or\n");
+			printf("pls -r root_code\n");
+			exit(-1);
+		default:
+			break;
+			
+		}
+	}
+	if (optind < argc) {
+		printf("Warning: unused arguments\n");
+	}
+	if (gold != 0xffffffff && root != 0xffffffff) {
+		printf("Only specify root or gold code\n");
+		exit(-1);
+	};
+	if (gold != 0xffffffff) {
+		if (gold < 0x3ffff) {
+			root = gold2root(gold);
+			printf("gold = %llu (0x%05x)   root = %llu (0x%05x)\n",
+			       gold, gold, root, root);
+		} else
+			printf("Invalid gold code specified.\n");
+		exit(0);
+	} 
+	if (root != 0xffffffff) {
+		if (root > 0 && root < 0x40000)
+			gold = root2gold(root);
+		if (gold != 0xffffffff)
+			printf("gold = %llu (0x%05x)   root = %llu (0x%05x)\n",
+			       gold, gold, root, root);
+		else
+			printf("Invalid root code specified.\n");
+		exit(0);
+	}
+	printf("Specify either root or gold code with -r or -g.\n");
+}

ddbridge/Kbuild

@@ -1,5 +1,8 @@
 EXTRA_CFLAGS += -DCONFIG_DVB_CXD2843 -DCONFIG_DVB_LNBP21 -DCONFIG_DVB_STV090x -DCONFIG_DVB_STV6110x -DCONFIG_DVB_DRXK -DCONFIG_DVB_STV0910 -DCONFIG_DVB_STV6111 -DCONFIG_DVB_LNBH25 -DCONFIG_DVB_MXL5XX
 
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
+
 obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
 obj-$(CONFIG_DVB_OCTONET) += octonet.o
 

ddbridge/Kconfig

@@ -0,0 +1,46 @@
+
+config DVB_DDBRIDGE
+	tristate "Digital Devices bridge support"
+	depends on MEDIA_PCI_SUPPORT && DVB_CORE && PCI && I2C
+	select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV6110x if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_DRXK if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_TDA18271C2DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_TDA18212DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV0367DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_CXD2099 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_CXD2843 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_MXL5XX if MEDIA_SUBDRV_AUTOSELECT
+	---help---
+	  Support for cards with the Digital Devices PCI express bridge:
+	  - Octopus PCIe Bridge
+	  - Octopus mini PCIe Bridge
+	  - Octopus LE
+	  - DuoFlex S2 Octopus
+	  - DuoFlex CT Octopus
+	  - cineS2(v6)
+
+	  Say Y if you own such a card and want to use it.
+
+
+config DVB_OCTONET
+       tristate "Digital Devices octonet support"
+	depends on MEDIA_DIGITAL_TV_SUPPORT && DVB_CORE && I2C
+	select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV6110x if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_DRXK if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_TDA18271C2DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_TDA18212DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV0367DD if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_CXD2099 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_CXD2843 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV0910 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_STV6111 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_LNBH25 if MEDIA_SUBDRV_AUTOSELECT
+	select DVB_MXL5XX if MEDIA_SUBDRV_AUTOSELECT
+	---help---
+	  Support for OctopusNet
+
+	  Say Y if you own such a card and want to use it.

ddbridge/Makefile

@@ -1,19 +1,14 @@
-KDIR	?= /lib/modules/$(shell uname -r)/build
-PWD	:= $(shell pwd)
+#
+# Makefile for the ddbridge device driver
+#
 
-MODDEFS := CONFIG_DVB_DDBRIDGE=m
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
 
-all:
-	$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) $(MODDEFS) modules
-	$(MAKE) -C apps
-
-dep:
-	DIR=`pwd`; (cd $(TOPDIR); make SUBDIRS=$$DIR dep)
-
-install: all
-	$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules_install
-
-clean:
-	rm -rf */*.o */*.ko */*.mod.c */.*.cmd .tmp_versions Module* modules*
+obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
+obj-$(CONFIG_DVB_OCTONET) += octonet.o
 
+ccflags-y += -Idrivers/media/dvb-core/
+ccflags-y += -Idrivers/media/dvb-frontends/
+ccflags-y += -Idrivers/media/tuners/
 

ddbridge/Makefile.kernel

@@ -0,0 +1,14 @@
+#
+# Makefile for the ddbridge device driver
+#
+
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
+
+obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
+obj-$(CONFIG_DVB_OCTONET) += octonet.o
+
+ccflags-y += -Idrivers/media/dvb-core/
+ccflags-y += -Idrivers/media/dvb-frontends/
+ccflags-y += -Idrivers/media/tuners/
+

ddbridge/ddbridge-ci.c

@@ -0,0 +1,350 @@
+/*
+ * ddbridge-ci.c: Digital Devices bridge and DuoFlex CI driver
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ddbridge.h"
+#include "ddbridge-io.h"
+#include "ddbridge-i2c.h"
+
+/* Octopus CI internal CI interface */
+
+static int wait_ci_ready(struct ddb_ci *ci)
+{
+	u32 count = 10;
+
+	ndelay(500);
+	do {
+		if (ddbreadl(ci->port->dev,
+			     CI_CONTROL(ci->nr)) & CI_READY)
+			break;
+		usleep_range(1, 2);
+		if ((--count) == 0)
+			return -1;
+	} while (1);
+	return 0;
+}
+
+static int read_attribute_mem(struct dvb_ca_en50221 *ca,
+			      int slot, int address)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val, off = (address >> 1) & (CI_BUFFER_SIZE - 1);
+
+	if (address > CI_BUFFER_SIZE)
+		return -1;
+	ddbwritel(ci->port->dev, CI_READ_CMD | (1 << 16) | address,
+		  CI_DO_READ_ATTRIBUTES(ci->nr));
+	wait_ci_ready(ci);
+	val = 0xff & ddbreadl(ci->port->dev, CI_BUFFER(ci->nr) + off);
+	return val;
+}
+
+static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
+			       int address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
+		  CI_DO_ATTRIBUTE_RW(ci->nr));
+	wait_ci_ready(ci);
+	return 0;
+}
+
+static int read_cam_control(struct dvb_ca_en50221 *ca,
+			    int slot, u8 address)
+{
+	u32 count = 100;
+	struct ddb_ci *ci = ca->data;
+	u32 res;
+
+	ddbwritel(ci->port->dev, CI_READ_CMD | address,
+		  CI_DO_IO_RW(ci->nr));
+	ndelay(500);
+	do {
+		res = ddbreadl(ci->port->dev, CI_READDATA(ci->nr));
+		if (res & CI_READY)
+			break;
+		usleep_range(1, 2);
+		if ((--count) == 0)
+			return -1;
+	} while (1);
+	return 0xff & res;
+}
+
+static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
+			     u8 address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
+		  CI_DO_IO_RW(ci->nr));
+	wait_ci_ready(ci);
+	return 0;
+}
+
+static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_POWER_ON,
+		  CI_CONTROL(ci->nr));
+	msleep(100);
+	ddbwritel(ci->port->dev, CI_POWER_ON | CI_RESET_CAM,
+		  CI_CONTROL(ci->nr));
+	ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
+		  CI_CONTROL(ci->nr));
+	usleep_range(20, 25);
+	ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
+		  CI_CONTROL(ci->nr));
+	return 0;
+}
+
+static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, 0, CI_CONTROL(ci->nr));
+	msleep(300);
+	return 0;
+}
+
+static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
+
+	ddbwritel(ci->port->dev, val | CI_BYPASS_DISABLE,
+		  CI_CONTROL(ci->nr));
+	return 0;
+}
+
+static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
+	int stat = 0;
+
+	if (val & CI_CAM_DETECT)
+		stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
+	if (val & CI_CAM_READY)
+		stat |= DVB_CA_EN50221_POLL_CAM_READY;
+	return stat;
+}
+
+static struct dvb_ca_en50221 en_templ = {
+	.read_attribute_mem  = read_attribute_mem,
+	.write_attribute_mem = write_attribute_mem,
+	.read_cam_control    = read_cam_control,
+	.write_cam_control   = write_cam_control,
+	.slot_reset          = slot_reset,
+	.slot_shutdown       = slot_shutdown,
+	.slot_ts_enable      = slot_ts_enable,
+	.poll_slot_status    = poll_slot_status,
+};
+
+static void ci_attach(struct ddb_port *port)
+{
+	struct ddb_ci *ci = 0;
+
+	ci = kzalloc(sizeof(*ci), GFP_KERNEL);
+	if (!ci)
+		return;
+	memcpy(&ci->en, &en_templ, sizeof(en_templ));
+	ci->en.data = ci;
+	port->en = &ci->en;
+	ci->port = port;
+	ci->nr = port->nr - 2;
+}
+
+/* DuoFlex Dual CI support */
+
+static int write_creg(struct ddb_ci *ci, u8 data, u8 mask)
+{
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	ci->port->creg = (ci->port->creg & ~mask) | data;
+	return i2c_write_reg(i2c, adr, 0x02, ci->port->creg);
+}
+
+static int read_attribute_mem_xo2(struct dvb_ca_en50221 *ca,
+				  int slot, int address)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	int res;
+	u8 val;
+
+	res = i2c_read_reg16(i2c, adr, 0x8000 | address, &val);
+	return res ? res : val;
+}
+
+static int write_attribute_mem_xo2(struct dvb_ca_en50221 *ca, int slot,
+				   int address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	return i2c_write_reg16(i2c, adr, 0x8000 | address, value);
+}
+
+static int read_cam_control_xo2(struct dvb_ca_en50221 *ca,
+				int slot, u8 address)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	u8 val;
+	int res;
+
+	res = i2c_read_reg(i2c, adr, 0x20 | (address & 3), &val);
+	return res ? res : val;
+}
+
+static int write_cam_control_xo2(struct dvb_ca_en50221 *ca, int slot,
+				 u8 address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	return i2c_write_reg(i2c, adr, 0x20 | (address & 3), value);
+}
+
+static int slot_reset_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	write_creg(ci, 0x01, 0x01);
+	write_creg(ci, 0x04, 0x04);
+	msleep(20);
+	write_creg(ci, 0x02, 0x02);
+	write_creg(ci, 0x00, 0x04);
+	write_creg(ci, 0x18, 0x18);
+	return 0;
+}
+
+static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	/*i2c_write_reg(i2c, adr, 0x03, 0x60);*/
+	/*i2c_write_reg(i2c, adr, 0x00, 0xc0);*/
+	write_creg(ci, 0x10, 0xff);
+	write_creg(ci, 0x08, 0x08);
+	return 0;
+}
+
+static int slot_ts_enable_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	write_creg(ci, 0x00, 0x10);
+	return 0;
+}
+
+static int poll_slot_status_xo2(struct dvb_ca_en50221 *ca, int slot, int open)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	u8 val = 0;
+	int stat = 0;
+
+	i2c_read_reg(i2c, adr, 0x01, &val);
+
+	if (val & 2)
+		stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
+	if (val & 1)
+		stat |= DVB_CA_EN50221_POLL_CAM_READY;
+	return stat;
+}
+
+static struct dvb_ca_en50221 en_xo2_templ = {
+	.read_attribute_mem  = read_attribute_mem_xo2,
+	.write_attribute_mem = write_attribute_mem_xo2,
+	.read_cam_control    = read_cam_control_xo2,
+	.write_cam_control   = write_cam_control_xo2,
+	.slot_reset          = slot_reset_xo2,
+	.slot_shutdown       = slot_shutdown_xo2,
+	.slot_ts_enable      = slot_ts_enable_xo2,
+	.poll_slot_status    = poll_slot_status_xo2,
+};
+
+static void ci_xo2_attach(struct ddb_port *port)
+{
+	struct ddb_ci *ci = 0;
+	struct i2c_adapter *i2c;
+
+	ci = kzalloc(sizeof(*ci), GFP_KERNEL);
+	if (!ci)
+		return;
+	memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ));
+	ci->en.data = ci;
+	port->en = &ci->en;
+	ci->port = port;
+	ci->nr = port->nr - 2;
+	ci->port->creg = 0;
+	i2c = &ci->port->i2c->adap;
+	write_creg(ci, 0x10, 0xff);
+	write_creg(ci, 0x08, 0x08);
+}
+
+static struct cxd2099_cfg cxd_cfg = {
+	.bitrate =  72000,
+	.adr     =  0x40,
+	.polarity = 1,
+	.clock_mode = 1,
+	.max_i2c = 512,
+};
+
+int ddb_ci_attach(struct ddb_port *port, u32 bitrate)
+{
+	switch (port->type) {
+	case DDB_CI_EXTERNAL_SONY:
+		cxd_cfg.bitrate = bitrate;
+		port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap,
+				    port->en, 0, 1);
+		break;
+
+	case DDB_CI_EXTERNAL_XO2:
+	case DDB_CI_EXTERNAL_XO2_B:
+		ci_xo2_attach(port);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
+		break;
+		
+	case DDB_CI_INTERNAL:
+		ci_attach(port);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
+		break;
+	}
+	return 0;
+}

ddbridge/ddbridge-hw.c

@@ -1,5 +1,5 @@
 /*
- * ddbridge.c: Digital Devices PCIe bridge driver
+ * ddbridge-hw.c: Digital Devices device information tables
  *
  * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Ralph Metzler <rjkm@metzlerbros.de>
@@ -18,10 +18,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -30,19 +28,19 @@
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_regset octopus_mod_odma = {
+static const struct ddb_regset octopus_mod_odma = {
 	.base = 0x300,
 	.num  = 0x0a,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_mod_odma_buf = {
+static const struct ddb_regset octopus_mod_odma_buf = {
 	.base = 0x2000,
 	.num  = 0x0a,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_mod_channel = {
+static const struct ddb_regset octopus_mod_channel = {
 	.base = 0x400,
 	.num  = 0x0a,
 	.size = 0x40,
@@ -50,25 +48,25 @@ static struct ddb_regset octopus_mod_channel = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopus_mod_2_odma = {
+static const struct ddb_regset octopus_mod_2_odma = {
 	.base = 0x400,
 	.num  = 0x18,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_mod_2_odma_buf = {
+static const struct ddb_regset octopus_mod_2_odma_buf = {
 	.base = 0x8000,
 	.num  = 0x18,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_mod_2_channel = {
+static const struct ddb_regset octopus_mod_2_channel = {
 	.base = 0x800,
 	.num  = 0x18,
 	.size = 0x40,
 };
 
-static struct ddb_regset octopus_sdr_output = {
+static const struct ddb_regset octopus_sdr_output = {
 	.base = 0x240,
 	.num  = 0x14,
 	.size = 0x10,
@@ -76,49 +74,49 @@ static struct ddb_regset octopus_sdr_output = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopus_input = {
+static const struct ddb_regset octopus_input = {
 	.base = 0x200,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_output = {
+static const struct ddb_regset octopus_output = {
 	.base = 0x280,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_idma = {
+static const struct ddb_regset octopus_idma = {
 	.base = 0x300,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_idma_buf = {
+static const struct ddb_regset octopus_idma_buf = {
 	.base = 0x2000,
 	.num  = 0x08,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_odma = {
+static const struct ddb_regset octopus_odma = {
 	.base = 0x380,
 	.num  = 0x04,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_odma_buf = {
+static const struct ddb_regset octopus_odma_buf = {
 	.base = 0x2800,
 	.num  = 0x04,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_i2c = {
+static const struct ddb_regset octopus_i2c = {
 	.base = 0x80,
 	.num  = 0x04,
 	.size = 0x20,
 };
 
-static struct ddb_regset octopus_i2c_buf = {
+static const struct ddb_regset octopus_i2c_buf = {
 	.base = 0x1000,
 	.num  = 0x04,
 	.size = 0x200,
@@ -126,55 +124,55 @@ static struct ddb_regset octopus_i2c_buf = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopro_input = {
+static const struct ddb_regset octopro_input = {
 	.base = 0x400,
 	.num  = 0x14,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_output = {
+static const struct ddb_regset octopro_output = {
 	.base = 0x600,
 	.num  = 0x0a,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_idma = {
+static const struct ddb_regset octopro_idma = {
 	.base = 0x800,
 	.num  = 0x40,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_idma_buf = {
+static const struct ddb_regset octopro_idma_buf = {
 	.base = 0x4000,
 	.num  = 0x40,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopro_odma = {
+static const struct ddb_regset octopro_odma = {
 	.base = 0xc00,
 	.num  = 0x20,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_odma_buf = {
+static const struct ddb_regset octopro_odma_buf = {
 	.base = 0x8000,
 	.num  = 0x20,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopro_i2c = {
+static const struct ddb_regset octopro_i2c = {
 	.base = 0x200,
 	.num  = 0x0a,
 	.size = 0x20,
 };
 
-static struct ddb_regset octopro_i2c_buf = {
+static const struct ddb_regset octopro_i2c_buf = {
 	.base = 0x2000,
 	.num  = 0x0a,
 	.size = 0x200,
 };
 
-static struct ddb_regset octopro_gtl = {
+static const struct ddb_regset octopro_gtl = {
 	.base = 0xe00,
 	.num  = 0x03,
 	.size = 0x40,
@@ -183,8 +181,7 @@ static struct ddb_regset octopro_gtl = {
 /****************************************************************************/
 /****************************************************************************/
 
-
-static struct ddb_regmap octopus_map = {
+static const struct ddb_regmap octopus_map = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.irq_base_idma = 8,
@@ -199,7 +196,7 @@ static struct ddb_regmap octopus_map = {
 	.output = &octopus_output,
 };
 
-static struct ddb_regmap octopro_map = {
+static const struct ddb_regmap octopro_map = {
 	.irq_version = 2,
 	.irq_base_i2c = 32,
 	.irq_base_idma = 64,
@@ -216,7 +213,7 @@ static struct ddb_regmap octopro_map = {
 	.gtl = &octopro_gtl,
 };
 
-static struct ddb_regmap octopro_hdin_map = {
+static const struct ddb_regmap octopro_hdin_map = {
 	.irq_version = 2,
 	.irq_base_i2c = 32,
 	.irq_base_idma = 64,
@@ -231,7 +228,7 @@ static struct ddb_regmap octopro_hdin_map = {
 	.output = &octopro_output,
 };
 
-static struct ddb_regmap octopus_mod_map = {
+static const struct ddb_regmap octopus_mod_map = {
 	.irq_version = 1,
 	.irq_base_odma = 8,
 	.irq_base_rate = 18,
@@ -241,7 +238,7 @@ static struct ddb_regmap octopus_mod_map = {
 	.channel = &octopus_mod_channel,
 };
 
-static struct ddb_regmap octopus_mod_2_map = {
+static const struct ddb_regmap octopus_mod_2_map = {
 	.irq_version = 2,
 	.irq_base_odma = 64,
 	.irq_base_rate = 32,
@@ -251,7 +248,7 @@ static struct ddb_regmap octopus_mod_2_map = {
 	.channel = &octopus_mod_2_channel,
 };
 
-static struct ddb_regmap octopus_sdr_map = {
+static const struct ddb_regmap octopus_sdr_map = {
 	.irq_version = 2,
 	.irq_base_odma = 64,
 	.irq_base_rate = 32,
@@ -261,17 +258,16 @@ static struct ddb_regmap octopus_sdr_map = {
 	.channel = &octopus_mod_2_channel,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_info ddb_none = {
+static const struct ddb_info ddb_none = {
 	.type     = DDB_NONE,
 	.name     = "unknown Digital Devices device, install newer driver",
 	.regmap   = &octopus_map,
 };
 
-static struct ddb_info ddb_octopus = {
+static const struct ddb_info ddb_octopus = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus DVB adapter",
 	.regmap   = &octopus_map,
@@ -279,7 +275,7 @@ static struct ddb_info ddb_octopus = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_octopusv3 = {
+static const struct ddb_info ddb_octopusv3 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus V3 DVB adapter",
 	.regmap   = &octopus_map,
@@ -287,7 +283,7 @@ static struct ddb_info ddb_octopusv3 = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_octopus_le = {
+static const struct ddb_info ddb_octopus_le = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus LE DVB adapter",
 	.regmap   = &octopus_map,
@@ -295,7 +291,7 @@ static struct ddb_info ddb_octopus_le = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_octopus_oem = {
+static const struct ddb_info ddb_octopus_oem = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus OEM",
 	.regmap   = &octopus_map,
@@ -307,7 +303,7 @@ static struct ddb_info ddb_octopus_oem = {
 	.temp_bus = 0,
 };
 
-static struct ddb_info ddb_octopus_mini = {
+static const struct ddb_info ddb_octopus_mini = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus Mini",
 	.regmap   = &octopus_map,
@@ -315,7 +311,7 @@ static struct ddb_info ddb_octopus_mini = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_v6 = {
+static const struct ddb_info ddb_v6 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V6 DVB adapter",
 	.regmap   = &octopus_map,
@@ -323,7 +319,7 @@ static struct ddb_info ddb_v6 = {
 	.i2c_mask = 0x07,
 };
 
-static struct ddb_info ddb_v6_5 = {
+static const struct ddb_info ddb_v6_5 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V6.5 DVB adapter",
 	.regmap   = &octopus_map,
@@ -331,7 +327,7 @@ static struct ddb_info ddb_v6_5 = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_v7a = {
+static const struct ddb_info ddb_v7a = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V7 Advanced DVB adapter",
 	.regmap   = &octopus_map,
@@ -342,7 +338,7 @@ static struct ddb_info ddb_v7a = {
 	.ts_quirks = TS_QUIRK_REVERSED,
 };
 
-static struct ddb_info ddb_v7 = {
+static const struct ddb_info ddb_v7 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V7 DVB adapter",
 	.regmap   = &octopus_map,
@@ -353,7 +349,7 @@ static struct ddb_info ddb_v7 = {
 	.ts_quirks = TS_QUIRK_REVERSED,
 };
 
-static struct ddb_info ddb_ctv7 = {
+static const struct ddb_info ddb_ctv7 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine CT V7 DVB adapter",
 	.regmap   = &octopus_map,
@@ -363,7 +359,7 @@ static struct ddb_info ddb_ctv7 = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_satixS2v3 = {
+static const struct ddb_info ddb_satixs2v3 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Mystique SaTiX-S2 V3 DVB adapter",
 	.regmap   = &octopus_map,
@@ -371,7 +367,7 @@ static struct ddb_info ddb_satixS2v3 = {
 	.i2c_mask = 0x07,
 };
 
-static struct ddb_info ddb_ci = {
+static const struct ddb_info ddb_ci = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI",
 	.regmap   = &octopus_map,
@@ -379,7 +375,7 @@ static struct ddb_info ddb_ci = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_cis = {
+static const struct ddb_info ddb_cis = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI single",
 	.regmap   = &octopus_map,
@@ -387,7 +383,7 @@ static struct ddb_info ddb_cis = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_ci_s2_pro = {
+static const struct ddb_info ddb_ci_s2_pro = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI S2 Pro",
 	.regmap   = &octopus_map,
@@ -397,7 +393,7 @@ static struct ddb_info ddb_ci_s2_pro = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_ci_s2_pro_a = {
+static const struct ddb_info ddb_ci_s2_pro_a = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI S2 Pro Advanced",
 	.regmap   = &octopus_map,
@@ -407,7 +403,7 @@ static struct ddb_info ddb_ci_s2_pro_a = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_dvbct = {
+static const struct ddb_info ddb_dvbct = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices DVBCT V6.1 DVB adapter",
 	.regmap   = &octopus_map,
@@ -417,7 +413,7 @@ static struct ddb_info ddb_dvbct = {
 
 /****************************************************************************/
 
-static struct ddb_info ddb_mod = {
+static const struct ddb_info ddb_mod = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices DVB-C modulator",
 	.regmap   = &octopus_mod_map,
@@ -425,7 +421,15 @@ static struct ddb_info ddb_mod = {
 	.temp_num = 1,
 };
 
-static struct ddb_info ddb_mod_fsm_24 = {
+static const struct ddb_info ddb_mod_4 = {
+	.type     = DDB_MOD,
+	.name     = "Digital Devices DVB-C modulator",
+	.regmap   = &octopus_mod_map,
+	.port_num = 4,
+	.temp_num = 1,
+};
+
+static const struct ddb_info ddb_mod_fsm_24 = {
 	.type     = DDB_MOD,
 	.version  = 2,
 	.name     = "Digital Devices DVB-C modulator FSM-24",
@@ -435,7 +439,7 @@ static struct ddb_info ddb_mod_fsm_24 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_mod_fsm_16 = {
+static const struct ddb_info ddb_mod_fsm_16 = {
 	.type     = DDB_MOD,
 	.version  = 2,
 	.name     = "Digital Devices DVB-C modulator FSM-16",
@@ -445,7 +449,7 @@ static struct ddb_info ddb_mod_fsm_16 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_mod_fsm_8 = {
+static const struct ddb_info ddb_mod_fsm_8 = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices DVB-C modulator FSM-8",
 	.version  = 2,
@@ -455,7 +459,17 @@ static struct ddb_info ddb_mod_fsm_8 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_sdr = {
+static const struct ddb_info ddb_mod_fsm_4 = {
+	.type     = DDB_MOD,
+	.name     = "Digital Devices DVB-C modulator FSM-8",
+	.version  = 2,
+	.regmap   = &octopus_mod_2_map,
+	.port_num = 4,
+	.temp_num = 1,
+	.tempmon_irq = 8,
+};
+
+static const struct ddb_info ddb_sdr = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices SDR",
 	.version  = 3,
@@ -465,7 +479,7 @@ static struct ddb_info ddb_sdr = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_octopro_hdin = {
+static const struct ddb_info ddb_octopro_hdin = {
 	.type     = DDB_OCTOPRO_HDIN,
 	.name     = "Digital Devices OctopusNet Pro HDIN",
 	.regmap   = &octopro_hdin_map,
@@ -474,7 +488,7 @@ static struct ddb_info ddb_octopro_hdin = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octopro = {
+static const struct ddb_info ddb_octopro = {
 	.type     = DDB_OCTOPRO,
 	.name     = "Digital Devices OctopusNet Pro",
 	.regmap   = &octopro_map,
@@ -483,8 +497,7 @@ static struct ddb_info ddb_octopro = {
 	.mdio_num = 1,
 };
 
-
-static struct ddb_info ddb_s2_48 = {
+static const struct ddb_info ddb_s2_48 = {
 	.type     = DDB_OCTOPUS_MAX,
 	.name     = "Digital Devices MAX S8 4/8",
 	.regmap   = &octopus_map,
@@ -494,7 +507,7 @@ static struct ddb_info ddb_s2_48 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_ct2_8 = {
+static const struct ddb_info ddb_ct2_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 CT2",
 	.regmap   = &octopus_map,
@@ -506,7 +519,7 @@ static struct ddb_info ddb_ct2_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2_8 = {
+static const struct ddb_info ddb_c2t2_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2",
 	.regmap   = &octopus_map,
@@ -518,7 +531,7 @@ static struct ddb_info ddb_c2t2_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_isdbt_8 = {
+static const struct ddb_info ddb_isdbt_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 ISDBT",
 	.regmap   = &octopus_map,
@@ -530,7 +543,7 @@ static struct ddb_info ddb_isdbt_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2i_v0_8 = {
+static const struct ddb_info ddb_c2t2i_v0_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2I V0",
 	.regmap   = &octopus_map,
@@ -542,7 +555,7 @@ static struct ddb_info ddb_c2t2i_v0_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2i_8 = {
+static const struct ddb_info ddb_c2t2i_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2I",
 	.regmap   = &octopus_map,
@@ -554,11 +567,10 @@ static struct ddb_info ddb_c2t2i_8 = {
 	.tempmon_irq = 24,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_regmap octopus_net_map = {
+static const struct ddb_regmap octopus_net_map = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.i2c = &octopus_i2c,
@@ -567,14 +579,13 @@ static struct ddb_regmap octopus_net_map = {
 	.output = &octopus_output,
 };
 
-
-static struct ddb_regset octopus_gtl = {
+static const struct ddb_regset octopus_gtl = {
 	.base = 0x180,
 	.num  = 0x01,
 	.size = 0x20,
 };
 
-static struct ddb_regmap octopus_net_gtl = {
+static const struct ddb_regmap octopus_net_gtl = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.irq_base_gtl = 10,
@@ -585,7 +596,7 @@ static struct ddb_regmap octopus_net_gtl = {
 	.gtl = &octopus_gtl,
 };
 
-static struct ddb_info ddb_octonet = {
+static const struct ddb_info ddb_octonet = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet network DVB adapter",
 	.regmap   = &octopus_net_map,
@@ -595,7 +606,7 @@ static struct ddb_info ddb_octonet = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octonet_jse = {
+static const struct ddb_info ddb_octonet_jse = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet network DVB adapter JSE",
 	.regmap   = &octopus_net_map,
@@ -605,7 +616,7 @@ static struct ddb_info ddb_octonet_jse = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octonet_gtl = {
+static const struct ddb_info ddb_octonet_gtl = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet GTL",
 	.regmap   = &octopus_net_gtl,
@@ -616,7 +627,6 @@ static struct ddb_info ddb_octonet_gtl = {
 	.con_clock = 1,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 /****************************************************************************/
@@ -626,7 +636,7 @@ struct ddb_device_id {
 	u16 device;
 	u16 subvendor;
 	u16 subdevice;
-	struct ddb_info *info;
+	const struct ddb_info *info;
 };
 
 #define DDB_DEVID(_device, _subdevice, _info) { \
@@ -634,9 +644,9 @@ struct ddb_device_id {
 		.device = _device, \
 		.subvendor = 0xdd01, \
 		.subdevice = _subdevice, \
-		.info = &_info }
+		.info = &(_info) }
 
-static struct ddb_device_id ddb_device_ids[] = {
+static const struct ddb_device_id ddb_device_ids[] = {
 	/* OctopusNet */
 	DDB_DEVID(0x0300, 0xffff, ddb_octonet),
 	DDB_DEVID(0x0301, 0xffff, ddb_octonet_jse),
@@ -654,7 +664,7 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0006, 0x0022, ddb_v7),
 	DDB_DEVID(0x0006, 0x0024, ddb_v7a),
 	DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
-	DDB_DEVID(0x0003, 0xdb03, ddb_satixS2v3),
+	DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
 	DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
 	DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
 	DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
@@ -672,7 +682,9 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
 	DDB_DEVID(0x0201, 0x0001, ddb_mod),
 	DDB_DEVID(0x0201, 0x0002, ddb_mod),
+	DDB_DEVID(0x0201, 0x0004, ddb_mod_4),  /* dummy entry ! */
 	DDB_DEVID(0x0203, 0x0001, ddb_mod),
+	DDB_DEVID(0x0210, 0x0000, ddb_mod_fsm_4), /* dummy entry ! */
 	DDB_DEVID(0x0210, 0x0001, ddb_mod_fsm_24),
 	DDB_DEVID(0x0210, 0x0002, ddb_mod_fsm_16),
 	DDB_DEVID(0x0210, 0x0003, ddb_mod_fsm_8),
@@ -686,17 +698,18 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0329, 0xffff, ddb_octopro_hdin),
 };
 
-struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice)
+const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
+				    u16 subvendor, u16 subdevice)
 {
 	int i;
-
+	
 	for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
-		struct ddb_device_id *id  = &ddb_device_ids[i];
+		const struct ddb_device_id *id = &ddb_device_ids[i];
 		
 		if (vendor == id->vendor &&
 		    device == id->device &&
-		    subvendor == id->subvendor && 
-		    ((subdevice == id->subdevice) ||
+		    subvendor == id->subvendor &&
+		    (subdevice == id->subdevice ||
 		     id->subdevice == 0xffff))
 			return id->info;
 	}

ddbridge/ddbridge-i2c.c

@@ -17,93 +17,12 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
-static int i2c_io(struct i2c_adapter *adapter, u8 adr,
-		  u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
-{
-	struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
-				   .buf  = wbuf, .len   = wlen },
-				  {.addr = adr,  .flags = I2C_M_RD,
-				   .buf  = rbuf,  .len   = rlen } };
-	return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
-}
-
-static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
-{
-	struct i2c_msg msg = {.addr = adr, .flags = 0,
-			      .buf = data, .len = len};
-
-	return (i2c_transfer(adap, &msg, 1) == 1) ? 0 : -1;
-}
-
-static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
-{
-	struct i2c_msg msgs[1] = {{.addr = adr,  .flags = I2C_M_RD,
-				   .buf  = val,  .len   = 1 } };
-	return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
-}
-
-static int i2c_read_regs(struct i2c_adapter *adapter,
-			 u8 adr, u8 reg, u8 *val, u8 len)
-{
-	struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
-				   .buf  = &reg, .len   = 1 },
-				  {.addr = adr,  .flags = I2C_M_RD,
-				   .buf  = val,  .len   = len } };
-	return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
-}
-
-static int i2c_read_regs16(struct i2c_adapter *adapter,
-			   u8 adr, u16 reg, u8 *val, u8 len)
-{
-	u8 reg16[2] = { reg >> 8, reg };
-	struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
-				   .buf  = reg16, .len   = 2 },
-				  {.addr = adr,  .flags = I2C_M_RD,
-				   .buf  = val,  .len   = len } };
-	return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
-}
-
-static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val)
-{
-	struct i2c_msg msgs[2] = {{.addr = adr,  .flags = 0,
-				   .buf  = &reg, .len   = 1},
-				  {.addr = adr,  .flags = I2C_M_RD,
-				   .buf  = val,  .len   = 1 } };
-	return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
-}
-
-static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
-			  u16 reg, u8 *val)
-{
-	u8 msg[2] = {reg >> 8, reg & 0xff};
-	struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
-				   .buf  = msg, .len   = 2},
-				  {.addr = adr, .flags = I2C_M_RD,
-				   .buf  = val, .len   = 1 } };
-	return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
-}
-
-static int i2c_write_reg16(struct i2c_adapter *adap, u8 adr,
-			   u16 reg, u8 val)
-{
-	u8 msg[3] = {reg >> 8, reg & 0xff, val};
-
-	return i2c_write(adap, adr, msg, 3);
-}
-
-static int i2c_write_reg(struct i2c_adapter *adap, u8 adr,
-			 u8 reg, u8 val)
-{
-	u8 msg[2] = {reg, val};
-
-	return i2c_write(adap, adr, msg, 2);
-}
+#include "ddbridge.h"
+#include "ddbridge-io.h"
 
 static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
 {
@@ -115,8 +34,8 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
 	stat = wait_for_completion_timeout(&i2c->completion, HZ);
 	val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
 	if (stat == 0) {
-		pr_err("DDBridge: I2C timeout, card %d, port %d, link %u\n",
-		       dev->nr, i2c->nr, i2c->link);
+		dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
+			dev->nr, i2c->nr, i2c->link);
 #if 1
 		{
 			u32 istat = ddbreadl(dev, INTERRUPT_STATUS);
@@ -152,7 +71,7 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
 static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
 			       struct i2c_msg msg[], int num)
 {
-	struct ddb_i2c *i2c = (struct ddb_i2c *) i2c_get_adapdata(adapter);
+	struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
 	struct ddb *dev = i2c->dev;
 	u8 addr = 0;
 
@@ -207,7 +126,7 @@ struct i2c_algorithm ddb_i2c_algo = {
 	.functionality = ddb_i2c_functionality,
 };
 
-static void ddb_i2c_release(struct ddb *dev)
+void ddb_i2c_release(struct ddb *dev)
 {
 	int i;
 	struct ddb_i2c *i2c;
@@ -220,13 +139,14 @@ static void ddb_i2c_release(struct ddb *dev)
 
 static void i2c_handler(unsigned long priv)
 {
-	struct ddb_i2c *i2c = (struct ddb_i2c *) priv;
+	struct ddb_i2c *i2c = (struct ddb_i2c *)priv;
 
 	complete(&i2c->completion);
 }
 
 static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
-		       struct ddb_regmap *regmap, int link, int i, int num)
+		       const struct ddb_regmap *regmap,
+		       int link, int i, int num)
 {
 	struct i2c_adapter *adap;
 
@@ -246,7 +166,7 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
 	adap = &i2c->adap;
 	i2c_set_adapdata(adap, i2c);
 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
-	adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
+	adap->class = I2C_ADAP_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
 #else
 #ifdef I2C_CLASS_TV_ANALOG
 	adap->class = I2C_CLASS_TV_ANALOG;
@@ -255,18 +175,18 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
 	snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
 		 dev->nr, i2c->link, i);
 	adap->algo = &ddb_i2c_algo;
-	adap->algo_data = (void *) i2c;
+	adap->algo_data = (void *)i2c;
 	adap->dev.parent = dev->dev;
 	return i2c_add_adapter(adap);
 }
 
-static int ddb_i2c_init(struct ddb *dev)
+int ddb_i2c_init(struct ddb *dev)
 {
 	int stat = 0;
 	u32 i, j, num = 0, l, base;
 	struct ddb_i2c *i2c;
 	struct i2c_adapter *adap;
-	struct ddb_regmap *regmap;
+	const struct ddb_regmap *regmap;
 
 	for (l = 0; l < DDB_MAX_LINK; l++) {
 		if (!dev->link[l].info)
@@ -279,7 +199,7 @@ static int ddb_i2c_init(struct ddb *dev)
 			if (!(dev->link[l].info->i2c_mask & (1 << i)))
 				continue;
 			i2c = &dev->i2c[num];
-			dev->handler_data[l][i + base] = (unsigned long) i2c;
+			dev->handler_data[l][i + base] = (unsigned long)i2c;
 			dev->handler[l][i + base] = i2c_handler;
 			stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
 			if (stat)
@@ -293,8 +213,9 @@ static int ddb_i2c_init(struct ddb *dev)
 			adap = &i2c->adap;
 			i2c_del_adapter(adap);
 		}
-	} else
+	} else {
 		dev->i2c_num = num;
+	}
 	return stat;
 }
 

ddbridge/ddbridge-i2c.h

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
 #ifndef _DDBRIDGE_I2C_H_

ddbridge/ddbridge-io.c

@@ -0,0 +1,178 @@
+/*
+ * ddbridge-io.c: Digital Devices bridge I/O functions
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ddbridge.h"
+#include "ddbridge-io.h"
+
+u32 ddblreadl(struct ddb_link *link, u32 adr)
+{
+	if (unlikely(link->nr)) {
+		unsigned long flags;
+		u32 val;
+
+		spin_lock_irqsave(&link->lock, flags);
+		gtlw(link);
+		ddbwritel0(link, adr & 0xfffc, link->regs + 0x14);
+		ddbwritel0(link, 3, link->regs + 0x10);
+		gtlw(link);
+		val = ddbreadl0(link, link->regs + 0x1c);
+		spin_unlock_irqrestore(&link->lock, flags);
+		return val;
+	}
+	return readl((char *)(link->dev->regs + (adr)));
+}
+
+void ddblwritel(struct ddb_link *link, u32 val, u32 adr)
+{
+	if (unlikely(link->nr)) {
+		unsigned long flags;
+
+		spin_lock_irqsave(&link->lock, flags);
+		gtlw(link);
+		ddbwritel0(link, 0xf0000 | (adr & 0xfffc), link->regs + 0x14);
+		ddbwritel0(link, val, link->regs + 0x18);
+		ddbwritel0(link, 1, link->regs + 0x10);
+		spin_unlock_irqrestore(&link->lock, flags);
+		return;
+	}
+	writel(val, (char *)(link->dev->regs + (adr)));
+}
+
+u32 ddbreadl(struct ddb *dev, u32 adr)
+{
+	if (unlikely(adr & 0xf0000000)) {
+		unsigned long flags;
+		u32 val, l = (adr >> DDB_LINK_SHIFT);
+		struct ddb_link *link = &dev->link[l];
+
+		spin_lock_irqsave(&link->lock, flags);
+		gtlw(link);
+		ddbwritel0(link, adr & 0xfffc, link->regs + 0x14);
+		ddbwritel0(link, 3, link->regs + 0x10);
+		gtlw(link);
+		val = ddbreadl0(link, link->regs + 0x1c);
+		spin_unlock_irqrestore(&link->lock, flags);
+		return val;
+	}
+	return readl((char *)(dev->regs + (adr)));
+}
+
+void ddbwritel(struct ddb *dev, u32 val, u32 adr)
+{
+	if (unlikely(adr & 0xf0000000)) {
+		unsigned long flags;
+		u32 l = (adr >> DDB_LINK_SHIFT);
+		struct ddb_link *link = &dev->link[l];
+
+		spin_lock_irqsave(&link->lock, flags);
+		gtlw(link);
+		ddbwritel0(link, 0xf0000 | (adr & 0xfffc), link->regs + 0x14);
+		ddbwritel0(link, val, link->regs + 0x18);
+		ddbwritel0(link, 1, link->regs + 0x10);
+		spin_unlock_irqrestore(&link->lock, flags);
+		return;
+	}
+	writel(val, (char *)(dev->regs + (adr)));
+}
+
+void gtlcpyto(struct ddb *dev, u32 adr, const u8 *buf,
+	      unsigned int count)
+{
+	u32 val = 0, p = adr;
+	u32 aa = p & 3;
+
+	if (aa) {
+		while (p & 3 && count) {
+			val >>= 8;
+			val |= *buf << 24;
+			p++;
+			buf++;
+			count--;
+		}
+		ddbwritel(dev, val, adr);
+	}
+	while (count >= 4) {
+		val = buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24);
+		ddbwritel(dev, val, p);
+		p += 4;
+		buf += 4;
+		count -= 4;
+	}
+	if (count) {
+		val = buf[0];
+		if (count > 1)
+			val |= buf[1] << 8;
+		if (count > 2)
+			val |= buf[2] << 16;
+		ddbwritel(dev, val, p);
+	}
+}
+
+void gtlcpyfrom(struct ddb *dev, u8 *buf, u32 adr, long count)
+{
+	u32 val = 0, p = adr;
+	u32 a = p & 3;
+
+	if (a) {
+		val = ddbreadl(dev, p) >> (8 * a);
+		while (p & 3 && count) {
+			*buf = val & 0xff;
+			val >>= 8;
+			p++;
+			buf++;
+			count--;
+		}
+	}
+	while (count >= 4) {
+		val = ddbreadl(dev, p);
+		buf[0] = val & 0xff;
+		buf[1] = (val >> 8) & 0xff;
+		buf[2] = (val >> 16) & 0xff;
+		buf[3] = (val >> 24) & 0xff;
+		p += 4;
+		buf += 4;
+		count -= 4;
+	}
+	if (count) {
+		val = ddbreadl(dev, p);
+		buf[0] = val & 0xff;
+		if (count > 1)
+			buf[1] = (val >> 8) & 0xff;
+		if (count > 2)
+			buf[2] = (val >> 16) & 0xff;
+	}
+}
+
+void ddbcpyto(struct ddb *dev, u32 adr, void *src, long count)
+{
+	if (unlikely(adr & 0xf0000000))
+		return gtlcpyto(dev, adr, src, count);
+	return memcpy_toio((char *)(dev->regs + adr), src, count);
+}
+
+void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
+{
+	if (unlikely(adr & 0xf0000000))
+		return gtlcpyfrom(dev, dst, adr, count);
+	return memcpy_fromio(dst, (char *)(dev->regs + adr), count);
+}

ddbridge/ddbridge-io.h

@@ -0,0 +1,87 @@
+/*
+ * ddbridge-io.h: Digital Devices bridge I/O functions
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef _DDBRIDGE_IO_H_
+#define _DDBRIDGE_IO_H_
+
+u32 ddblreadl(struct ddb_link *link, u32 adr);
+void ddblwritel(struct ddb_link *link, u32 val, u32 adr);
+u32 ddbreadl(struct ddb *dev, u32 adr);
+void ddbwritel(struct ddb *dev, u32 val, u32 adr);
+void gtlcpyto(struct ddb *dev, u32 adr, const u8 *buf,
+	      unsigned int count);
+void gtlcpyfrom(struct ddb *dev, u8 *buf, u32 adr, long count);
+void ddbcpyto(struct ddb *dev, u32 adr, void *src, long count);
+void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count);
+
+static inline void ddbwriteb(struct ddb *dev, u32 val, u32 adr)
+{
+	writeb(val, (char *)(dev->regs + (adr)));
+}
+
+static inline u32 ddbreadb(struct ddb *dev, u32 adr)
+{
+	return readb((char *)(dev->regs + (adr)));
+}
+
+static inline void ddbwritel0(struct ddb_link *link, u32 val, u32 adr)
+{
+	writel(val, (char *)(link->dev->regs + (adr)));
+}
+
+static inline u32 ddbreadl0(struct ddb_link *link, u32 adr)
+{
+	return readl((char *)(link->dev->regs + (adr)));
+}
+
+#if 0
+static inline void gtlw(struct ddb_link *link)
+{
+	u32 count = 0;
+	static u32 max;
+
+	while (1 & ddbreadl0(link, link->regs + 0x10)) {
+		if (++count == 1024) {
+			pr_info("LTO\n");
+			break;
+		}
+	}
+	if (count > max) {
+		max = count;
+		pr_info("TO=%u\n", max);
+	}
+	if (ddbreadl0(link, link->regs + 0x10) & 0x8000)
+		pr_err("link error\n");
+}
+#else
+static inline void gtlw(struct ddb_link *link)
+{
+	while (1 & ddbreadl0(link, link->regs + 0x10))
+		;
+}
+#endif
+
+#define ddbmemset(_dev, _adr, _val, _count) \
+	memset_io((char *)((_dev)->regs + (_adr)), (_val), (_count))
+
+#endif

ddbridge/ddbridge-main.c

@@ -18,18 +18,20 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
-
-#define DDB_USE_WORK
-/*#define DDB_TEST_THREADED*/
-
 #include "ddbridge.h"
-#include "ddbridge-regs.h"
-#include "ddbridge-core.c"
+#include "ddbridge-io.h"
+
+#ifdef CONFIG_PCI_MSI
+static int msi = 1;
+module_param(msi, int, 0444);
+MODULE_PARM_DESC(msi,
+		 " Control MSI interrupts: 0-disable, 1-enable (default)");
+#endif
+
+extern struct workqueue_struct *ddb_wq;
 
 /****************************************************************************/
 /****************************************************************************/
@@ -66,7 +68,7 @@ static void __devexit ddb_irq_exit(struct ddb *dev)
 
 static void __devexit ddb_remove(struct pci_dev *pdev)
 {
-	struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev);
+	struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev);
 
 	ddb_device_destroy(dev);
 	ddb_nsd_detach(dev);
@@ -84,7 +86,7 @@ static void __devexit ddb_remove(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+#if (KERNEL_VERSION(3, 8, 0) < LINUX_VERSION_CODE)
 #define __devinit
 #define __devinitdata
 #endif
@@ -95,33 +97,33 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 
 #ifdef CONFIG_PCI_MSI
 	if (msi && pci_msi_enabled()) {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#if (KERNEL_VERSION(3, 15, 0) < LINUX_VERSION_CODE)
+#if (KERNEL_VERSION(4, 11, 0) < LINUX_VERSION_CODE)
 		stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI);
 #else
 		stat = pci_enable_msi_range(dev->pdev, 1, nr);
 #endif
 		if (stat >= 1) {
 			dev->msi = stat;
-			pr_info("DDBridge: using %d MSI interrupt(s)\n",
-				dev->msi);
-		} else
-			pr_info("DDBridge: MSI not available.\n");
-
+			dev_info(dev->dev, "using %d MSI interrupt(s)\n",
+				 dev->msi);
+		} else {
+			dev_info(dev->dev, "MSI not available.\n");
+		}
 #else
 		stat = pci_enable_msi_block(dev->pdev, nr);
 		if (stat == 0) {
 			dev->msi = nr;
-			pr_info("DDBridge: using %d MSI interrupts\n", nr);
+			dev_info(dev->dev, "using %d MSI interrupts\n", nr);
 		} else if (stat == 1) {
 			stat = pci_enable_msi(dev->pdev);
 			dev->msi = 1;
 		}
 		if (stat < 0)
-			pr_info("DDBridge: MSI not available.\n");
+			dev_info(dev->dev, "MSI not available.\n");
 #endif
 	}
-#endif	
+#endif
 	return stat;
 }
 
@@ -130,7 +132,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 	int stat;
 	int irq_flag = IRQF_SHARED;
 
-	pr_info("DDBridge: init type 2 IRQ hardware block\n");
+	dev_info(dev->dev, "init type 2 IRQ hardware block\n");
 
 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_CONTROL);
 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_1);
@@ -145,8 +147,8 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 	if (dev->msi)
 		irq_flag = 0;
 
-	stat = request_irq(dev->pdev->irq, irq_handler_v2,
-			   irq_flag, "ddbridge", (void *) dev);
+	stat = request_irq(dev->pdev->irq, ddb_irq_handler_v2,
+			   irq_flag, "ddbridge", (void *)dev);
 	if (stat < 0)
 		return stat;
 
@@ -183,25 +185,25 @@ static int __devinit ddb_irq_init(struct ddb *dev)
 	if (dev->msi)
 		irq_flag = 0;
 	if (dev->msi == 2) {
-		stat = request_irq(dev->pdev->irq, irq_handler0,
-				   irq_flag, "ddbridge", (void *) dev);
+		stat = request_irq(dev->pdev->irq, ddb_irq_handler0,
+				   irq_flag, "ddbridge", (void *)dev);
 		if (stat < 0)
 			return stat;
-		stat = request_irq(dev->pdev->irq + 1, irq_handler1,
-				   irq_flag, "ddbridge", (void *) dev);
+		stat = request_irq(dev->pdev->irq + 1, ddb_irq_handler1,
+				   irq_flag, "ddbridge", (void *)dev);
 		if (stat < 0) {
 			free_irq(dev->pdev->irq, dev);
 			return stat;
 		}
 	} else {
 #ifdef DDB_TEST_THREADED
-		stat = request_threaded_irq(dev->pdev->irq, irq_handler,
+		stat = request_threaded_irq(dev->pdev->irq, ddb_irq_handler,
 					    irq_thread,
 					    irq_flag,
-					    "ddbridge", (void *) dev);
+					    "ddbridge", (void *)dev);
 #else
-		stat = request_irq(dev->pdev->irq, irq_handler,
-				   irq_flag, "ddbridge", (void *) dev);
+		stat = request_irq(dev->pdev->irq, ddb_irq_handler,
+				   irq_flag, "ddbridge", (void *)dev);
 #endif
 		if (stat < 0)
 			return stat;
@@ -232,8 +234,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
 			return -ENODEV;
 
-	dev = vzalloc(sizeof(struct ddb));
-	if (dev == NULL)
+	dev = vzalloc(sizeof(*dev));
+	if (!dev)
 		return -ENOMEM;
 
 	mutex_init(&dev->mutex);
@@ -246,23 +248,23 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	dev->link[0].ids.device = id->device;
 	dev->link[0].ids.subvendor = id->subvendor;
 	dev->link[0].ids.subdevice = pdev->subsystem_device;
-	
+
 	dev->link[0].dev = dev;
 	dev->link[0].info = get_ddb_info(id->vendor, id->device,
 					 id->subvendor, pdev->subsystem_device);
-	pr_info("DDBridge: device name: %s\n", dev->link[0].info->name);
+	dev_info(dev->dev, "device name: %s\n", dev->link[0].info->name);
 
 	dev->regs_len = pci_resource_len(dev->pdev, 0);
 	dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
 			    pci_resource_len(dev->pdev, 0));
 
 	if (!dev->regs) {
-		pr_err("DDBridge: not enough memory for register map\n");
+		dev_err(dev->dev, "not enough memory for register map\n");
 		stat = -ENOMEM;
 		goto fail;
 	}
 	if (ddbreadl(dev, 0) == 0xffffffff) {
-		pr_err("DDBridge: cannot read registers\n");
+		dev_err(dev->dev, "cannot read registers\n");
 		stat = -ENODEV;
 		goto fail;
 	}
@@ -270,8 +272,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	dev->link[0].ids.hwid = ddbreadl(dev, 0);
 	dev->link[0].ids.regmapid = ddbreadl(dev, 4);
 
-	pr_info("DDBridge: HW %08x REGMAP %08x\n",
-		dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
+	dev_info(dev->dev, "HW %08x REGMAP %08x\n",
+		 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
 
 	if (dev->link[0].info->ns_num) {
 		ddbwritel(dev, 0, ETHER_CONTROL);
@@ -281,12 +283,33 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	if (dev->link[0].info->type != DDB_MOD)
 		ddbwritel(dev, 0, DMA_BASE_WRITE);
 
-	if (dev->link[0].info->type == DDB_MOD) {
-		if (dev->link[0].info->version == 1)
-			if (ddbreadl(dev, 0x1c) == 4)
-				dev->link[0].info->port_num = 4;
+	if (dev->link[0].info->type == DDB_MOD
+	    && dev->link[0].info->version <= 1) {
+		if (ddbreadl(dev, 0x1c) == 4)
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0201, 0xdd01, 0x0004);
+	}
+	if (dev->link[0].info->type == DDB_MOD
+	    && dev->link[0].info->version == 2) {
+		u32 lic = ddbreadl(dev, 0x1c) & 7;
+		
+		switch (lic) {
+		case 0: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0000);
+			break;
+		case 1: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0003);
+			break;
+		case 3: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0002);
+			break;
+		default:
+			break;
+		}
 	}
-
 	stat = ddb_irq_init(dev);
 	if (stat < 0)
 		goto fail0;
@@ -296,11 +319,11 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 
 	ddb_irq_exit(dev);
 fail0:
-	pr_err("DDBridge: fail0\n");
+	dev_err(dev->dev, "fail0\n");
 	if (dev->msi)
 		pci_disable_msi(dev->pdev);
 fail:
-	pr_err("DDBridge: fail\n");
+	dev_err(dev->dev, "fail\n");
 
 	ddb_unmap(dev);
 	pci_set_drvdata(pdev, NULL);
@@ -312,7 +335,8 @@ fail:
 /****************************************************************************/
 /****************************************************************************/
 
-#define DDB_DEVICE_ANY(_device) { PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID) }
+#define DDB_DEVICE_ANY(_device) \
+	{ PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID) }
 
 static const struct pci_device_id ddb_id_table[] __devinitconst = {
 	DDB_DEVICE_ANY(0x0002),
@@ -349,13 +373,13 @@ static __init int module_init_ddbridge(void)
 {
 	int stat = -1;
 
-	pr_info("DDBridge: Digital Devices PCIE bridge driver "
+	pr_info("Digital Devices PCIE bridge driver "
 		DDBRIDGE_VERSION
 		", Copyright (C) 2010-17 Digital Devices GmbH\n");
 	if (ddb_class_create() < 0)
 		return -1;
 	ddb_wq = create_workqueue("ddbridge");
-	if (ddb_wq == NULL)
+	if (!ddb_wq)
 		goto exit1;
 	stat = pci_register_driver(&ddb_pci_driver);
 	if (stat < 0)

ddbridge/ddbridge-max.c

@@ -0,0 +1,444 @@
+/*
+ * ddbridge-max.c: Digital Devices MAX card line support functions
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ddbridge.h"
+#include "ddbridge-io.h"
+#include "ddbridge-i2c.h"
+
+/* MAX LNB interface related module parameters */
+
+static int fmode;
+module_param(fmode, int, 0444);
+MODULE_PARM_DESC(fmode, "frontend emulation mode");
+
+static int fmode_sat = -1;
+module_param(fmode_sat, int, 0444);
+MODULE_PARM_DESC(fmode_sat, "set frontend emulation mode sat");
+
+static int old_quattro;
+module_param(old_quattro, int, 0444);
+MODULE_PARM_DESC(old_quattro, "old quattro LNB input order ");
+
+/* MAX LNB interface related functions */
+
+static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd)
+{
+	u32 c, v = 0, tag = DDB_LINK_TAG(link);
+
+	v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb));
+	ddbwritel(dev, cmd | v, tag | LNB_CONTROL(lnb));
+	for (c = 0; c < 10; c++) {
+		v = ddbreadl(dev, tag | LNB_CONTROL(lnb));
+		if ((v & LNB_BUSY) == 0)
+			break;
+		msleep(20);
+	}
+	if (c == 10)
+		dev_info(dev->dev,
+			 "%s lnb = %08x  cmd = %08x\n",
+			 __func__, lnb, cmd);
+	return 0;
+}
+
+static int max_send_master_cmd(struct dvb_frontend *fe,
+			       struct dvb_diseqc_master_cmd *cmd)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	u32 tag = DDB_LINK_TAG(port->lnr);
+	int i;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	if (fmode == 2 || fmode == 1)
+		return 0;
+	if (dvb->diseqc_send_master_cmd)
+		dvb->diseqc_send_master_cmd(fe, cmd);
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(dvb->input));
+	for (i = 0; i < cmd->msg_len; i++)
+		ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(dvb->input));
+	lnb_command(dev, port->lnr, dvb->input, LNB_CMD_DISEQC);
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return 0;
+}
+
+static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input,
+			   struct dvb_diseqc_master_cmd *cmd)
+{
+	u32 tag = DDB_LINK_TAG(link);
+	int i;
+
+	ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(input));
+	for (i = 0; i < cmd->msg_len; i++)
+		ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(input));
+	lnb_command(dev, link, input, LNB_CMD_DISEQC);
+	return 0;
+}
+
+static int lnb_set_sat(struct ddb *dev, u32 link,
+		       u32 input, u32 sat, u32 band, u32 hor)
+{
+	struct dvb_diseqc_master_cmd cmd = {
+		.msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00},
+		.msg_len = 4
+	};
+	cmd.msg[3] = 0xf0 | (((sat << 2) & 0x0c) |
+			     (band ? 1 : 0) | (hor ? 2 : 0));
+	return lnb_send_diseqc(dev, link, input, &cmd);
+}
+
+static int lnb_set_tone(struct ddb *dev, u32 link, u32 input,
+			enum fe_sec_tone_mode tone)
+{
+	int s = 0;
+	u32 mask = (1ULL << input);
+
+	switch (tone) {
+	case SEC_TONE_OFF:
+		if (!(dev->link[link].lnb.tone & mask))
+			return 0;
+		dev->link[link].lnb.tone &= ~(1ULL << input);
+		break;
+	case SEC_TONE_ON:
+		if (dev->link[link].lnb.tone & mask)
+			return 0;
+		dev->link[link].lnb.tone |= (1ULL << input);
+		break;
+	default:
+		s = -EINVAL;
+		break;
+	}
+	if (!s)
+		s = lnb_command(dev, link, input, LNB_CMD_NOP);
+	return s;
+}
+
+static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input,
+			   enum fe_sec_voltage voltage)
+{
+	int s = 0;
+
+	if (dev->link[link].lnb.oldvoltage[input] == voltage)
+		return 0;
+	switch (voltage) {
+	case SEC_VOLTAGE_OFF:
+		if (dev->link[link].lnb.voltage[input])
+			return 0;
+		lnb_command(dev, link, input, LNB_CMD_OFF);
+		break;
+	case SEC_VOLTAGE_13:
+		lnb_command(dev, link, input, LNB_CMD_LOW);
+		break;
+	case SEC_VOLTAGE_18:
+		lnb_command(dev, link, input, LNB_CMD_HIGH);
+		break;
+	default:
+		s = -EINVAL;
+		break;
+	}
+	dev->link[link].lnb.oldvoltage[input] = voltage;
+	return s;
+}
+
+static int max_set_input_unlocked(struct dvb_frontend *fe, int in)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int res = 0;
+
+	if (in > 3)
+		return -EINVAL;
+	if (dvb->input != in) {
+		u32 bit = (1ULL << input->nr);
+		u32 obit = dev->link[port->lnr].lnb.voltage[dvb->input] & bit;
+
+		dev->link[port->lnr].lnb.voltage[dvb->input] &= ~bit;
+		dvb->input = in;
+		dev->link[port->lnr].lnb.voltage[dvb->input] |= obit;
+	}
+	res = dvb->set_input(fe, in);
+	return res;
+}
+
+static int max_set_input(struct dvb_frontend *fe, int in)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = input->port->dev;
+	int res;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	res = max_set_input_unlocked(fe, in);
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int tuner = 0;
+	int res = 0;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	dvb->tone = tone;
+	switch (fmode) {
+	default:
+	case 0:
+	case 3:
+		res = lnb_set_tone(dev, port->lnr, dvb->input, tone);
+		break;
+	case 1:
+	case 2:
+		if (old_quattro) {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 2;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 1;
+		} else {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 1;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 2;
+		}
+		res = max_set_input_unlocked(fe, tuner);
+		break;
+	}
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int tuner = 0;
+	u32 nv, ov = dev->link[port->lnr].lnb.voltages;
+	int res = 0;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	dvb->voltage = voltage;
+
+	switch (fmode) {
+	case 3:
+	default:
+	case 0:
+		if (fmode == 3)
+			max_set_input_unlocked(fe, 0);
+		if (voltage == SEC_VOLTAGE_OFF)
+			dev->link[port->lnr].lnb.voltage[dvb->input] &=
+				~(1ULL << input->nr);
+		else
+			dev->link[port->lnr].lnb.voltage[dvb->input] |=
+				(1ULL << input->nr);
+
+		res = lnb_set_voltage(dev, port->lnr, dvb->input, voltage);
+		break;
+	case 1:
+	case 2:
+		if (voltage == SEC_VOLTAGE_OFF)
+			dev->link[port->lnr].lnb.voltages &=
+				~(1ULL << input->nr);
+		else
+			dev->link[port->lnr].lnb.voltages |=
+				(1ULL << input->nr);
+		nv = dev->link[port->lnr].lnb.voltages;
+
+		if (old_quattro) {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 2;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 1;
+		} else {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 1;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 2;
+		}
+		res = max_set_input_unlocked(fe, tuner);
+
+		if (nv != ov) {
+			if (nv) {
+				lnb_set_voltage(dev, port->lnr, 0,
+						SEC_VOLTAGE_13);
+				if (fmode == 1) {
+					lnb_set_voltage(dev, port->lnr, 0,
+							SEC_VOLTAGE_13);
+					if (old_quattro) {
+						lnb_set_voltage(dev,
+								port->lnr, 1,
+								SEC_VOLTAGE_18);
+						lnb_set_voltage(dev, port->lnr,
+								2,
+								SEC_VOLTAGE_13);
+					} else {
+						lnb_set_voltage(dev, port->lnr,
+								1,
+								SEC_VOLTAGE_13);
+						lnb_set_voltage(dev, port->lnr,
+								2,
+								SEC_VOLTAGE_18);
+					}
+					lnb_set_voltage(dev, port->lnr, 3,
+							SEC_VOLTAGE_18);
+				}
+			} else {
+				lnb_set_voltage(dev, port->lnr,
+						0, SEC_VOLTAGE_OFF);
+				if (fmode == 1) {
+					lnb_set_voltage(dev, port->lnr, 1,
+							SEC_VOLTAGE_OFF);
+					lnb_set_voltage(dev, port->lnr, 2,
+							SEC_VOLTAGE_OFF);
+					lnb_set_voltage(dev, port->lnr, 3,
+							SEC_VOLTAGE_OFF);
+				}
+			}
+		}
+		break;
+	}
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
+{
+	return 0;
+}
+
+static int max_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd burst)
+{
+	return 0;
+}
+
+static int mxl_fw_read(void *priv, u8 *buf, u32 len)
+{
+	struct ddb_link *link = priv;
+	struct ddb *dev = link->dev;
+
+	dev_info(dev->dev,
+		 "Read mxl_fw from link %u\n", link->nr);
+
+	return ddbridge_flashread(dev, link->nr, buf, 0xc0000, len);
+}
+
+int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm)
+{
+	u32 l = link->nr;
+
+	if (link->lnb.fmode == fm)
+		return 0;
+	dev_info(dev->dev, "Set fmode link %u = %u\n", l, fm);
+	mutex_lock(&link->lnb.lock);
+	if (fm == 2 || fm == 1) {
+		if (fmode_sat >= 0) {
+			lnb_set_sat(dev, l, 0, fmode_sat, 0, 0);
+			if (old_quattro) {
+				lnb_set_sat(dev, l, 1, fmode_sat, 0, 1);
+				lnb_set_sat(dev, l, 2, fmode_sat, 1, 0);
+			} else {
+				lnb_set_sat(dev, l, 1, fmode_sat, 1, 0);
+				lnb_set_sat(dev, l, 2, fmode_sat, 0, 1);
+			}
+			lnb_set_sat(dev, l, 3, fmode_sat, 1, 1);
+		}
+		lnb_set_tone(dev, l, 0, SEC_TONE_OFF);
+		if (old_quattro) {
+			lnb_set_tone(dev, l, 1, SEC_TONE_OFF);
+			lnb_set_tone(dev, l, 2, SEC_TONE_ON);
+		} else {
+			lnb_set_tone(dev, l, 1, SEC_TONE_ON);
+			lnb_set_tone(dev, l, 2, SEC_TONE_OFF);
+		}
+		lnb_set_tone(dev, l, 3, SEC_TONE_ON);
+	}
+	link->lnb.fmode = fm;
+	mutex_unlock(&link->lnb.lock);
+	return 0;
+}
+
+/* MAXS8 related functions */
+
+static struct mxl5xx_cfg mxl5xx = {
+	.adr      = 0x60,
+	.type     = 0x01,
+	.clk      = 27000000,
+	.ts_clk   = 139,
+	.cap      = 12,
+	.fw_read  = mxl_fw_read,
+};
+
+int ddb_fe_attach_mxl5xx(struct ddb_input *input)
+{
+	struct ddb *dev = input->port->dev;
+	struct i2c_adapter *i2c = &input->port->i2c->adap;
+	struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
+	struct ddb_port *port = input->port;
+	struct ddb_link *link = &dev->link[port->lnr];
+	struct mxl5xx_cfg cfg;
+	int demod, tuner;
+
+	cfg = mxl5xx;
+	cfg.fw_priv = link;
+	if (dev->link[0].info->type == DDB_OCTONET)
+		;/*cfg.ts_clk = 69;*/
+
+	demod = input->nr;
+	tuner = demod & 3;
+	if (fmode == 3)
+		tuner = 0;
+	dvb->fe = dvb_attach(mxl5xx_attach, i2c, &cfg, demod, tuner);
+	if (!dvb->fe) {
+		dev_err(dev->dev, "No MXL5XX found!\n");
+		return -ENODEV;
+	}
+	if (input->nr < 4) {
+		lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT);
+		lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF);
+	}
+	ddb_lnb_init_fmode(dev, link, fmode);
+
+	dvb->fe->ops.set_voltage = max_set_voltage;
+	dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage;
+	dvb->fe->ops.set_tone = max_set_tone;
+	dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd;
+	dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd;
+	dvb->fe->ops.diseqc_send_burst = max_send_burst;
+	dvb->fe->sec_priv = input;
+	dvb->set_input = dvb->fe->ops.set_input;
+	dvb->fe->ops.set_input = max_set_input;
+	dvb->input = tuner;
+	return 0;
+}
+

ddbridge/ddbridge-modulator.c

@@ -1,12 +1,12 @@
 /*
- * ddbridge.c: Digital Devices PCIe bridge driver
+ * ddbridge-modulator.c: Digital Devices modulator cards
  *
  * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Marcus Metzler <mocm@metzlerbros.de>
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *
  * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
+ * modify dit under the terms of the GNU General Public License
  * version 2 only, as published by the Free Software Foundation.
  *
  *
@@ -17,14 +17,12 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
-#include "ddbridge-regs.h"
+#include "ddbridge-io.h"
 
 #include <linux/dvb/mod.h>
 
@@ -188,7 +186,7 @@ void ddbridge_mod_output_stop(struct ddb_output *output)
 	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr));
 #endif
 	mod_busy(dev, output->nr);
-	pr_info("DDBridge: mod_output_stop %d.%d\n", dev->nr, output->nr);
+	dev_info(dev->dev, "mod_output_stop %d.%d\n", dev->nr, output->nr);
 }
 
 static void mod_set_incs(struct ddb_output *output)
@@ -223,8 +221,10 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 {
 	u32 ri;
 
-	pr_info("DDBridge: ibitrate %llu\n", mod->ibitrate);
-	pr_info("DDBridge: obitrate %llu\n", mod->obitrate);
+	dev_info(mod->port->dev->dev,
+		 "ibitrate %llu\n", mod->ibitrate);
+	dev_info(mod->port->dev->dev,
+		 "obitrate %llu\n", mod->obitrate);
 
 	if (mod->ibitrate != 0) {
 		u64 d = mod->obitrate - mod->ibitrate;
@@ -237,8 +237,9 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 	} else
 		ri = 0;
 	mod->rate_inc = ri;
-	pr_info("DDBridge: ibr=%llu, obr=%llu, ri=0x%06x\n",
-		mod->ibitrate >> 32, mod->obitrate >> 32, ri);
+	dev_info(mod->port->dev->dev,
+		 "ibr=%llu, obr=%llu, ri=0x%06x\n",
+		 mod->ibitrate >> 32, mod->obitrate >> 32, ri);
 }
 
 static int mod_calc_obitrate(struct ddb_mod *mod)
@@ -369,8 +370,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		if (checkLF <= 1)
 			return -EINVAL;
 
-		pr_info("DDBridge: KF=%u LF=%u Output=%u mod=%u\n",
-			KF, LF, Output, mod->modulation);
+		dev_info(dev->dev, "KF=%u LF=%u Output=%u mod=%u\n",
+			 KF, LF, Output, mod->modulation);
 		ddbwritel(dev, KF, CHANNEL_KF(Channel));
 		ddbwritel(dev, LF, CHANNEL_LF(Channel));
 
@@ -378,7 +379,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 					   CHANNEL_CONTROL_CMD_SETUP))
 			return -EINVAL;
 		mod->Control |= CHANNEL_CONTROL_ENABLE_DVB;
-	} else if (dev->link[0].info->version == 1) {
+	} else if (dev->link[0].info->version <= 1) {
 		/* QAM: 600 601 602 903 604 = 16 32 64 128 256 */
 		/* ddbwritel(dev, 0x604, CHANNEL_SETTINGS(output->nr)); */
 		ddbwritel(dev, qamtab[mod->modulation],
@@ -400,8 +401,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		if (mod_SendChannelCommand(dev, Channel,
 					   CHANNEL_CONTROL_CMD_UNMUTE))
 			return -EINVAL;
-	pr_info("DDBridge: mod_output_start %d.%d ctrl=%08x\n",
-		dev->nr, output->nr, mod->Control);
+	dev_info(dev->dev, "mod_output_start %d.%d ctrl=%08x\n",
+		 dev->nr, output->nr, mod->Control);
 	return 0;
 }
 
@@ -467,8 +468,7 @@ static int mod_setup_max2871(struct ddb *dev, u32 *reg)
 	return status;
 }
 
-static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
-			 u32 MaxUsedChannels)
+static int mod_fsm_setup(struct ddb *dev, u32 MaxUsedChannels)
 {
 	int status = 0;
 	u32 Capacity;
@@ -500,7 +500,6 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
 	if (MaxUsedChannels == 0)
 		MaxUsedChannels = (Capacity & FSM_CAPACITY_CUR) >> 16;
 
-	pr_info("DDBridge: max used chan = %u\n", MaxUsedChannels);
 	if (MaxUsedChannels <= 1)
 		ddbwritel(dev, FSM_GAIN_N1, FSM_GAIN);
 	else if (MaxUsedChannels <= 2)
@@ -516,8 +515,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
 	else
 		ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN);
 
-	dev->link[0].info->port_num = MaxUsedChannels;
-
+	ddbwritel(dev, FSM_CONTROL_ENABLE, FSM_CONTROL);
 	return status;
 }
 
@@ -679,8 +677,8 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 		mod_si598_readreg(dev, 11, &Data[4]);
 		mod_si598_readreg(dev, 12, &Data[5]);
 
-		pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n",
-			Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
+		dev_info(dev->dev, "Data = %02x %02x %02x %02x %02x %02x\n",
+			 Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
 		RFreq = (((u64)Data[1] & 0x3F) << 32) | ((u64)Data[2] << 24) |
 			((u64)Data[3] << 16) | ((u64)Data[4] << 8) |
 			((u64)Data[5]);
@@ -693,14 +691,14 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 		     ((u32)(Data[1] & 0xE0) >> 6)) + 1;
 		fDCO = fOut * (u64)(HSDiv * N);
 		m_fXtal = fDCO << 28;
-		pr_info("DDBridge: fxtal %016llx  rfreq %016llx\n",
-			m_fXtal, RFreq);
+		dev_info(dev->dev, "fxtal %016llx  rfreq %016llx\n",
+			 m_fXtal, RFreq);
 
 		m_fXtal += RFreq >> 1;
 		m_fXtal = div64_u64(m_fXtal, RFreq);
 
-		pr_info("DDBridge: fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n",
-			(u32) fOut, (u32) m_fXtal, (u32) fDCO, (u32) HSDiv, N);
+		dev_info(dev->dev, "fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n",
+			 (u32) fOut, (u32) m_fXtal, (u32) fDCO, (u32) HSDiv, N);
 	}
 
 	fOut = freq;
@@ -710,8 +708,8 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 
 	if (Div < MinDiv)
 		Div = Div + 1;
-	pr_info("DDBridge:  fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n",
-		fOut, MinDiv, MaxDiv, Div);
+	dev_info(dev->dev, "fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n",
+		 fOut, MinDiv, MaxDiv, Div);
 
 	if (Div <= 11) {
 		N = 1;
@@ -729,8 +727,8 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 				if (N > 128)
 					break;
 			}
-			pr_info("DDBridge:  %3d: %llu %llu %llu %u\n",
-				retry, Div, HSDiv * N, HSDiv, N);
+			dev_info(dev->dev, "%3d: %llu %llu %llu %u\n",
+				 retry, Div, HSDiv * N, HSDiv, N);
 			if (HSDiv * N < MinDiv)
 				Div = Div + 2;
 			else if (HSDiv * N > MaxDiv)
@@ -740,7 +738,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 			retry = retry - 1;
 		}
 		if (retry == 0) {
-			pr_err("DDBridge:  FAIL\n");
+			dev_err(dev->dev, "FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -755,17 +753,17 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 
 
 	fDCO = (u64)fOut * (u64)N * (u64)HSDiv;
-	pr_info("DDBridge: fdco %16llx\n", fDCO);
+	dev_info(dev->dev, "fdco %16llx\n", fDCO);
 	RFreq = fDCO<<28;
-	pr_info("DDBridge: %16llx %16llx\n", fDCO, RFreq);
+	dev_info(dev->dev, "%16llx %16llx\n", fDCO, RFreq);
 
 	fxtal = m_fXtal;
 	do_div(RFreq, fxtal);
-	pr_info("DDBridge: %16llx %d\n", RFreq, fxtal);
+	dev_info(dev->dev, "%16llx %d\n", RFreq, fxtal);
 	RF = RFreq;
 
-	pr_info("DDBridge: fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n",
-		fOut, m_fXtal, fDCO, HSDiv, N, RFreq);
+	dev_info(dev->dev, "fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n",
+		 fOut, m_fXtal, fDCO, HSDiv, N, RFreq);
 
 	Data[0] = (u8)(((HSDiv - 4) << 5) | ((N - 1) >> 2));
 	Data[1] = (u8)((((N - 1) & 0x03) << 6) | ((RF >> 32) & 0x3F));
@@ -774,8 +772,8 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 	Data[4] = (u8)((RF >>  8) & 0xFF);
 	Data[5] = (u8)((RF)       & 0xFF);
 
-	pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n",
-		Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
+	dev_info(dev->dev, "Data = %02x %02x %02x %02x %02x %02x\n",
+		 Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
 	mod_si598_writereg(dev, 7, Data[0]);
 	mod_si598_writereg(dev, 8, Data[1]);
 	mod_si598_writereg(dev, 9, Data[2]);
@@ -908,11 +906,11 @@ static int mod_init_dac_input(struct ddb *dev)
 	}
 
 	if (Sample1 == 0xFF || Sample2 == 0xFF) {
-		pr_err("DDBridge:  No valid window found\n");
+		dev_err(dev->dev, "No valid window found\n");
 		return -EINVAL;
 	}
 
-	pr_err("DDBridge:  Window = %d - %d\n", Sample1, Sample2);
+	dev_err(dev->dev, "Window = %d - %d\n", Sample1, Sample2);
 
 	for (Sample = Sample1; Sample < Sample2; Sample += 1) {
 		if (SetTable[Sample] < HldTable[Sample]) {
@@ -923,15 +921,15 @@ static int mod_init_dac_input(struct ddb *dev)
 		}
 	}
 
-	pr_info("DDBridge: Select Sample %d\n", SelectSample);
+	dev_info(dev->dev, "Select Sample %d\n", SelectSample);
 
 	if (SelectSample == 0xFF) {
-		pr_err("DDBridge: No valid sample found\n");
+		dev_err(dev->dev, "No valid sample found\n");
 		return -EINVAL;
 	}
 
 	if (HldTable[SelectSample] + SetTable[SelectSample] < 8) {
-		pr_err("DDBridge: Too high jitter\n");
+		dev_err(dev->dev, "Too high jitter\n");
 		return -EINVAL;
 	}
 
@@ -946,10 +944,10 @@ static int mod_init_dac_input(struct ddb *dev)
 	mod_read_dac_register(dev, 0x06, &ReadSeek);
 	Seek &= ReadSeek;
 	if ((Seek & 0x01) == 0) {
-		pr_err("DDBridge: Insufficient timing margin\n");
+		dev_err(dev->dev, "Insufficient timing margin\n");
 		return -EINVAL;
 	}
-	pr_info("DDBridge: Done\n");
+	dev_info(dev->dev, "Done\n");
 	return 0;
 }
 
@@ -1006,7 +1004,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency)
 		ddbwritel(dev, DAC_CONTROL_RESET, DAC_CONTROL);
 		msleep(20);
 		if (mod_set_si598(dev, Frequency)) {
-			pr_err("DDBridge: mod_set_si598 failed\n");
+			dev_err(dev->dev, "mod_set_si598 failed\n");
 			return -1;
 		}
 		msleep(50);
@@ -1021,7 +1019,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency)
 			break;
 		msleep(100);
 	}
-	pr_info("DDBridge: mod_set_dac_clock OK\n");
+	dev_info(dev->dev, "%s OK\n", __func__);
 	return hr;
 }
 
@@ -1127,18 +1125,18 @@ static int set_base_frequency(struct ddb *dev, u32 freq)
 	u32 UP2Frequency = 1896;
 	u32 down, freq10;
 
-	pr_info("DDBridge: set base to %u\n", freq);
+	dev_info(dev->dev, "set base to %u\n", freq);
 	dev->mod_base.frequency = freq;
 	freq /= 1000000;
 	freq10 = dev->mod_base.flat_start + 4;
 	down = freq + 9 * 8 + freq10 + UP1Frequency + UP2Frequency;
 
 	if ((freq10 + 9 * 8) > (dev->mod_base.flat_end - 4)) {
-		pr_err("DDBridge: Frequency out of range %d\n", freq10);
+		dev_err(dev->dev, "Frequency out of range %d\n", freq10);
 		return -EINVAL;
 	}
 	if (down % 8) {
-		pr_err("DDBridge:  Invalid Frequency %d\n", down);
+		dev_err(dev->dev, "Invalid Frequency %d\n", down);
 		return -EINVAL;
 	}
 	return mod_set_down(dev, down, 8, Ext);
@@ -1167,12 +1165,12 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 		stat = -EINVAL;
 		goto fail;
 	}
-	pr_info("DDBridge: srate = %d\n", flash->DataSet[0].Symbolrate * 1000);
+	dev_info(dev->dev, "srate = %d\n", flash->DataSet[0].Symbolrate * 1000);
 
 	mod_output_enable(dev, 0);
 	stat = mod_set_dac_clock(dev, flash->DataSet[0].DACFrequency * 1000);
 	if (stat < 0) {
-		pr_err("DDBridge: setting DAC clock failed\n");
+		dev_err(dev->dev, "setting DAC clock failed\n");
 		goto fail;
 	}
 	mod_set_dac_current(dev, 512, 512);
@@ -1189,17 +1187,17 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 	FrequencyCH10 = flash->DataSet[0].FlatStart + 4;
 	DownFrequency = Frequency + 9 * 8 + FrequencyCH10 +
 		UP1Frequency + UP2Frequency;
-	pr_info("DDBridge: CH10 = %d, Down = %d\n",
-			FrequencyCH10, DownFrequency);
+	dev_info(dev->dev, "CH10 = %d, Down = %d\n",
+		 FrequencyCH10, DownFrequency);
 
 	if ((FrequencyCH10 + 9 * 8) > (flash->DataSet[0].FlatEnd - 4)) {
-		pr_err("DDBridge: Frequency out of range %d\n", FrequencyCH10);
+		dev_err(dev->dev, "Frequency out of range %d\n", FrequencyCH10);
 		stat = -EINVAL;
 		goto fail;
 	}
 
 	if (DownFrequency % 8 != 0) {
-		pr_err("DDBridge:  Invalid Frequency %d\n", DownFrequency);
+		dev_err(dev->dev, "Invalid Frequency %d\n", DownFrequency);
 		stat = -EINVAL;
 		goto fail;
 	}
@@ -1228,7 +1226,7 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 			 flash->DataSet[0].PostScaleQ);
 	mod_pre_eq_gain(dev, flash->DataSet[0].PreScale);
 	/*mod_pre_eq_gain(dev, 0x0680);*/
-	pr_info("DDBridge: prescaler %04x\n", flash->DataSet[0].PreScale);
+	dev_info(dev->dev, "prescaler %04x\n", flash->DataSet[0].PreScale);
 	mod_set_channelsumshift(dev, 2);
 	mod_output_enable(dev, 1);
 
@@ -1352,8 +1350,8 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 	case CM_ADJUST:
 		if (InPacketDiff < mod->MinInputPackets) {
-			pr_info("DDBridge: PCR Adjust reset  IN: %u  Min: %u\n",
-				InPacketDiff, mod->MinInputPackets);
+			dev_info(dev->dev, "PCR Adjust reset  IN: %u  Min: %u\n",
+				 InPacketDiff, mod->MinInputPackets);
 			mod->InPacketsSum = 0;
 			mod->OutPacketsSum = 0;
 			mod->PCRAdjustSum = 0;
@@ -1393,7 +1391,7 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 		mod->PCRIncrement += PCRIncrementDiff;
 		pcr = ConvertPCR(mod->PCRIncrement);
-		pr_info("DDBridge: outl %016llx\n", pcr);
+		dev_info(dev->dev, "outl %016llx\n", pcr);
 		ddbwritel(dev,	pcr & 0xffffffff,
 			  CHANNEL_PCR_ADJUST_OUTL(output->nr));
 		ddbwritel(dev,	(pcr >> 32) & 0xffffffff,
@@ -1420,11 +1418,11 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 	spin_unlock(&dma->lock);
 
-	pr_info("DDBridge: chan %d out %016llx in %016llx indiff %08x\n",
-		chan, OutPackets, InPackets, InPacketDiff);
-	pr_info("DDBridge: cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n",
-		mod->StateCounter, PCRAdjust, PCRAdjustExt,
-		PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
+	dev_info(dev->dev, "chan %d out %016llx in %016llx indiff %08x\n",
+		 chan, OutPackets, InPackets, InPacketDiff);
+	dev_info(dev->dev, "cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n",
+		 mod->StateCounter, PCRAdjust, PCRAdjustExt,
+		 PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
 }
 
 static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
@@ -1439,7 +1437,7 @@ static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
 	tmp = frequency;
 	tmp <<= 33;
 	tmp = div64_s64(tmp, 4915200000);
-	pr_info("set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
+	dev_info(dev->dev, "set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
 	ddbwritel(dev, (u32) tmp, RFDAC_FCW);
 	return 0;
 }
@@ -1455,7 +1453,7 @@ static void mod3_set_cfcw(struct ddb_mod *mod, u32 f)
 	tmp = ((s64) (freq - dcf)) << 32;
 	tmp = div64_s64(tmp, srdac);
 	cfcw = (u32) tmp;
-	pr_info("f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
+	dev_info(dev->dev, "f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
 	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
 }
 
@@ -1497,10 +1495,10 @@ static int mod3_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 
 	case MODULATOR_BASE_FREQUENCY:
 		return mod3_set_base_frequency(mod->port->dev, tvp->u.data);
-      
+
 	case MODULATOR_ATTENUATOR:
 		return mod_set_attenuator(mod->port->dev, tvp->u.data);
-      
+
 	case MODULATOR_GAIN:
 		return mod_set_vga(mod->port->dev, tvp->u.data);
 	}
@@ -1556,8 +1554,9 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 		if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS))
 			return -EINVAL;
 
-		tvp = kmalloc(tvps->num * sizeof(struct dtv_property),
-			      GFP_KERNEL);
+		tvp = kmalloc_array(tvps->num,
+				    sizeof(struct dtv_property),
+				    GFP_KERNEL);
 		if (!tvp) {
 			ret = -ENOMEM;
 			goto out;
@@ -1626,14 +1625,13 @@ out:
 
 static int mod_init_2(struct ddb *dev, u32 Frequency)
 {
-	int status, i;
-	int streams = dev->link[0].info->port_num;
+	int i, status, streams = dev->link[0].info->port_num;
 
 	dev->mod_base.frequency = Frequency;
-	status = mod_fsm_setup(dev, 0, 0);
 
+	status = mod_fsm_setup(dev, 0);
 	if (status) {
-		pr_err("FSM setup failed!\n");
+		dev_err(dev->dev, "FSM setup failed!\n");
 		return -1;
 	}
 	for (i = 0; i < streams; i++) {
@@ -1644,6 +1642,13 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 		mod_set_symbolrate(mod, 6900000);
 		mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000);
 	}
+	if (streams <= 8)
+		mod_set_vga(dev, RF_VGA_GAIN_N8);
+	else if (streams <= 16)
+		mod_set_vga(dev, RF_VGA_GAIN_N16);
+	else
+		mod_set_vga(dev, RF_VGA_GAIN_N24);
+
 	mod_set_attenuator(dev, 0);
 	return 0;
 }
@@ -1701,7 +1706,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_RESET, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
 		msleep(20);
@@ -1711,7 +1716,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_SETUP, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
 		msleep(20);
@@ -1721,7 +1726,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, 0x01, JESD204B_BASE);
 	for (i = 0; i < 400; i++) {
 		msleep(20);
@@ -1729,7 +1734,7 @@ static int rfdac_init(struct ddb *dev)
 		if ((tmp & 0xc0000000) == 0xc0000000)
 			break;
 	}
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	if ((tmp & 0xc0000000) != 0xc0000000)
 		return -1;
 	return 0;
@@ -1742,12 +1747,12 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 
 	ret = mod_setup_max2871(dev, max2871_sdr);
 	if (ret)
-		pr_err("DDBridge: PLL setup failed\n");
+		dev_err(dev->dev, "PLL setup failed\n");
 	ret = rfdac_init(dev);
 	if (ret)
 		ret = rfdac_init(dev);
 	if (ret)
-		pr_err("DDBridge: RFDAC setup failed\n");
+		dev_err(dev->dev, "RFDAC setup failed\n");
 
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
@@ -1779,11 +1784,15 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 
 int ddbridge_mod_init(struct ddb *dev)
 {
-	if (dev->link[0].info->version <= 1)
+	switch (dev->link[0].info->version) {
+	case 0:
+	case 1:
 		return mod_init_1(dev, 722000000);
-	if (dev->link[0].info->version == 2)
+	case 2:
 		return mod_init_2(dev, 114000000);
-	if (dev->link[0].info->version == 3)
+	case 3:
 		return mod_init_3(dev, 503250000);
-	return -1;
+	default:
+		return -1;
+	}
 }

ddbridge/ddbridge-ns.c

@@ -17,14 +17,12 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
-static int ddb_dvb_ns_input_start(struct ddb_input *input);
-static int ddb_dvb_ns_input_stop(struct ddb_input *input);
+#include "ddbridge.h"
+#include "ddbridge-io.h"
 
 static u16 calc_pcs(struct dvb_ns_params *p)
 {
@@ -62,7 +60,7 @@ static u16 calc_pcs16(struct dvb_ns_params *p, int ipv)
 
 static void ns_free(struct dvbnss *nss)
 {
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
@@ -99,7 +97,7 @@ static int ns_set_pids(struct dvbnss *nss)
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 
 	if (dev->link[0].ids.devid == 0x0301dd01) {
 		u32 sys = 0;
@@ -117,8 +115,9 @@ static int ns_set_pids(struct dvbnss *nss)
 		/* disable unused pids */
 		for (; j < 5; j++)
 			ddbwritel(dev, 0, PID_FILTER_PID(dns->nr, j));
-	} else
+	} else {
 		ddbcpyto(dev, STREAM_PIDS(dns->nr), nss->pids, 0x400);
+	}
 	return 0;
 }
 
@@ -127,7 +126,7 @@ static int ns_set_pid(struct dvbnss *nss, u16 pid)
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	u16 byte = (pid & 0x1fff) >> 3;
 	u8 bit = 1 << (pid & 7);
 	u32 off = STREAM_PIDS(dns->nr);
@@ -186,7 +185,7 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci)
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	int ciport;
 
 	if (ci == 255) {
@@ -197,8 +196,8 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci)
 	if (ciport < 0)
 		return -EINVAL;
 
-	pr_info("DDBridge: input %d.%d to ci %d at port %d\n",
-		input->port->lnr, input->nr, ci, ciport);
+	dev_info(dev->dev, "DDBridge: input %d.%d to ci %d at port %d\n",
+		 input->port->lnr, input->nr, ci, ciport);
 	ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1c,
 		  TS_CONTROL(dev->port[ciport].output));
 	usleep_range(1, 5);
@@ -246,7 +245,7 @@ static int ns_set_rtcp_msg(struct dvbnss *nss, u8 *msg, u32 len)
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	u32 off = STREAM_PACKET_ADR(dns->nr);
 	u32 coff = 96;
 	u16 wlen;
@@ -370,7 +369,7 @@ static u32 set_nsbuf(struct dvb_ns_params *p, u8 *buf,
 
 static int ns_set_ts_packets(struct dvbnss *nss, u8 *buf, u32 len)
 {
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
@@ -387,7 +386,7 @@ static int ns_set_ts_packets(struct dvbnss *nss, u8 *buf, u32 len)
 
 static int ns_insert_ts_packets(struct dvbnss *nss, u8 count)
 {
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
@@ -409,7 +408,7 @@ static int ns_set_net(struct dvbnss *nss)
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
 	struct dvb_ns_params *p = &nss->params;
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	u32 off = STREAM_PACKET_ADR(dns->nr);
 	u32 coff = 96;
 
@@ -428,7 +427,7 @@ static int ns_set_net(struct dvbnss *nss)
 
 static int ns_start(struct dvbnss *nss)
 {
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
@@ -452,7 +451,7 @@ static int ns_start(struct dvbnss *nss)
 
 static int ns_stop(struct dvbnss *nss)
 {
-	struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
+	struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
 	struct dvb_netstream *ns = nss->ns;
 	struct ddb_input *input = ns->priv;
 	struct ddb *dev = input->port->dev;
@@ -464,7 +463,7 @@ static int ns_stop(struct dvbnss *nss)
 	return 0;
 }
 
-static int netstream_init(struct ddb_input *input)
+int netstream_init(struct ddb_input *input)
 {
 	struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
 	struct dvb_adapter *adap = dvb->adap;

ddbridge/ddbridge-regs.h

@@ -15,10 +15,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
 /* Register Definitions */
@@ -106,7 +104,6 @@
 #define INTMASK_TSOUTPUT3   (0x00040000)
 #define INTMASK_TSOUTPUT4   (0x00080000)
 
-
 #define INTERRUPT_V2_CONTROL  (INTERRUPT_BASE + 0x00)
 #define INTERRUPT_V2_ENABLE_1 (INTERRUPT_BASE + 0x04)
 #define INTERRUPT_V2_ENABLE_2 (INTERRUPT_BASE + 0x08)
@@ -125,9 +122,6 @@
 #define INTERRUPT_V2_STATUS_6 (INTERRUPT_BASE + 0x38)
 #define INTERRUPT_V2_STATUS_7 (INTERRUPT_BASE + 0x3c)
 
-
-
-
 /* Modulator registers */
 
 /*  Clock Generator ( Sil598 @ 0xAA I2c ) */
@@ -140,8 +134,8 @@
 /* DAC ( AD9781/AD9783 SPI ) */
 #define DAC_BASE            (0x090)
 #define DAC_CONTROL         (DAC_BASE)
-#define DAC_WRITE_DATA      (DAC_BASE+4)
-#define DAC_READ_DATA       (DAC_BASE+8)
+#define DAC_WRITE_DATA      (DAC_BASE + 4)
+#define DAC_READ_DATA       (DAC_BASE + 8)
 
 #define DAC_CONTROL_INSTRUCTION_REG (0xFF)
 #define DAC_CONTROL_STARTIO         (0x100)
@@ -156,16 +150,15 @@
 #define TEMPMON_CONTROL_INTENABLE   (0x00000004)
 #define TEMPMON_CONTROL_OVERTEMP    (0x00008000)
 
-
-/* SHORT Temperature in <20>C x 256 */
+/* Temperature in C x 256 */
 #define TEMPMON_CORE       (TEMPMON_BASE + 0x04)
 #define TEMPMON_SENSOR0    (TEMPMON_BASE + 0x04)
 #define TEMPMON_SENSOR1    (TEMPMON_BASE + 0x08)
 #define TEMPMON_SENSOR2    (TEMPMON_BASE + 0x0C)
 
 #define TEMPMON_FANCONTROL  (TEMPMON_BASE + 0x10)
-#define TEMPMON_FANPWM      (0x00000F00)            // PWM speed in 10% steps
-#define TEMPMON_FANTACHO    (0x000000FF)            // Rotations in 100/min steps
+#define TEMPMON_FANPWM      (0x00000F00)  /* PWM speed in 10% steps */
+#define TEMPMON_FANTACHO    (0x000000FF) /*  Rotations in 100/min steps */
 
 /* V1 Temperature Monitor
  * Temperature Monitor TEMPMON_CONTROL & 0x8000 == 0 : ( 2x LM75A @ 0x90,0x92 )
@@ -173,16 +166,23 @@
  * ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
  */
 
-#define TEMPMON1_CORE       (TEMPMON_SENSOR0)    // u16 Temperature in <EFBFBD>C x 256 (ADM1032 ext)
-#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08) // SHORT Temperature in <20>C x 256 (LM75A 0x90)
-#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C) // SHORT Temperature in <EFBFBD>C x 256 (LM75A 0x92 or ADM1032 Int)
+/* Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON1_CORE       (TEMPMON_SENSOR0)
+/* Temperature in C x 256 (LM75A 0x90) */
+#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08)
+/* Temperature in C x 256 (LM75A 0x92 or ADM1032 Int) */
+#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C)
 
-// V2 Temperature Monitor 2 ADM1032
+/* V2 Temperature Monitor 2 ADM1032 */
 
-#define TEMPMON2_BOARD      (TEMPMON_SENSOR0)    // SHORT Temperature in <EFBFBD>C x 256 (ADM1032 int)
-#define TEMPMON2_FPGACORE   (TEMPMON_SENSOR1)    // SHORT Temperature in <20>C x 256 (ADM1032 ext)
-#define TEMPMON2_QAMCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in <EFBFBD>C x 256 (ADM1032 ext)
-#define TEMPMON2_DACCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in <20>C x 256 (ADM1032 ext)
+/* Temperature in C x 256 (ADM1032 int) */
+#define TEMPMON2_BOARD      (TEMPMON_SENSOR0)
+/* Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON2_FPGACORE   (TEMPMON_SENSOR1)
+/* Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON2_QAMCORE    (TEMPMON_SENSOR2)
+/* SHORT Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON2_DACCORE    (TEMPMON_SENSOR2)
 
 /* ------------------------------------------------------------------------- */
 /* I2C Master Controller */
@@ -201,7 +201,6 @@
 #define I2C_SPEED_77    (0x19181919)
 #define I2C_SPEED_50    (0x27262727)
 
-
 /* ------------------------------------------------------------------------- */
 /* DMA  Controller */
 
@@ -221,18 +220,16 @@
 #define DMA_DIAG_WAITOVERFLOWCOUNTER    (0x38)
 #define DMA_DIAG_WAITCOUNTER            (0x3C)
 
-#define TS_CONTROL(_io)         (_io->regs + 0x00)
-#define TS_CONTROL2(_io)        (_io->regs + 0x04)
-
+#define TS_CONTROL(_io)         ((_io)->regs + 0x00)
+#define TS_CONTROL2(_io)        ((_io)->regs + 0x04)
 
 /* ------------------------------------------------------------------------- */
 /* DMA  Buffer */
 
-#define DMA_BUFFER_CONTROL(_dma)       (_dma->regs + 0x00)
-#define DMA_BUFFER_ACK(_dma)           (_dma->regs + 0x04)
-#define DMA_BUFFER_CURRENT(_dma)       (_dma->regs + 0x08)
-#define DMA_BUFFER_SIZE(_dma)          (_dma->regs + 0x0c)
-
+#define DMA_BUFFER_CONTROL(_dma)       ((_dma)->regs + 0x00)
+#define DMA_BUFFER_ACK(_dma)           ((_dma)->regs + 0x04)
+#define DMA_BUFFER_CURRENT(_dma)       ((_dma)->regs + 0x08)
+#define DMA_BUFFER_SIZE(_dma)          ((_dma)->regs + 0x0c)
 
 /* ------------------------------------------------------------------------- */
 
@@ -248,8 +245,8 @@
 #define LNB_CMD_DISEQC 6
 #define LNB_CMD_SCIF   7
 
-#define LNB_BUSY  (1ULL <<  4)
-#define LNB_TONE  (1ULL << 15)
+#define LNB_BUSY  BIT_ULL(4)
+#define LNB_TONE  BIT_ULL(15)
 
 #define LNB_STATUS(i)                (LNB_BASE + (i) * 0x20 + 0x04)
 #define LNB_VOLTAGE(i)               (LNB_BASE + (i) * 0x20 + 0x08)
@@ -295,14 +292,14 @@
 
 #define CI_BUFFER_BASE                  (0x3000)
 #define CI_BUFFER_SIZE                  (0x0800)
-#define CI_BLOCKIO_BUFFER_SIZE          (CI_BUFFER_SIZE/2)
+#define CI_BLOCKIO_BUFFER_SIZE          (CI_BUFFER_SIZE / 2)
 
 #define CI_BUFFER(i)                  (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
 #define CI_BLOCKIO_RECEIVE_BUFFER(i)  (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
 #define CI_BLOCKIO_SEND_BUFFER(i)  \
 	(CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE + CI_BLOCKIO_BUFFER_SIZE)
 
-// V1
+/* V1 */
 
 #define VCO1_BASE           (0xC0)
 #define VCO1_CONTROL        (VCO1_BASE + 0x00)
@@ -340,10 +337,14 @@
 #define MAX2871_CONTROL         (MAX2871_BASE + 0x00)
 #define MAX2871_OUTDATA         (MAX2871_BASE + 0x04)
 #define MAX2871_INDATA          (MAX2871_BASE + 0x08)
-#define MAX2871_CONTROL_WRITE   (0x00000001)   // 1 = Trigger write, resets when done
-#define MAX2871_CONTROL_CE      (0x00000002)   // 0 = Put VCO into power down
-#define MAX2871_CONTROL_MUXOUT  (0x00000004)   // Muxout from VCO
-#define MAX2871_CONTROL_LOCK    (0x00000008)   // Lock from VCO
+/* 1 = Trigger write, resets when done */
+#define MAX2871_CONTROL_WRITE   (0x00000001)
+/* 0 = Put VCO into power down */
+#define MAX2871_CONTROL_CE      (0x00000002)
+/* Muxout from VCO */
+#define MAX2871_CONTROL_MUXOUT  (0x00000004)
+/* Lock from VCO */
+#define MAX2871_CONTROL_LOCK    (0x00000008)
 
 #define FSM_BASE                (0x200)
 #define FSM_CONTROL             (FSM_BASE + 0x00)
@@ -360,7 +361,6 @@
 #define FSM_STATUS_READY        (0x00010000)
 #define FSM_STATUS_QAMREADY     (0x00020000)
 
-
 #define FSM_CAPACITY            (FSM_BASE + 0x04)
 #define FSM_CAPACITY_MAX        (0x3F000000)
 #define FSM_CAPACITY_CUR        (0x003F0000)
@@ -377,8 +377,7 @@
 #define FSM_GAIN_N24            (0x00000029)
 #define FSM_GAIN_N96            (0x00000011)
 
-
-// Attenuator/VGA
+/* Attenuator/VGA */
 
 #define RF_ATTENUATOR   (0xD8)
 #define RF_ATTENUATOR   (0xD8)
@@ -399,7 +398,6 @@
 
 #define RF_VGA_GAIN_MAX         (200)
 
-
 /* V1 only */
 
 #define RF_POWER        (0xE0)
@@ -412,7 +410,6 @@
 #define RF_POWER_CONTROL_VALIDMASK (0x00000700)
 #define RF_POWER_CONTROL_VALID     (0x00000500)
 
-
 /*
  *  Output control
  */
@@ -444,14 +441,13 @@
 #define IQOUTPUT_CONTROL_ENABLE_PEAK        (0x00000008)
 #define IQOUTPUT_CONTROL_BYPASS_EQUALIZER   (0x00000010)
 
-
 /* Modulator Base  V1 */
 
 #define MODULATOR_BASE          (0x200)
 #define MODULATOR_CONTROL         (MODULATOR_BASE)
-#define MODULATOR_IQTABLE_END     (MODULATOR_BASE+4)
-#define MODULATOR_IQTABLE_INDEX   (MODULATOR_BASE+8)
-#define MODULATOR_IQTABLE_DATA    (MODULATOR_BASE+12)
+#define MODULATOR_IQTABLE_END     (MODULATOR_BASE + 4)
+#define MODULATOR_IQTABLE_INDEX   (MODULATOR_BASE + 8)
+#define MODULATOR_IQTABLE_DATA    (MODULATOR_BASE + 12)
 
 #define MODULATOR_IQTABLE_INDEX_CHANNEL_MASK  (0x000F0000)
 #define MODULATOR_IQTABLE_INDEX_IQ_MASK       (0x00008000)
@@ -460,7 +456,6 @@
 #define MODULATOR_IQTABLE_INDEX_SEL_Q     (MODULATOR_IQTABLE_INDEX_IQ_MASK)
 #define MODULATOR_IQTABLE_SIZE    (2048)
 
-
 /* Modulator Channels */
 
 #define CHANNEL_BASE dev->link[0].info->regmap->channel->base
@@ -512,12 +507,11 @@
 #define CHANNEL_SETTINGS2_OUTPUT_MASK       (0x0000007F)
 
 #define KFLF_MAX                            (0x07FFFFFFUL)
-#define KF_INIT(Symbolrate)                 (Symbolrate)
-#define LF_INIT(Symbolrate)                 (9000000UL)
+#define KF_INIT(_symbol_rate)               (_symbol_rate)
+#define LF_INIT(_symbol_rate)               (9000000UL)
 #define MIN_SYMBOLRATE                      (1000000)
 #define MAX_SYMBOLRATE                      (7100000)
 
-
 /* OCTONET */
 
 #define ETHER_BASE       (0x100)
@@ -554,11 +548,9 @@
 #define PID_FILTER_SYSTEM_PIDS(i)     (PID_FILTER_BASE + (i) * 0x20)
 #define PID_FILTER_PID(i, j)     (PID_FILTER_BASE + (i) * 0x20 + (j) * 4)
 
+/* V2 */
 
-
-// V2
-
-// MAX2871 same as DVB Modulator V2
+/* MAX2871 same as DVB Modulator V2 */
 
 #define RFDAC_BASE                (0x200)
 #define RFDAC_CONTROL             (RFDAC_BASE + 0x00)
@@ -575,19 +567,13 @@
 
 #define RFDAC_FCW                 (RFDAC_BASE + 0x10)
 
-//
-// --------------------------------------------------------------------------
-//
-
 #define JESD204B_BASE             (0x280)
 
-// Additional Status Bits
+/* Additional Status Bits */
 
 #define DMA_PCIE_LANES_MASK       (0x00070000)
 
-
-// --------------------------------------------------------------------------
-// Modulator Channels, partially compatible to DVB Modulator V1
+/* Modulator Channels, partially compatible to DVB Modulator V1 */
 
 #define SDR_CHANNEL_BASE            (0x800)
 
@@ -604,28 +590,28 @@
 #define SDR_CHANNEL_FM1GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x2C)
 #define SDR_CHANNEL_FM2GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x30)
 
-// Control and status bits
+/* Control and status bits */
 #define SDR_CONTROL_ENABLE_CHANNEL  (0x00000004)
 #define SDR_CONTROL_ENABLE_DMA      (0x00000008)
 #define SDR_STATUS_DMA_UNDERRUN     (0x00010000)
 
-// Config
+/* Config */
 #define SDR_CONFIG_ENABLE_FM1       (0x00000002)
 #define SDR_CONFIG_ENABLE_FM2       (0x00000004)
 #define SDR_CONFIG_DISABLE_ARI      (0x00000010)
 #define SDR_CONFIG_DISABLE_VSB      (0x00000020)
 
-// SET FIR
+/* SET FIR */
 #define SDR_FIR_COEFF_MASK          (0x00000FFF)
 #define SDR_FIR_TAP_MASK            (0x001F0000)
 #define SDR_FIR_SELECT_MASK         (0x00C00000)
 #define SDR_VSB_LENGTH_MASK         (0x01000000)
 
 #define SDR_SET_FIR(select, tap, coeff, vsblen)	\
-	((((select)<<22)&SDR_FIR_SELECT_MASK)|			\
-	 (((tap)<<16)&SDR_FIR_TAP_MASK)|				\
-	 ((coeff)&SDR_FIR_COEFF_MASK)|					\
-	 (((vsblen)<<24)&SDR_VSB_LENGTH_MASK)|				\
+	((((select) << 22) & SDR_FIR_SELECT_MASK) |			\
+	 (((tap) << 16) & SDR_FIR_TAP_MASK) |				\
+	 ((coeff) & SDR_FIR_COEFF_MASK) |				\
+	 (((vsblen) << 24) & SDR_VSB_LENGTH_MASK) |			\
 	 0								\
 		)
 

ddbridge/ddbridge.h

@@ -16,18 +16,19 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
  */
 
 #ifndef _DDBRIDGE_H_
 #define _DDBRIDGE_H_
 
+#define DDB_USE_WORK
+/*#define DDB_TEST_THREADED*/
+
 #include <linux/version.h>
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+#if (KERNEL_VERSION(3, 8, 0) < LINUX_VERSION_CODE)
 #define __devexit
 #define __devinit
 #define __devinitconst
@@ -90,6 +91,8 @@
 #include "lnbh25.h"
 #include "mxl5xx.h"
 
+#include "ddbridge-regs.h"
+
 #define DDB_MAX_I2C    32
 #define DDB_MAX_PORT   32
 #define DDB_MAX_INPUT  64
@@ -97,7 +100,7 @@
 #define DDB_MAX_LINK    4
 #define DDB_LINK_SHIFT 28
 
-#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
+#define DDB_LINK_TAG(_x) ((_x) << DDB_LINK_SHIFT)
 
 struct ddb_regset {
 	u32 base;
@@ -113,22 +116,18 @@ struct ddb_regmap {
 	u32 irq_base_gtl;
 	u32 irq_base_rate;
 
-	struct ddb_regset *i2c;
-	struct ddb_regset *i2c_buf;
-	struct ddb_regset *idma;
-	struct ddb_regset *idma_buf;
-	struct ddb_regset *odma;
-	struct ddb_regset *odma_buf;
+	const struct ddb_regset *i2c;
+	const struct ddb_regset *i2c_buf;
+	const struct ddb_regset *idma;
+	const struct ddb_regset *idma_buf;
+	const struct ddb_regset *odma;
+	const struct ddb_regset *odma_buf;
 
-	struct ddb_regset *input;
-	struct ddb_regset *output;
+	const struct ddb_regset *input;
+	const struct ddb_regset *output;
 
-	struct ddb_regset *channel;
-	//struct ddb_regset *ci;
-	//struct ddb_regset *pid_filter;
-	//struct ddb_regset *ns;
-	struct ddb_regset *gtl;
-	//struct ddb_regset *mdio;
+	const struct ddb_regset *channel;
+	const struct ddb_regset *gtl;
 };
 
 struct ddb_ids {
@@ -173,7 +172,7 @@ struct ddb_info {
 #define TS_QUIRK_NO_OUTPUT 4
 #define TS_QUIRK_ALT_OSC   8
 	u32 tempmon_irq;
-	struct ddb_regmap *regmap;
+	const struct ddb_regmap *regmap;
 };
 
 /* DMA_SIZE MUST be smaller than 256k and
@@ -184,26 +183,25 @@ struct ddb_info {
 
 #ifdef SMALL_DMA_BUFS
 #define INPUT_DMA_BUFS 32
-#define INPUT_DMA_SIZE (128*47*5)
+#define INPUT_DMA_SIZE (128 * 47 * 5)
 #define INPUT_DMA_IRQ_DIV 1
 
 #define OUTPUT_DMA_BUFS 32
-#define OUTPUT_DMA_SIZE (128*47*5)
+#define OUTPUT_DMA_SIZE (128 * 47 * 5)
 #define OUTPUT_DMA_IRQ_DIV 1
 #else
 #define INPUT_DMA_BUFS 8
-#define INPUT_DMA_SIZE (128*47*21)
+#define INPUT_DMA_SIZE (128 * 47 * 21)
 #define INPUT_DMA_IRQ_DIV 1
 
 #define OUTPUT_DMA_BUFS 8
-#define OUTPUT_DMA_SIZE (128*47*21)
+#define OUTPUT_DMA_SIZE (128 * 47 * 21)
 #define OUTPUT_DMA_IRQ_DIV 1
 #endif
 #define OUTPUT_DMA_BUFS_SDR 32
-#define OUTPUT_DMA_SIZE_SDR (256*1024)
+#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
 #define OUTPUT_DMA_IRQ_DIV_SDR 1
 
-
 struct ddb;
 struct ddb_port;
 
@@ -224,7 +222,7 @@ struct ddb_dma {
 #else
 	struct tasklet_struct  tasklet;
 #endif
-	spinlock_t             lock;
+	spinlock_t             lock; /* DMA lock */
 	wait_queue_head_t      wq;
 	int                    running;
 	u32                    stat;
@@ -249,11 +247,12 @@ struct ddb_dvb {
 	u32                    attached;
 	u8                     input;
 
-	fe_sec_tone_mode_t     tone;
-	fe_sec_voltage_t       voltage;
+	enum fe_sec_tone_mode  tone;
+	enum fe_sec_voltage    voltage;
 
 	int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
-	int (*set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
+	int (*set_voltage)(struct dvb_frontend *fe,
+			   enum fe_sec_voltage voltage);
 	int (*set_input)(struct dvb_frontend *fe, int input);
 	int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
 				      struct dvb_diseqc_master_cmd *cmd);
@@ -263,7 +262,6 @@ struct ddb_ci {
 	struct dvb_ca_en50221  en;
 	struct ddb_port       *port;
 	u32                    nr;
-	struct mutex           lock;
 };
 
 struct ddb_io {
@@ -297,7 +295,7 @@ struct ddb_port {
 	u32                    regs;
 	u32                    lnr;
 	struct ddb_i2c        *i2c;
-	struct mutex           i2c_gate_lock;
+	struct mutex           i2c_gate_lock; /* I2C access lock */
 	u32                    class;
 #define DDB_PORT_NONE           0
 #define DDB_PORT_CI             1
@@ -349,8 +347,6 @@ struct mod_base {
 
 struct ddb_mod {
 	struct ddb_port       *port;
-	//u32                    nr;
-	//u32                    regs;
 
 	u32                    frequency;
 	u32                    modulation;
@@ -409,7 +405,7 @@ struct ddb_ns {
 };
 
 struct ddb_lnb {
-	struct mutex           lock;
+	struct mutex           lock; /* lock lnb access */
 	u32                    tone;
 	fe_sec_voltage_t       oldvoltage[4];
 	u32                    voltage[4];
@@ -419,17 +415,17 @@ struct ddb_lnb {
 
 struct ddb_link {
 	struct ddb            *dev;
-	struct ddb_info       *info;
+	const struct ddb_info *info;
 	u32                    nr;
 	u32                    regs;
-	spinlock_t             lock;
-	struct mutex           flash_mutex;
+	spinlock_t             lock; /* lock link access */
+	struct mutex           flash_mutex; /* lock flash access */
 	struct ddb_lnb         lnb;
 	struct tasklet_struct  tasklet;
 	struct ddb_ids         ids;
 
-	spinlock_t             temp_lock;
-	int                    OverTemperatureError;
+	spinlock_t             temp_lock; /* lock temp chip access */
+	int                    over_temperature_error;
 	u8                     temp_tab[11];
 };
 
@@ -471,7 +467,7 @@ struct ddb {
 	int                    ns_num;
 	struct ddb_ns          ns[DDB_NS_MAX];
 	int                    vlan;
-	struct mutex           mutex;
+	struct mutex           mutex; /* lock accces to global ddb array */
 
 	struct dvb_device     *nsd_dev;
 	u8                     tsbuf[TS_CAPTURE_LEN];
@@ -481,211 +477,6 @@ struct ddb {
 
 };
 
-static inline void ddbwriteb(struct ddb *dev, u32 val, u32 adr)
-{
-	writeb(val, (char *) (dev->regs + (adr)));
-}
-
-static inline u32 ddbreadb(struct ddb *dev, u32 adr)
-{
-	return readb((char *) (dev->regs + (adr)));
-}
-
-static inline void ddbwritel0(struct ddb_link *link, u32 val, u32 adr)
-{
-	writel(val, (char *) (link->dev->regs + (adr)));
-}
-
-static inline u32 ddbreadl0(struct ddb_link *link, u32 adr)
-{
-	return readl((char *) (link->dev->regs + (adr)));
-}
-
-#if 0
-static inline void gtlw(struct ddb_link *link)
-{
-	u32 count = 0;
-	static u32 max;
-
-	while (1 & ddbreadl0(link, link->regs + 0x10)) {
-		if (++count == 1024) {
-			pr_info("LTO\n");
-			break;
-		}
-	}
-	if (count > max) {
-		max = count;
-		pr_info("TO=%u\n", max);
-	}
-	if (ddbreadl0(link, link->regs + 0x10) & 0x8000)
-		pr_err("link error\n");
-}
-#else
-static inline void gtlw(struct ddb_link *link)
-{
-	while (1 & ddbreadl0(link, link->regs + 0x10))
-		;
-}
-#endif
-
-
-static u32 ddblreadl(struct ddb_link *link, u32 adr)
-{
-	if (unlikely(link->nr)) {
-		unsigned long flags;
-		u32 val;
-
-		spin_lock_irqsave(&link->lock, flags);
-		gtlw(link);
-		ddbwritel0(link, adr & 0xfffc, link->regs + 0x14);
-		ddbwritel0(link, 3, link->regs + 0x10);
-		gtlw(link);
-		val = ddbreadl0(link, link->regs + 0x1c);
-		spin_unlock_irqrestore(&link->lock, flags);
-		return val;
-	}
-	return readl((char *) (link->dev->regs + (adr)));
-}
-
-static void ddblwritel(struct ddb_link *link, u32 val, u32 adr)
-{
-	if (unlikely(link->nr)) {
-		unsigned long flags;
-
-		spin_lock_irqsave(&link->lock, flags);
-		gtlw(link);
-		ddbwritel0(link, 0xf0000 | (adr & 0xfffc), link->regs + 0x14);
-		ddbwritel0(link, val, link->regs + 0x18);
-		ddbwritel0(link, 1, link->regs + 0x10);
-		spin_unlock_irqrestore(&link->lock, flags);
-		return;
-	}
-	writel(val, (char *) (link->dev->regs + (adr)));
-}
-
-static u32 ddbreadl(struct ddb *dev, u32 adr)
-{
-	if (unlikely(adr & 0xf0000000)) {
-		unsigned long flags;
-		u32 val, l = (adr >> DDB_LINK_SHIFT);
-		struct ddb_link *link = &dev->link[l];
-
-		spin_lock_irqsave(&link->lock, flags);
-		gtlw(link);
-		ddbwritel0(link, adr & 0xfffc, link->regs + 0x14);
-		ddbwritel0(link, 3, link->regs + 0x10);
-		gtlw(link);
-		val = ddbreadl0(link, link->regs + 0x1c);
-		spin_unlock_irqrestore(&link->lock, flags);
-		return val;
-	}
-	return readl((char *) (dev->regs + (adr)));
-}
-
-static void ddbwritel(struct ddb *dev, u32 val, u32 adr)
-{
-	if (unlikely(adr & 0xf0000000)) {
-		unsigned long flags;
-		u32 l = (adr >> DDB_LINK_SHIFT);
-		struct ddb_link *link = &dev->link[l];
-
-		spin_lock_irqsave(&link->lock, flags);
-		gtlw(link);
-		ddbwritel0(link, 0xf0000 | (adr & 0xfffc), link->regs + 0x14);
-		ddbwritel0(link, val, link->regs + 0x18);
-		ddbwritel0(link, 1, link->regs + 0x10);
-		spin_unlock_irqrestore(&link->lock, flags);
-		return;
-	}
-	writel(val, (char *) (dev->regs + (adr)));
-}
-
-static void gtlcpyto(struct ddb *dev, u32 adr, const u8 *buf,
-		     unsigned int count)
-{
-	u32 val = 0, p = adr;
-	u32 aa = p & 3;
-
-	if (aa) {
-		while (p & 3 && count) {
-			val >>= 8;
-			val |= *buf << 24;
-			p++;
-			buf++;
-			count--;
-		}
-		ddbwritel(dev, val, adr);
-	}
-	while (count >= 4) {
-		val = buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24);
-		ddbwritel(dev, val, p);
-		p += 4;
-		buf += 4;
-		count -= 4;
-	}
-	if (count) {
-		val = buf[0];
-		if (count > 1)
-			val |= buf[1] << 8;
-		if (count > 2)
-			val |= buf[2] << 16;
-		ddbwritel(dev, val, p);
-	}
-}
-
-static void gtlcpyfrom(struct ddb *dev, u8 *buf, u32 adr, long count)
-{
-	u32 val = 0, p = adr;
-	u32 a = p & 3;
-
-	if (a) {
-		val = ddbreadl(dev, p) >> (8 * a);
-		while (p & 3 && count) {
-			*buf = val & 0xff;
-			val >>= 8;
-			p++;
-			buf++;
-			count--;
-		}
-	}
-	while (count >= 4) {
-		val = ddbreadl(dev, p);
-		buf[0] = val & 0xff;
-		buf[1] = (val >> 8) & 0xff;
-		buf[2] = (val >> 16) & 0xff;
-		buf[3] = (val >> 24) & 0xff;
-		p += 4;
-		buf += 4;
-		count -= 4;
-	}
-	if (count) {
-		val = ddbreadl(dev, p);
-		buf[0] = val & 0xff;
-		if (count > 1)
-			buf[1] = (val >> 8) & 0xff;
-		if (count > 2)
-			buf[2] = (val >> 16) & 0xff;
-	}
-}
-
-static void ddbcpyto(struct ddb *dev, u32 adr, void *src, long count)
-{
-	if (unlikely(adr & 0xf0000000))
-		return gtlcpyto(dev, adr, src, count);
-	return memcpy_toio((char *) (dev->regs + adr), src, count);
-}
-
-static void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
-{
-	if (unlikely(adr & 0xf0000000))
-		return gtlcpyfrom(dev, dst, adr, count);
-	return memcpy_fromio(dst, (char *) (dev->regs + adr), count);
-}
-
-#define ddbmemset(_dev, _adr, _val, _count) \
-	memset_io((char *) (_dev->regs + (_adr)), (_val), (_count))
-
-
 /****************************************************************************/
 /****************************************************************************/
 /****************************************************************************/
@@ -738,6 +529,17 @@ struct DDMOD_FLASH {
 
 #define DDMOD_FLASH_MAGIC   0x5F564d5F
 
+int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
+
+#define DDBRIDGE_VERSION "0.9.32"
+
+/* linked function prototypes */
+
+const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
+				    u16 subvendor, u16 subdevice);
+int netstream_init(struct ddb_input *input);
+int ddb_dvb_ns_input_start(struct ddb_input *input);
+int ddb_dvb_ns_input_stop(struct ddb_input *input);
 
 int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg);
 int ddbridge_mod_init(struct ddb *dev);
@@ -745,13 +547,27 @@ void ddbridge_mod_output_stop(struct ddb_output *output);
 int ddbridge_mod_output_start(struct ddb_output *output);
 void ddbridge_mod_rate_handler(unsigned long data);
 
+void ddb_device_destroy(struct ddb *dev);
+void ddb_nsd_detach(struct ddb *dev);
+void ddb_ports_detach(struct ddb *dev);
+void ddb_ports_release(struct ddb *dev);
+void ddb_buffers_free(struct ddb *dev);
+void ddb_unmap(struct ddb *dev);
+irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler_v2(int irq, void *dev_id);
+void ddb_reset_ios(struct ddb *dev);
+int ddb_init(struct ddb *dev);
+int ddb_class_create(void);
+void ddb_class_destroy(void);
 
-int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
+int ddb_i2c_init(struct ddb *dev);
+void ddb_i2c_release(struct ddb *dev);
 
-#define DDBRIDGE_VERSION "0.9.30"
+int ddb_ci_attach(struct ddb_port *port, u32 bitrate);
 
-/* linked functions */
-
-struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice);
+int ddb_fe_attach_mxl5xx(struct ddb_input *input);
+int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm);
 
 #endif

ddbridge/octonet-main.c

@@ -17,21 +17,12 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ * along with this program; if not, point your browser to
+ *  http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
-#include "ddbridge-regs.h"
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 6, 0))
-#include <asm-generic/pci-dma-compat.h>
-#else
-#include <linux/pci-dma-compat.h>
-#endif
-
-#include "ddbridge-core.c"
+#include "ddbridge-io.h"
 
 static int __exit octonet_remove(struct platform_device *pdev)
 {
@@ -61,7 +52,7 @@ static int __init octonet_probe(struct platform_device *pdev)
 	struct resource *regs;
 	int irq;
 
-	dev = vzalloc(sizeof(struct ddb));
+	dev = vzalloc(sizeof(*dev));
 	if (!dev)
 		return -ENOMEM;
 	platform_set_drvdata(pdev, dev);
@@ -74,7 +65,7 @@ static int __init octonet_probe(struct platform_device *pdev)
 		return -ENXIO;
 	dev->regs_len = (regs->end - regs->start) + 1;
 	dev_info(dev->dev, "regs_start=%08x regs_len=%08x\n",
-		 (u32) regs->start, (u32) dev->regs_len);
+		 (u32)regs->start, (u32)dev->regs_len);
 	dev->regs = ioremap(regs->start, dev->regs_len);
 
 	if (!dev->regs) {
@@ -93,24 +84,13 @@ static int __init octonet_probe(struct platform_device *pdev)
 	dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
 
 	dev->link[0].dev = dev;
-#if 0
-	if (dev->link[0].ids.devid == 0x0300dd01)
-		dev->link[0].info = &ddb_octonet;
-	else if (dev->link[0].ids.devid == 0x0301dd01)
-		dev->link[0].info = &ddb_octonet_jse;
-	else if (dev->link[0].ids.devid == 0x0307dd01)
-		dev->link[0].info = &ddb_octonet_gtl;
-	else
-		dev->link[0].info = &ddb_octonet_tbd;
-#else
 	dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
 					 dev->link[0].ids.device,
 					 0xdd01, 0xffff);
-#endif
-	pr_info("DDBridge: HW  %08x REGMAP %08x\n",
-		dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
-	pr_info("DDBridge: MAC %08x DEVID  %08x\n",
-		dev->link[0].ids.mac, dev->link[0].ids.devid);
+	dev_info(dev->dev, "DDBridge: HW  %08x REGMAP %08x\n",
+		 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
+	dev_info(dev->dev, "DDBridge: MAC %08x DEVID  %08x\n",
+		 dev->link[0].ids.mac, dev->link[0].ids.devid);
 
 	ddbwritel(dev, 0, ETHER_CONTROL);
 	ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);
@@ -120,9 +100,9 @@ static int __init octonet_probe(struct platform_device *pdev)
 	irq = platform_get_irq(dev->pfdev, 0);
 	if (irq < 0)
 		goto fail;
-	if (request_irq(irq, irq_handler,
+	if (request_irq(irq, ddb_irq_handler,
 			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-			"octonet-dvb", (void *) dev) < 0)
+			"octonet-dvb", (void *)dev) < 0)
 		goto fail;
 	ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE);
 

dvb-core/Kconfig

@@ -0,0 +1,29 @@
+#
+# DVB device configuration
+#
+
+config DVB_MAX_ADAPTERS
+	int "maximum number of DVB/ATSC adapters"
+	depends on DVB_CORE
+	default 8
+	range 1 255
+	help
+	  Maximum number of DVB/ATSC adapters. Increasing this number
+	  increases the memory consumption of the DVB subsystem even
+	  if a much lower number of DVB/ATSC adapters is present.
+	  Only values in the range 4-32 are tested.
+
+	  If you are unsure about this, use the default value 8
+
+config DVB_DYNAMIC_MINORS
+	bool "Dynamic DVB minor allocation"
+	depends on DVB_CORE
+	default n
+	help
+	  If you say Y here, the DVB subsystem will use dynamic minor
+	  allocation for any device that uses the DVB major number.
+	  This means that you can have more than 4 of a single type
+	  of device (like demuxes and frontends) per adapter, but udev
+	  will be required to manage the device nodes.
+
+	  If you are unsure about this, say N here.

dvb-core/Makefile.kernel

@@ -0,0 +1,12 @@
+#
+# Makefile for the kernel DVB device drivers.
+#
+
+dvb-net-$(CONFIG_DVB_NET) := dvb_net.o
+
+dvb-core-objs := dvbdev.o dmxdev.o dvb_demux.o dvb_filter.o 	\
+		 dvb_ca_en50221.o dvb_frontend.o 		\
+		 $(dvb-net-y) dvb_ringbuffer.o dvb_math.o       \
+		 dvb_netstream.o
+
+obj-$(CONFIG_DVB_CORE) += dvb-core.o

frontends/Kconfig

@@ -0,0 +1,838 @@
+menu "Customise DVB Frontends"
+	visible if !MEDIA_SUBDRV_AUTOSELECT
+
+comment "Multistandard (satellite) frontends"
+	depends on DVB_CORE
+
+config DVB_STB0899
+	tristate "STB0899 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/S2/DSS Multistandard demodulator. Say Y when you want
+	  to support this demodulator based frontends
+
+config DVB_STB6100
+	tristate "STB6100 based tuners"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A Silicon tuner from ST used in conjunction with the STB0899
+	  demodulator. Say Y when you want to support this tuner.
+
+config DVB_STV090x
+	tristate "STV0900/STV0903(A/B) based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  DVB-S/S2/DSS Multistandard Professional/Broadcast demodulators.
+	  Say Y when you want to support these frontends.
+
+config DVB_STV6110x
+	tristate "STV6110/(A) based tuners"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A Silicon tuner that supports DVB-S and DVB-S2 modes
+
+config DVB_STV0910
+	tristate "STV0910 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  DVB-S/S2/DSS Multistandard Professional/Broadcast demodulators.
+	  Say Y when you want to support these frontends.
+
+config DVB_MXL5XX
+	tristate "MXL5XX based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  DVB-S/S2/DSS Multistandard Professional/Broadcast demodulators.
+	  Say Y when you want to support these frontends.
+
+config DVB_STV6111
+	tristate "STV6111 based tuners"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A Silicon tuner that supports DVB-S and DVB-S2 modes
+
+config DVB_M88DS3103
+	tristate "Montage M88DS3103"
+	depends on DVB_CORE && I2C && I2C_MUX
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+comment "Multistandard (cable + terrestrial) frontends"
+	depends on DVB_CORE
+
+config DVB_DRXK
+	tristate "Micronas DRXK based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Micronas DRX-K DVB-C/T demodulator.
+
+	  Say Y when you want to support this frontend.
+
+
+config DVB_TDA18271C2DD
+	tristate "NXP TDA18271C2 silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  NXP TDA18271 silicon tuner.
+
+	  Say Y when you want to support this tuner.
+
+config DVB_SI2165
+	tristate "Silicon Labs si2165 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-C/T demodulator.
+
+	  Say Y when you want to support this frontend.
+
+comment "DVB-S (satellite) frontends"
+	depends on DVB_CORE
+
+config DVB_CX24110
+	tristate "Conexant CX24110 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_CX24123
+	tristate "Conexant CX24123 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_MT312
+	tristate "Zarlink VP310/MT312/ZL10313 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_ZL10036
+	tristate "Zarlink ZL10036 silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_ZL10039
+	tristate "Zarlink ZL10039 silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_S5H1420
+	tristate "Samsung S5H1420 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_STV0288
+	tristate "ST STV0288 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_STB6000
+	tristate "ST STB6000 silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	  help
+	  A DVB-S silicon tuner module. Say Y when you want to support this tuner.
+
+config DVB_STV0299
+	tristate "ST STV0299 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_STV6110
+	tristate "ST STV6110 silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	  help
+	  A DVB-S silicon tuner module. Say Y when you want to support this tuner.
+
+config DVB_STV0900
+	tristate "ST STV0900 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/S2 demodulator. Say Y when you want to support this frontend.
+
+config DVB_TDA8083
+	tristate "Philips TDA8083 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA10086
+	tristate "Philips TDA10086 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA8261
+	tristate "Philips TDA8261 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_VES1X93
+	tristate "VLSI VES1893 or VES1993 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_TUNER_ITD1000
+	tristate "Integrant ITD1000 Zero IF tuner for DVB-S/DSS"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_TUNER_CX24113
+	tristate "Conexant CX24113/CX24128 tuner for DVB-S/DSS"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+
+config DVB_TDA826X
+	tristate "Philips TDA826X silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S silicon tuner module. Say Y when you want to support this tuner.
+
+config DVB_TUA6100
+	tristate "Infineon TUA6100 PLL"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S PLL chip.
+
+config DVB_CX24116
+	tristate "Conexant CX24116 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
+
+config DVB_CX24117
+	tristate "Conexant CX24117 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A Dual DVB-S/S2 tuner module. Say Y when you want to support this frontend.
+
+config DVB_SI21XX
+	tristate "Silicon Labs SI21XX based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_TS2020
+	tristate "Montage Tehnology TS2020 based tuners"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/S2 silicon tuner. Say Y when you want to support this tuner.
+
+config DVB_DS3000
+	tristate "Montage Tehnology DS3000 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
+
+config DVB_MB86A16
+	tristate "Fujitsu MB86A16 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S/DSS Direct Conversion reveiver.
+	  Say Y when you want to support this frontend.
+
+config DVB_TDA10071
+	tristate "NXP TDA10071"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+comment "DVB-T (terrestrial) frontends"
+	depends on DVB_CORE
+
+config DVB_SP8870
+	tristate "Spase sp8870 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+	  This driver needs external firmware. Please use the command
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware sp8870" to
+	  download/extract it, and then copy it to /usr/lib/hotplug/firmware
+	  or /lib/firmware (depending on configuration of firmware hotplug).
+
+config DVB_SP887X
+	tristate "Spase sp887x based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+	  This driver needs external firmware. Please use the command
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
+	  download/extract it, and then copy it to /usr/lib/hotplug/firmware
+	  or /lib/firmware (depending on configuration of firmware hotplug).
+
+config DVB_CX22700
+	tristate "Conexant CX22700 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_CX22702
+	tristate "Conexant cx22702 demodulator (OFDM)"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_S5H1432
+	tristate "Samsung s5h1432 demodulator (OFDM)"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_DRXD
+	tristate "Micronas DRXD driver"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+	  Note: this driver was based on vendor driver reference code (released
+	  under the GPL) as opposed to the existing drx397xd driver, which
+	  was written via reverse engineering.
+
+config DVB_L64781
+	tristate "LSI L64781"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA1004X
+	tristate "Philips TDA10045H/TDA10046H based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+	  This driver needs external firmware. Please use the commands
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10045",
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10046" to
+	  download/extract them, and then copy them to /usr/lib/hotplug/firmware
+	  or /lib/firmware (depending on configuration of firmware hotplug).
+
+config DVB_NXT6000
+	tristate "NxtWave Communications NXT6000 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_MT352
+	tristate "Zarlink MT352 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_ZL10353
+	tristate "Zarlink ZL10353 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_DIB3000MB
+	tristate "DiBcom 3000M-B"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+	  to support this frontend.
+
+config DVB_DIB3000MC
+	tristate "DiBcom 3000P/M-C"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+	  to support this frontend.
+
+config DVB_DIB7000M
+	tristate "DiBcom 7000MA/MB/PA/PB/MC"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+	  to support this frontend.
+
+config DVB_DIB7000P
+	tristate "DiBcom 7000PC"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+	  to support this frontend.
+
+config DVB_DIB9000
+	tristate "DiBcom 9000"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+	  to support this frontend.
+
+config DVB_TDA10048
+	tristate "Philips TDA10048HN based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA18212DD
+	tristate "Philips TDA18212 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T tuner module. Say Y when you want to support this frontend.
+
+config DVB_AF9013
+	tristate "Afatech AF9013 demodulator"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_EC100
+	tristate "E3C EC100"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_HD29L2
+	tristate "HDIC HD29L2"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_STV0367
+	tristate "ST STV0367 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T/C tuner module. Say Y when you want to support this frontend.
+
+config DVB_STV0367DD
+	tristate "ST STV0367dd based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T/C tuner module. Say Y when you want to support this frontend.
+
+config DVB_CXD2843
+	tristate "Sony CXD2843"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-T/T2/C/C2 tuner module. Say Y when you want to support this frontend.
+
+config DVB_CXD2820R
+	tristate "Sony CXD2820R"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_RTL2830
+	tristate "Realtek RTL2830 DVB-T"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_RTL2832
+	tristate "Realtek RTL2832 DVB-T"
+	depends on DVB_CORE && I2C && I2C_MUX
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+config DVB_RTL2832_SDR
+	tristate "Realtek RTL2832 SDR"
+	depends on DVB_CORE && I2C && I2C_MUX && VIDEO_V4L2 && MEDIA_SDR_SUPPORT && USB
+	select DVB_RTL2832
+	select VIDEOBUF2_VMALLOC
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this SDR module.
+
+config DVB_SI2168
+	tristate "Silicon Labs Si2168"
+	depends on DVB_CORE && I2C && I2C_MUX
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Say Y when you want to support this frontend.
+
+comment "DVB-C (cable) frontends"
+	depends on DVB_CORE
+
+config DVB_VES1820
+	tristate "VLSI VES1820 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-C tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA10021
+	tristate "Philips TDA10021 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-C tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA10023
+	tristate "Philips TDA10023 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-C tuner module. Say Y when you want to support this frontend.
+
+config DVB_STV0297
+	tristate "ST STV0297 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-C tuner module. Say Y when you want to support this frontend.
+
+comment "ATSC (North American/Korean Terrestrial/Cable DTV) frontends"
+	depends on DVB_CORE
+
+config DVB_NXT200X
+	tristate "NxtWave Communications NXT2002/NXT2004 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+	  This driver needs external firmware. Please use the commands
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" and
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
+	  download/extract them, and then copy them to /usr/lib/hotplug/firmware
+	  or /lib/firmware (depending on configuration of firmware hotplug).
+
+config DVB_OR51211
+	tristate "Oren OR51211 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB tuner module. Say Y when you want to support this frontend.
+
+	  This driver needs external firmware. Please use the command
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware or51211" to
+	  download it, and then copy it to /usr/lib/hotplug/firmware
+	  or /lib/firmware (depending on configuration of firmware hotplug).
+
+config DVB_OR51132
+	tristate "Oren OR51132 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+	  This driver needs external firmware. Please use the commands
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware or51132_vsb" and/or
+	  "<kerneldir>/Documentation/dvb/get_dvb_firmware or51132_qam" to
+	  download firmwares for 8VSB and QAM64/256, respectively. Copy them to
+	  /usr/lib/hotplug/firmware or /lib/firmware (depending on
+	  configuration of firmware hotplug).
+
+config DVB_BCM3510
+	tristate "Broadcom BCM3510"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB/16VSB and QAM64/256 tuner module. Say Y when you want to
+	  support this frontend.
+
+config DVB_LGDT330X
+	tristate "LG Electronics LGDT3302/LGDT3303 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+config DVB_LGDT3305
+	tristate "LG Electronics LGDT3304 and LGDT3305 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+config DVB_LG2160
+	tristate "LG Electronics LG216x based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC/MH demodulator module. Say Y when you want
+	  to support this frontend.
+
+config DVB_S5H1409
+	tristate "Samsung S5H1409 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+config DVB_AU8522
+	depends on I2C
+	tristate
+
+config DVB_AU8522_DTV
+	tristate "Auvitek AU8522 based DTV demod"
+	depends on DVB_CORE && I2C
+	select DVB_AU8522
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB, QAM64/256 & NTSC demodulator module. Say Y when
+	  you want to enable DTV demodulation support for this frontend.
+
+config DVB_AU8522_V4L
+	tristate "Auvitek AU8522 based ATV demod"
+	depends on VIDEO_V4L2 && I2C
+	select DVB_AU8522
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB, QAM64/256 & NTSC demodulator module. Say Y when
+	  you want to enable ATV demodulation support for this frontend.
+
+config DVB_S5H1411
+	tristate "Samsung S5H1411 based"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
+	  to support this frontend.
+
+comment "ISDB-T (terrestrial) frontends"
+	depends on DVB_CORE
+
+config DVB_S921
+	tristate "Sharp S921 frontend"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  AN ISDB-T DQPSK, QPSK, 16QAM and 64QAM 1seg tuner module.
+	  Say Y when you want to support this frontend.
+
+config DVB_DIB8000
+	tristate "DiBcom 8000MB/MC"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A driver for DiBcom's DiB8000 ISDB-T/ISDB-Tsb demodulator.
+	  Say Y when you want to support this frontend.
+
+config DVB_MB86A20S
+	tristate "Fujitsu mb86a20s"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A driver for Fujitsu mb86a20s ISDB-T/ISDB-Tsb demodulator.
+	  Say Y when you want to support this frontend.
+
+comment "Digital terrestrial only tuners/PLL"
+	depends on DVB_CORE
+
+config DVB_PLL
+	tristate "Generic I2C PLL based tuners"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  This module drives a number of tuners based on PLL chips with a
+	  common I2C interface. Say Y when you want to support these tuners.
+
+config DVB_TUNER_DIB0070
+	tristate "DiBcom DiB0070 silicon base-band tuner"
+	depends on I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A driver for the silicon baseband tuner DiB0070 from DiBcom.
+	  This device is only used inside a SiP called together with a
+	  demodulator for now.
+
+config DVB_TUNER_DIB0090
+	tristate "DiBcom DiB0090 silicon base-band tuner"
+	depends on I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A driver for the silicon baseband tuner DiB0090 from DiBcom.
+	  This device is only used inside a SiP called together with a
+	  demodulator for now.
+
+comment "SEC control devices for DVB-S"
+	depends on DVB_CORE
+
+source "drivers/media/dvb-frontends/drx39xyj/Kconfig"
+
+config DVB_LNBP21
+	tristate "LNBP21/LNBH24 SEC controllers"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An SEC control chips.
+
+config DVB_LNBH25
+	tristate "LNBH25 SEC controllers"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An SEC control chips.
+
+config DVB_LNBP22
+	tristate "LNBP22 SEC controllers"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  LNB power supply and control voltage
+	  regulator chip with step-up converter
+	  and I2C interface.
+	  Say Y when you want to support this chip.
+
+config DVB_ISL6405
+	tristate "ISL6405 SEC controller"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An SEC control chip.
+
+config DVB_ISL6421
+	tristate "ISL6421 SEC controller"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  An SEC control chip.
+
+config DVB_ISL6423
+	tristate "ISL6423 SEC controller"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A SEC controller chip from Intersil
+
+config DVB_A8293
+	tristate "Allegro A8293"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+
+config DVB_LGS8GL5
+	tristate "Silicon Legend LGS-8GL5 demodulator (OFDM)"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DMB-TH tuner module. Say Y when you want to support this frontend.
+
+config DVB_LGS8GXX
+	tristate "Legend Silicon LGS8913/LGS8GL5/LGS8GXX DMB-TH demodulator"
+	depends on DVB_CORE && I2C
+	select FW_LOADER
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DMB-TH tuner module. Say Y when you want to support this frontend.
+
+config DVB_ATBM8830
+	tristate "AltoBeam ATBM8830/8831 DMB-TH demodulator"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DMB-TH tuner module. Say Y when you want to support this frontend.
+
+config DVB_TDA665x
+	tristate "TDA665x tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  Support for tuner modules based on Philips TDA6650/TDA6651 chips.
+	  Say Y when you want to support this chip.
+
+	  Currently supported tuners:
+	  * Panasonic ENV57H12D5 (ET-50DT)
+
+config DVB_IX2505V
+	tristate "Sharp IX2505V silicon tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module. Say Y when you want to support this frontend.
+
+config DVB_M88RS2000
+	tristate "M88RS2000 DVB-S demodulator and tuner"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+	help
+	  A DVB-S tuner module.
+	  Say Y when you want to support this frontend.
+
+config DVB_AF9033
+	tristate "Afatech AF9033 DVB-T demodulator"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+
+config DVB_CXD2099
+	tristate "cxd2099"
+	depends on DVB_CORE && I2C
+	default m if !MEDIA_SUBDRV_AUTOSELECT
+
+comment "Tools to develop new frontends"
+
+config DVB_DUMMY_FE
+	tristate "Dummy frontend driver"
+	default n
+endmenu

frontends/Makefile.kernel

@@ -0,0 +1,123 @@
+#
+# Makefile for the kernel DVB frontend device drivers.
+#
+
+ccflags-y += -I$(srctree)/drivers/media/dvb-core/
+ccflags-y += -I$(srctree)/drivers/media/tuners/
+
+# FIXME: RTL2832 SDR driver uses power management directly from USB IF driver
+ifdef CONFIG_DVB_RTL2832_SDR
+	ccflags-y += -I$(srctree)/drivers/media/usb/dvb-usb-v2
+endif
+
+stb0899-objs := stb0899_drv.o stb0899_algo.o
+stv0900-objs := stv0900_core.o stv0900_sw.o
+drxd-objs := drxd_firm.o drxd_hard.o
+cxd2820r-objs := cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o
+drxk-objs := drxk_hard.o
+
+obj-$(CONFIG_DVB_PLL) += dvb-pll.o
+obj-$(CONFIG_DVB_STV0299) += stv0299.o
+obj-$(CONFIG_DVB_STB0899) += stb0899.o
+obj-$(CONFIG_DVB_STB6100) += stb6100.o
+obj-$(CONFIG_DVB_SP8870) += sp8870.o
+obj-$(CONFIG_DVB_CX22700) += cx22700.o
+obj-$(CONFIG_DVB_S5H1432) += s5h1432.o
+obj-$(CONFIG_DVB_CX24110) += cx24110.o
+obj-$(CONFIG_DVB_TDA8083) += tda8083.o
+obj-$(CONFIG_DVB_L64781) += l64781.o
+obj-$(CONFIG_DVB_DIB3000MB) += dib3000mb.o
+obj-$(CONFIG_DVB_DIB3000MC) += dib3000mc.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB7000M) += dib7000m.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB7000P) += dib7000p.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB8000) += dib8000.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB9000) += dib9000.o dibx000_common.o
+obj-$(CONFIG_DVB_MT312) += mt312.o
+obj-$(CONFIG_DVB_VES1820) += ves1820.o
+obj-$(CONFIG_DVB_VES1X93) += ves1x93.o
+obj-$(CONFIG_DVB_TDA1004X) += tda1004x.o
+obj-$(CONFIG_DVB_SP887X) += sp887x.o
+obj-$(CONFIG_DVB_NXT6000) += nxt6000.o
+obj-$(CONFIG_DVB_MT352) += mt352.o
+obj-$(CONFIG_DVB_ZL10036) += zl10036.o
+obj-$(CONFIG_DVB_ZL10039) += zl10039.o
+obj-$(CONFIG_DVB_ZL10353) += zl10353.o
+obj-$(CONFIG_DVB_CX22702) += cx22702.o
+obj-$(CONFIG_DVB_DRXD) += drxd.o
+obj-$(CONFIG_DVB_TDA10021) += tda10021.o
+obj-$(CONFIG_DVB_TDA10023) += tda10023.o
+obj-$(CONFIG_DVB_STV0297) += stv0297.o
+obj-$(CONFIG_DVB_NXT200X) += nxt200x.o
+obj-$(CONFIG_DVB_OR51211) += or51211.o
+obj-$(CONFIG_DVB_OR51132) += or51132.o
+obj-$(CONFIG_DVB_BCM3510) += bcm3510.o
+obj-$(CONFIG_DVB_S5H1420) += s5h1420.o
+obj-$(CONFIG_DVB_LGDT330X) += lgdt330x.o
+obj-$(CONFIG_DVB_LGDT3305) += lgdt3305.o
+obj-$(CONFIG_DVB_LG2160) += lg2160.o
+obj-$(CONFIG_DVB_CX24123) += cx24123.o
+obj-$(CONFIG_DVB_LNBP21) += lnbp21.o
+obj-$(CONFIG_DVB_LNBP22) += lnbp22.o
+obj-$(CONFIG_DVB_ISL6405) += isl6405.o
+obj-$(CONFIG_DVB_ISL6421) += isl6421.o
+obj-$(CONFIG_DVB_TDA10086) += tda10086.o
+obj-$(CONFIG_DVB_TDA826X) += tda826x.o
+obj-$(CONFIG_DVB_TDA8261) += tda8261.o
+obj-$(CONFIG_DVB_TUNER_DIB0070) += dib0070.o
+obj-$(CONFIG_DVB_TUNER_DIB0090) += dib0090.o
+obj-$(CONFIG_DVB_TUA6100) += tua6100.o
+obj-$(CONFIG_DVB_S5H1409) += s5h1409.o
+obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o
+obj-$(CONFIG_DVB_AU8522) += au8522_common.o
+obj-$(CONFIG_DVB_AU8522_DTV) += au8522_dig.o
+obj-$(CONFIG_DVB_AU8522_V4L) += au8522_decoder.o
+obj-$(CONFIG_DVB_TDA10048) += tda10048.o
+obj-$(CONFIG_DVB_TUNER_CX24113) += cx24113.o
+obj-$(CONFIG_DVB_S5H1411) += s5h1411.o
+obj-$(CONFIG_DVB_LGS8GL5) += lgs8gl5.o
+obj-$(CONFIG_DVB_TDA665x) += tda665x.o
+obj-$(CONFIG_DVB_LGS8GXX) += lgs8gxx.o
+obj-$(CONFIG_DVB_ATBM8830) += atbm8830.o
+obj-$(CONFIG_DVB_DUMMY_FE) += dvb_dummy_fe.o
+obj-$(CONFIG_DVB_AF9013) += af9013.o
+obj-$(CONFIG_DVB_CX24116) += cx24116.o
+obj-$(CONFIG_DVB_CX24117) += cx24117.o
+obj-$(CONFIG_DVB_SI21XX) += si21xx.o
+obj-$(CONFIG_DVB_SI2168) += si2168.o
+obj-$(CONFIG_DVB_STV0288) += stv0288.o
+obj-$(CONFIG_DVB_STB6000) += stb6000.o
+obj-$(CONFIG_DVB_S921) += s921.o
+obj-$(CONFIG_DVB_STV6110) += stv6110.o
+obj-$(CONFIG_DVB_STV0900) += stv0900.o
+obj-$(CONFIG_DVB_STV090x) += stv090x.o
+obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
+obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o
+obj-$(CONFIG_DVB_ISL6423) += isl6423.o
+obj-$(CONFIG_DVB_EC100) += ec100.o
+obj-$(CONFIG_DVB_HD29L2) += hd29l2.o
+obj-$(CONFIG_DVB_DS3000) += ds3000.o
+obj-$(CONFIG_DVB_TS2020) += ts2020.o
+obj-$(CONFIG_DVB_MB86A16) += mb86a16.o
+obj-$(CONFIG_DVB_DRX39XYJ) += drx39xyj/
+obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o
+obj-$(CONFIG_DVB_IX2505V) += ix2505v.o
+obj-$(CONFIG_DVB_STV0367) += stv0367.o
+obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o
+obj-$(CONFIG_DVB_DRXK) += drxk.o
+obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o
+obj-$(CONFIG_DVB_SI2165) += si2165.o
+obj-$(CONFIG_DVB_A8293) += a8293.o
+obj-$(CONFIG_DVB_TDA10071) += tda10071.o
+obj-$(CONFIG_DVB_RTL2830) += rtl2830.o
+obj-$(CONFIG_DVB_RTL2832) += rtl2832.o
+obj-$(CONFIG_DVB_RTL2832_SDR) += rtl2832_sdr.o
+obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o
+obj-$(CONFIG_DVB_AF9033) += af9033.o
+obj-$(CONFIG_DVB_STV0367DD) += stv0367dd.o
+obj-$(CONFIG_DVB_TDA18212DD) += tda18212dd.o
+obj-$(CONFIG_DVB_CXD2099) += cxd2099.o
+obj-$(CONFIG_DVB_CXD2843) += cxd2843.o
+obj-$(CONFIG_DVB_STV6111) += stv6111.o
+obj-$(CONFIG_DVB_STV0910) += stv0910.o
+obj-$(CONFIG_DVB_LNBH25) += lnbh25.o
+obj-$(CONFIG_DVB_MXL5XX) += mxl5xx.o

frontends/cxd2843.c

@@ -2203,12 +2203,13 @@ static int tune(struct dvb_frontend *fe, bool re_tune,
 		state->tune_time = jiffies;
 
 	}
-	if (*status & FE_HAS_LOCK)
-		return 0;
-	/* *delay = 50; */
 	r = read_status(fe, status);
 	if (r)
 		return r;
+	if (*status & FE_HAS_LOCK) {
+		*delay = HZ;
+		return 0;
+	}
 	return 0;
 }
 

frontends/mxl5xx.c

@@ -424,9 +424,22 @@ static int get_algo(struct dvb_frontend *fe)
 	return DVBFE_ALGO_HW;
 }
 
-/*
-static int cfg_scrambler(struct mxl *state)
+/* This should maybe go into dvb-core/dvb_math.c */
+
+static u32 gold2root(u32 gold)
 {
+	u32 x, g;
+	
+	if (gold >= 0x3ffff)
+		gold = 0;
+	for (g = 0, x = 1; g < gold; g++)
+		x = (((x ^ (x >> 7)) & 1) << 17) | (x >> 1);
+	return x;
+}
+
+static int cfg_scrambler(struct mxl *state, u32 gold)
+{
+	u32 root;
 	u8 buf[26] = {
 		MXL_HYDRA_PLID_CMD_WRITE, 24,
 		0, MXL_HYDRA_DEMOD_SCRAMBLE_CODE_CMD, 0, 0,
@@ -435,11 +448,18 @@ static int cfg_scrambler(struct mxl *state)
 		0, 0, 0, 0, 1, 0, 0, 0,
 	};
 
+	if (gold != NO_SCRAMBLING_CODE)
+		root = gold2root(gold);
+	else
+		root = 1;
+	buf[25] = (root >> 24) & 0xff;
+	buf[24] = (root >> 16) & 0xff;
+	buf[23] = (root >> 8) & 0xff;
+	buf[22] = root & 0xff;
+
 	return send_command(state, sizeof(buf), buf);
 }
 
-*/
-
 static int CfgDemodAbortTune(struct mxl *state)
 {
 	MXL_HYDRA_DEMOD_ABORT_TUNE_T abortTuneCmd;
@@ -510,7 +530,7 @@ static int set_parameters(struct dvb_frontend *fe)
 		demodChanCfg.rollOff = MXL_HYDRA_ROLLOFF_AUTO;
 		demodChanCfg.modulationScheme = MXL_HYDRA_MOD_AUTO;
 		demodChanCfg.pilots = MXL_HYDRA_PILOTS_AUTO;
-		//cfg_scrambler(state);
+		cfg_scrambler(state, p->pls);
 		break;
 	default:
 		return -EINVAL;
@@ -576,17 +596,13 @@ static int tune(struct dvb_frontend *fe, bool re_tune,
 		state->tune_time = jiffies;
 		return 0;
 	}
-	if (*status & FE_HAS_LOCK)
-		return 0;
-
 	r = read_status(fe, status);
 	if (r)
 		return r;
-
-#if 0
 	if (*status & FE_HAS_LOCK)
 		return 0;
 
+#if 0
 	if (p->delivery_system == SYS_DVBS)
 		p->delivery_system = SYS_DVBS2;
 	else

frontends/stv090x.c

@@ -3446,11 +3446,11 @@ err:
 static int stv090x_set_pls(struct stv090x_state *state, u8 pls_mode, u32 pls_code)
 {
 	dprintk(FE_DEBUG, 1, "Set PLS code %d (mode %d)", pls_code, pls_mode);
-	if (STV090x_WRITE_DEMOD(state, PLROOT2, (pls_mode << 2) | (pls_code >> 16)) < 0)
+	if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
 		goto err;
 	if (STV090x_WRITE_DEMOD(state, PLROOT1, (pls_code >> 8) & 0xff) < 0)
 		goto err;
-	if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
+	if (STV090x_WRITE_DEMOD(state, PLROOT2, (pls_mode << 2) | (pls_code >> 16)) < 0)
 		goto err;
 	return 0;
 err:
@@ -4927,15 +4927,6 @@ static int stv090x_init(struct dvb_frontend *fe)
 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
 		goto err;
 
-#if 0
-	if (state->device == STV0900) {
-		if (stv0900_set_tspath(state) < 0)
-			goto err;
-	} else {
-		if (stv0903_set_tspath(state) < 0)
-			goto err;
-	}
-#endif
 	return 0;
 
 err_gateoff: