219 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			219 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| # .gdbinit file
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| # $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
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| 
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| # setting
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| set width 0d70
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| set radix 0d16
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| set height 0
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| debug_chaos
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| 
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| # clk xin:cpu:bus=1:8:1
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| define clock_init_on_181
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|   set *(unsigned long *)0x00ef400c = 0x2
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|   set *(unsigned long *)0x00ef4004 = 0x1
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef4000 = 0x101
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| end
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| # clk xin:cpu:bus=1:8:2
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| define clock_init_on_182
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|   set *(unsigned long *)0x00ef400c = 0x1
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|   set *(unsigned long *)0x00ef4004 = 0x1
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef4000 = 0x101
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| end
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| 
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| # clk xin:cpu:bus=1:8:4
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| define clock_init_on_184
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|   set *(unsigned long *)0x00ef400c = 0x0
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|   set *(unsigned long *)0x00ef4004 = 0x1
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef4000 = 0x101
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| end
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| 
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| # clk xin:cpu:bus=1:1:1
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| define clock_init_off
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef4000 = 0x0
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef4004 = 0x0
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|   shell sleep 0.1
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|   set *(unsigned long *)0x00ef400c = 0x0
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| end
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| 
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| define tlb_init
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|   set $tlbbase = 0xfe000000
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|   set *(unsigned long *)($tlbbase + 0x04) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x0c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x14) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x1c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x24) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x2c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x34) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x3c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x44) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x4c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x54) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x5c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x64) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x6c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x74) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x7c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x84) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x8c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x94) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x9c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xa4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xac) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xb4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xbc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xc4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xcc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xd4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xdc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xe4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xec) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xf4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xfc) = 0x0
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|   set $tlbbase = 0xfe000800
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|   set *(unsigned long *)($tlbbase + 0x04) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x0c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x14) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x1c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x24) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x2c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x34) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x3c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x44) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x4c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x54) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x5c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x64) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x6c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x74) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x7c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x84) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x8c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x94) = 0x0
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|   set *(unsigned long *)($tlbbase + 0x9c) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xa4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xac) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xb4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xbc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xc4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xcc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xd4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xdc) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xe4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xec) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xf4) = 0x0
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|   set *(unsigned long *)($tlbbase + 0xfc) = 0x0
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| end
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| 
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| define load_modules
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|   use_debug_dma
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|   load
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| end
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| 
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| # Set kernel parameters
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| define set_kernel_parameters
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|   set $param = (void*)0x88001000
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|   # INITRD_START
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| #  set *(unsigned long *)($param + 0x0010) = 0x08300000
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|   # INITRD_SIZE
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| #  set *(unsigned long *)($param + 0x0014) = 0x00400000
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|   # M32R_CPUCLK
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|   set *(unsigned long *)($param + 0x0018) = 0d200000000
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|   # M32R_BUSCLK
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|   set *(unsigned long *)($param + 0x001c) = 0d50000000
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| #  set *(unsigned long *)($param + 0x001c) = 0d25000000
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| 
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|   # M32R_TIMER_DIVIDE
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|   set *(unsigned long *)($param + 0x0020) = 0d128
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| 
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|   set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \
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|   root=/dev/nfsroot \
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|   nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \
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|   nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \
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|   mem=16m \0"
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| end
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| 
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| define boot
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|   set_kernel_parameters
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|   set $pc=0x88002000
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|   set $fp=0
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|   set $evb=0x88000000
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|   si
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|   c
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| end
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| 
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| # Show TLB entries
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| define show_tlb_entries
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|   set $i = 0
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|   set $addr = $arg0
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|   use_mon_code
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|   while ($i < 0d32 )
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|     set $tlb_tag = *(unsigned long*)$addr
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|     set $tlb_data = *(unsigned long*)($addr + 4)
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|     printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
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|     set $i = $i + 1
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|     set $addr = $addr + 8
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|   end
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| #  use_debug_dma
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| end
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| define itlb
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|   set $itlb=0xfe000000
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|   show_tlb_entries $itlb
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| end
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| define dtlb
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|   set $dtlb=0xfe000800
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|   show_tlb_entries $dtlb
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| end
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| 
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| define show_regs
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|   printf " R0[%08lx]   R1[%08lx]   R2[%08lx]   R3[%08lx]\n",$r0,$r1,$r2,$r3
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|   printf " R4[%08lx]   R5[%08lx]   R6[%08lx]   R7[%08lx]\n",$r4,$r5,$r6,$r7
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|   printf " R8[%08lx]   R9[%08lx]  R10[%08lx]  R11[%08lx]\n",$r8,$r9,$r10,$r11
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|   printf "R12[%08lx]   FP[%08lx]   LR[%08lx]   SP[%08lx]\n",$r12,$fp,$lr,$sp
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|   printf "PSW[%08lx]  CBR[%08lx]  SPI[%08lx]  SPU[%08lx]\n",$psw,$cbr,$spi,$spu
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|   printf "BPC[%08lx]   PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch
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|   printf "EVB[%08lx]\n",$evb
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| end
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| 
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| define restart
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|   sdireset
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|   sdireset
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|   en 1
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|   set $pc=0x0
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|   c
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|   tlb_init
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|   setup
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|   load_modules
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|   boot
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| end
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| 
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| define setup
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|   debug_chaos
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| # Clock
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| #  shell sleep 0.1
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| #  clock_init_off
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| #  shell sleep 1
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| #  clock_init_on_182
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| #  shell sleep 0.1
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| # SDRAM
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|   set *(unsigned long *)0xa0ef6004 = 0x0001053f
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|   set *(unsigned long *)0xa0ef6028 = 0x00031102
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| end
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| 
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| sdireset
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| sdireset
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| file vmlinux
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| target m32rsdi
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| set $pc=0x0
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| b *0x30000
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| c
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| dis 1
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| setup
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| tlb_init
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| load_modules
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| boot
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