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mirror of https://github.com/DigitalDevices/dddvb.git synced 2023-10-10 13:37:43 +02:00
Commit Graph

661 Commits

Author SHA1 Message Date
none
dfe6b385a9 rename sx8info to ddinfo and add to Makefile 2021-06-05 22:36:01 +02:00
none
6e926c1452 add DVB-T parameters 2021-06-05 22:32:46 +02:00
none
8039097426 add support for FE_TIMEDOUT 2021-05-26 22:39:27 +02:00
mvoelkel
f3d5adc777 added puncture_rate to modulator stream setup 2021-04-17 21:03:05 +02:00
mvoelkel
e974925430 Merge branch 'internal' of https://github.com/DigitalDevices/internal_dddvb into internal 2021-04-10 19:08:23 +02:00
none
7bafb76461 change to floating point for frequency and signal strength
add comments to example config
2021-04-09 12:53:06 +02:00
mvoelkel
9cde52a6d8 Merge branch 'internal' of https://github.com/DigitalDevices/internal_dddvb into internal 2021-04-07 19:59:08 +02:00
none
50e354c49a cleanup 2021-04-07 19:29:53 +02:00
none
03d84ba75a add example modulator config file 2021-04-07 19:29:18 +02:00
none
c4f82de8b0 add modconfig 2021-04-07 19:28:49 +02:00
none
a5ad0b0584 show MCI firmware version 2021-04-07 19:28:12 +02:00
none
3cb3df51cf use correct kernel integer types 2021-04-07 19:27:21 +02:00
none
2311b94970 add modulator MCI commands 2021-04-07 19:25:32 +02:00
none
f12fe91b51 use PCI revision to determine major firmware version 2021-04-07 19:21:24 +02:00
none
35c283bf2f remove test command 2021-04-07 19:20:38 +02:00
none
41a9626be4 remove unnused variable 2021-04-07 19:20:24 +02:00
none
0d66d5bab0 Merge branch 'internal' 2021-03-18 19:03:57 +01:00
none
91af1be97e simple sx8 status info tool 2021-03-18 14:02:26 +01:00
none
a6c3b82f83 make include usable in user space 2021-03-18 13:48:09 +01:00
none
e863a2037a add byte array to union 2021-03-18 13:47:45 +01:00
none
92cd675f5d move ddbridge ioctls to separate file 2021-03-18 12:39:41 +01:00
none
dda8698514 add timeout status 2021-03-18 10:45:53 +01:00
none
fc9a89c870 add per demod lock for more fine-grained locking 2021-03-18 10:44:11 +01:00
none
4b0a0c4ff2 allow explicit setting of roll-off 2021-03-18 10:39:07 +01:00
none
2ac970ef83 typo 2021-03-18 10:36:51 +01:00
none
c3c734b0e8 remove unsused variables and code 2021-03-11 23:23:30 +01:00
none
8380cb185f change direct_mode to module parameter 2021-03-11 23:22:03 +01:00
none
f9eb03a065 remove unused entries 2021-03-11 23:20:31 +01:00
none
f8c97ad3d6 remove init dump, cannot access regs directly on all platforms 2021-03-11 22:43:12 +01:00
none
60646a6b26 experimental diseqc receive code 2021-03-11 22:33:13 +01:00
none
de0e970999 change input locked in fmode=4 and do not send emulated sequence as diseqc 2021-03-11 22:31:52 +01:00
none
cf35c3038b only get status if demod started 2021-03-10 22:03:56 +01:00
none
4c96f54ddf increase L-BAND to 3GHz 2021-03-10 21:46:29 +01:00
none
eb427a8df2 properly handle flash size limits 2021-03-10 21:38:19 +01:00
none
b200ce3596 allow source selection in non-unicable mode 2021-03-10 16:20:44 +01:00
none
31f36de0d7 set default source to undef 2021-03-10 16:20:44 +01:00
mocm
9269270c79 Added install link 2021-03-09 22:14:14 +01:00
drmocm
04fa5041d3 fixes 2021-03-09 22:06:10 +01:00
none
8f4cd19539 Merge branch 'internal' 2021-03-09 22:05:45 +01:00
drmocm
f3cbbf3ba7 Merge branch 'internal' of http://hippo:3000/rjkm/dddvb into internal 2021-03-09 21:40:52 +01:00
none
a2d39f90d5 add module parameter for disabling voltage output in Max cards. 2021-03-09 20:21:09 +01:00
none
7af71dfdcb lock ldpc bitrate adjustment to prevent race condition during tuner stop 2021-03-09 14:23:06 +01:00
drmocm
acb5931ed0 added README.md 2021-03-08 14:29:27 +01:00
none
476a105de7 Merge branch 'internal' 2021-03-01 13:06:05 +01:00
none
b025599e9f dump more buffer bytes in case of misalignment 2021-03-01 12:58:54 +01:00
none
9028e75f63 always use unaligned processing if detected once 2021-03-01 12:58:21 +01:00
none
177e6b0fd6 check if memory is aligned to 4K 2021-03-01 12:57:45 +01:00
none
de82a50b4e Set allocated memory to zero. 2021-03-01 12:57:20 +01:00
none
5714b85238 Merge branch 'internal' 2021-02-25 15:00:30 +01:00
none
01ca1b8805 Detect and report TS misalignment and switch to unaligned processing. 2021-02-25 14:58:42 +01:00